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path: root/arch/m68k/include/asm/m5206sim.h
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2017-11-02License cleanup: add SPDX GPL-2.0 license identifier to files with no licenseGreg Kroah-Hartman1-0/+1
2016-12-05m68knommu: platform support for i2c devices on ColdFire SoCSteven King1-0/+8
2012-09-27m68knommu: make ColdFire Chip Select register definitions absolute addressesGreg Ungerer1-25/+25
2012-09-27m68knommu: make ColdFire Interrupt Source register definitions absolute addre...Greg Ungerer1-16/+16
2012-09-27m68knommu: make ColdFire Pin Assignment register definitions absolute addressesGreg Ungerer1-2/+2
2012-09-27m68knommu: make ColdFire watchdog register definitions absolute addressesGreg Ungerer1-2/+2
2012-09-27m68knommu: make ColdFire SYPCR and RSR register definitions absolute addressesGreg Ungerer1-2/+2
2012-09-27m68knommu: make ColdFire IMR and IPR register definitions absolute addressesGreg Ungerer1-2/+2
2012-03-05m68knommu: make 5206 UART platform addressing consistentGreg Ungerer1-4/+6
2011-03-15m68knommu: remove ColdFire CLOCK_DIV config optionGreg Ungerer1-0/+1
2011-03-15m68knommu: clean up use of MBAR for DRAM registers on ColdFire startGreg Ungerer1-8/+8
2011-03-15m68knommu: remove use of MBAR in old-style ColdFire timerGreg Ungerer1-0/+3
2011-03-15m68knommu: move ColdFire DMA register addresses to per-cpu headersGreg Ungerer1-0/+3
2011-01-05m68knommu: create bit definitions for the version 2 ColdFire cache controllerGreg Ungerer1-0/+2
2011-01-05m68knommu: move UART addressing to part specific includesGreg Ungerer1-1/+9
2011-01-05m68knommu: fix clock rate value reported for ColdFire 54xx partsGreg Ungerer1-1/+2
2011-01-05m68knommu: move ColdFire CPU names into their headersGreg Ungerer1-0/+1
2009-09-16m68knommu: simplify ColdFire "timers" clock initializationGreg Ungerer1-6/+7
2009-09-16m68knommu: merge old ColdFire interrupt controller masking macrosGreg Ungerer1-13/+3
2009-09-10generic GPIO support for the Freescale Coldfire 5206.sfking@fdwdc.com1-2/+8
2009-01-16m68k,m68knommu: merge header filesSam Ravnborg1-0/+131
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