summaryrefslogtreecommitdiff
path: root/arch/arm
AgeCommit message (Collapse)AuthorFilesLines
2024-08-20ARM: 9411/1: Switch over to GENERIC_CPU_DEVICES using arch_register_cpu()Jinjie Ruan3-12/+5
Currently, almost all architectures have switched to GENERIC_CPU_DEVICES, except for arm32. Also switch over to GENERIC_CPU_DEVICES, and provide an arch_register_cpu() that populates the hotpluggable flag for arm32. The struct cpu in struct cpuinfo_arm is never used directly, remove it to use the one GENERIC_CPU_DEVICES provides. This also has the effect of moving the registration of CPUs from subsys to driver core initialisation, prior to any initcalls running. Signed-off-by: Jinjie Ruan <ruanjinjie@huawei.com> Signed-off-by: Russell King (Oracle) <rmk+kernel@armlinux.org.uk>
2024-08-20ARM: 9410/1: vfp: Use asm volatile in fmrx/fmxr macrosCalvin Owens1-22/+26
Floating point instructions in userspace can crash some arm kernels built with clang/LLD 17.0.6: BUG: unsupported FP instruction in kernel mode FPEXC == 0xc0000780 Internal error: Oops - undefined instruction: 0 [#1] ARM CPU: 0 PID: 196 Comm: vfp-reproducer Not tainted 6.10.0 #1 Hardware name: BCM2835 PC is at vfp_support_entry+0xc8/0x2cc LR is at do_undefinstr+0xa8/0x250 pc : [<c0101d50>] lr : [<c010a80c>] psr: a0000013 sp : dc8d1f68 ip : 60000013 fp : bedea19c r10: ec532b17 r9 : 00000010 r8 : 0044766c r7 : c0000780 r6 : ec532b17 r5 : c1c13800 r4 : dc8d1fb0 r3 : c10072c4 r2 : c0101c88 r1 : ec532b17 r0 : 0044766c Flags: NzCv IRQs on FIQs on Mode SVC_32 ISA ARM Segment none Control: 00c5387d Table: 0251c008 DAC: 00000051 Register r0 information: non-paged memory Register r1 information: vmalloc memory Register r2 information: non-slab/vmalloc memory Register r3 information: non-slab/vmalloc memory Register r4 information: 2-page vmalloc region Register r5 information: slab kmalloc-cg-2k Register r6 information: vmalloc memory Register r7 information: non-slab/vmalloc memory Register r8 information: non-paged memory Register r9 information: zero-size pointer Register r10 information: vmalloc memory Register r11 information: non-paged memory Register r12 information: non-paged memory Process vfp-reproducer (pid: 196, stack limit = 0x61aaaf8b) Stack: (0xdc8d1f68 to 0xdc8d2000) 1f60: 0000081f b6f69300 0000000f c10073f4 c10072c4 dc8d1fb0 1f80: ec532b17 0c532b17 0044766c b6f9ccd8 00000000 c010a80c 00447670 60000010 1fa0: ffffffff c1c13800 00c5387d c0100f10 b6f68af8 00448fc0 00000000 bedea188 1fc0: bedea314 00000001 00448ebc b6f9d000 00447608 b6f9ccd8 00000000 bedea19c 1fe0: bede9198 bedea188 b6e1061c 0044766c 60000010 ffffffff 00000000 00000000 Call trace: [<c0101d50>] (vfp_support_entry) from [<c010a80c>] (do_undefinstr+0xa8/0x250) [<c010a80c>] (do_undefinstr) from [<c0100f10>] (__und_usr+0x70/0x80) Exception stack(0xdc8d1fb0 to 0xdc8d1ff8) 1fa0: b6f68af8 00448fc0 00000000 bedea188 1fc0: bedea314 00000001 00448ebc b6f9d000 00447608 b6f9ccd8 00000000 bedea19c 1fe0: bede9198 bedea188 b6e1061c 0044766c 60000010 ffffffff Code: 0a000061 e3877202 e594003c e3a09010 (eef16a10) ---[ end trace 0000000000000000 ]--- Kernel panic - not syncing: Fatal exception in interrupt ---[ end Kernel panic - not syncing: Fatal exception in interrupt ]--- This is a minimal userspace reproducer on a Raspberry Pi Zero W: #include <stdio.h> #include <math.h> int main(void) { double v = 1.0; printf("%fn", NAN + *(volatile double *)&v); return 0; } Another way to consistently trigger the oops is: calvin@raspberry-pi-zero-w ~$ python -c "import json" The bug reproduces only when the kernel is built with DYNAMIC_DEBUG=n, because the pr_debug() calls act as barriers even when not activated. This is the output from the same kernel source built with the same compiler and DYNAMIC_DEBUG=y, where the userspace reproducer works as expected: VFP: bounce: trigger ec532b17 fpexc c0000780 VFP: emulate: INST=0xee377b06 SCR=0x00000000 VFP: bounce: trigger eef1fa10 fpexc c0000780 VFP: emulate: INST=0xeeb40b40 SCR=0x00000000 VFP: raising exceptions 30000000 calvin@raspberry-pi-zero-w ~$ ./vfp-reproducer nan Crudely grepping for vmsr/vmrs instructions in the otherwise nearly idential text for vfp_support_entry() makes the problem obvious: vmlinux.llvm.good [0xc0101cb8] <+48>: vmrs r7, fpexc vmlinux.llvm.good [0xc0101cd8] <+80>: vmsr fpexc, r0 vmlinux.llvm.good [0xc0101d20] <+152>: vmsr fpexc, r7 vmlinux.llvm.good [0xc0101d38] <+176>: vmrs r4, fpexc vmlinux.llvm.good [0xc0101d6c] <+228>: vmrs r0, fpscr vmlinux.llvm.good [0xc0101dc4] <+316>: vmsr fpexc, r0 vmlinux.llvm.good [0xc0101dc8] <+320>: vmrs r0, fpsid vmlinux.llvm.good [0xc0101dcc] <+324>: vmrs r6, fpscr vmlinux.llvm.good [0xc0101e10] <+392>: vmrs r10, fpinst vmlinux.llvm.good [0xc0101eb8] <+560>: vmrs r10, fpinst2 vmlinux.llvm.bad [0xc0101cb8] <+48>: vmrs r7, fpexc vmlinux.llvm.bad [0xc0101cd8] <+80>: vmsr fpexc, r0 vmlinux.llvm.bad [0xc0101d20] <+152>: vmsr fpexc, r7 vmlinux.llvm.bad [0xc0101d30] <+168>: vmrs r0, fpscr vmlinux.llvm.bad [0xc0101d50] <+200>: vmrs r6, fpscr <== BOOM! vmlinux.llvm.bad [0xc0101d6c] <+228>: vmsr fpexc, r0 vmlinux.llvm.bad [0xc0101d70] <+232>: vmrs r0, fpsid vmlinux.llvm.bad [0xc0101da4] <+284>: vmrs r10, fpinst vmlinux.llvm.bad [0xc0101df8] <+368>: vmrs r4, fpexc vmlinux.llvm.bad [0xc0101e5c] <+468>: vmrs r10, fpinst2 I think LLVM's reordering is valid as the code is currently written: the compiler doesn't know the instructions have side effects in hardware. Fix by using "asm volatile" in fmxr() and fmrx(), so they cannot be reordered with respect to each other. The original compiler now produces working kernels on my hardware with DYNAMIC_DEBUG=n. This is the relevant piece of the diff of the vfp_support_entry() text, from the original oopsing kernel to a working kernel with this patch: vmrs r0, fpscr tst r0, #4096 bne 0xc0101d48 tst r0, #458752 beq 0xc0101ecc orr r7, r7, #536870912 ldr r0, [r4, #0x3c] mov r9, #16 -vmrs r6, fpscr orr r9, r9, #251658240 add r0, r0, #4 str r0, [r4, #0x3c] mvn r0, #159 sub r0, r0, #-1207959552 and r0, r7, r0 vmsr fpexc, r0 vmrs r0, fpsid +vmrs r6, fpscr and r0, r0, #983040 cmp r0, #65536 bne 0xc0101d88 Fixes: 4708fb041346 ("ARM: vfp: Reimplement VFP exception entry in C code") Signed-off-by: Calvin Owens <calvin@wbinvd.org> Signed-off-by: Russell King (Oracle) <rmk+kernel@armlinux.org.uk>
2024-08-20ARM: 9409/1: mmu: Do not use magic number for TTBCR settingsLinus Walleij2-2/+9
The code in early_paging_init is directly masking off bits 8, 9, 10 and 11 to temporarily disable caching of the translation tables. There is some exlanations in the comment, but use some defines instead of magic numbers so ut becomes more evident what is going on. Change the type of the register to u32 since these are indeed unsigned 32bit registers, and use a temporary variable instead of baking too much into the inline assembly call to increase readability. Signed-off-by: Linus Walleij <linus.walleij@linaro.org> Signed-off-by: Russell King (Oracle) <rmk+kernel@armlinux.org.uk>
2024-08-20ARM: dts: aspeed: System1: Updates to BMC boardNinad Palsule1-3/+3
- Changed temperature sensor monitor chip from tmp423 to tmp432 Signed-off-by: Ninad Palsule <ninad@linux.ibm.com> Reviewed-by: Eddie James <eajames@linux.ibm.com> Link: https://lore.kernel.org/r/20240605160604.2135840-1-ninad@linux.ibm.com Signed-off-by: Andrew Jeffery <andrew@codeconstruct.com.au>
2024-08-20ARM: dts: aspeed: convert ASRock SPC621D8HM3 NVMEM content to layout syntaxRafał Miłecki1-4/+8
Use cleaner (and non-deprecated) bindings syntax. See commit bd912c991d2e ("dt-bindings: nvmem: layouts: add fixed-layout") for details. Signed-off-by: Rafał Miłecki <rafal@milecki.pl> Acked-by: Zev Weiss <zev@bewilderbeest.net> Link: https://lore.kernel.org/r/20240520063044.4885-1-zajec5@gmail.com Signed-off-by: Andrew Jeffery <andrew@codeconstruct.com.au>
2024-08-20ARM: dts: aspeed: Add IBM P11 Fuji BMC systemEddie James2-0/+3882
Add the device tree for the new BMC system. The Fuji is a P11 system with eight processors. Signed-off-by: Eddie James <eajames@linux.ibm.com> Reviewed-by: Ninad Palsule <ninad@linux.ibm.com> Link: https://lore.kernel.org/r/20240522192524.3286237-17-eajames@linux.ibm.com Signed-off-by: Andrew Jeffery <andrew@codeconstruct.com.au>
2024-08-20ARM: dts: aspeed: Add IBM P11 Blueridge 4U BMC systemEddie James1-0/+21
The 4U Blueridge is identical to the Blueridge system but has two extra power supplies. Signed-off-by: Eddie James <eajames@linux.ibm.com> Reviewed-by: Ninad Palsule <ninad@linux.ibm.com> Link: https://lore.kernel.org/r/20240522192524.3286237-16-eajames@linux.ibm.com Signed-off-by: Andrew Jeffery <andrew@codeconstruct.com.au>
2024-08-20ARM: dts: aspeed: Add IBM P11 Blueridge BMC systemEddie James2-0/+1692
Add the device tree for the new BMC system. The Blueridge is a P11 system with four processors. Signed-off-by: Eddie James <eajames@linux.ibm.com> Reviewed-by: Ninad Palsule <ninad@linux.ibm.com> Link: https://lore.kernel.org/r/20240522192524.3286237-15-eajames@linux.ibm.com Signed-off-by: Andrew Jeffery <andrew@codeconstruct.com.au>
2024-08-20ARM: dts: aspeed: Add IBM P11 FSI devicesEddie James1-0/+1539
Add the P11 FSI device tree for use in upcoming BMC systems. Unlike P10, there is no system with only two processors, so only the quad processor FSI layout is necessary. Signed-off-by: Eddie James <eajames@linux.ibm.com> Reviewed-by: Ninad Palsule <ninad@linux.ibm.com> Link: https://lore.kernel.org/r/20240522192524.3286237-14-eajames@linux.ibm.com Signed-off-by: Andrew Jeffery <andrew@codeconstruct.com.au>
2024-08-19ARM: s3c: remove unused s3c2410_cpu_suspend() declarationGaosheng Cui1-2/+0
The s3c2410_cpu_suspend() has been removed since commit 61b7f8920b17 ("ARM: s3c: remove all s3c24xx support"), so remove it. Signed-off-by: Gaosheng Cui <cuigaosheng1@huawei.com> Link: https://lore.kernel.org/r/20240813105545.1180788-3-cuigaosheng1@huawei.com Fixes: 61b7f8920b17 ("ARM: s3c: remove all s3c24xx support") Signed-off-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org>
2024-08-19ARM: s3c: remove unused declarations for s3c6400Gaosheng Cui1-11/+0
These declarations for s3c6400 have been removed since commit 6bac4f78ea3d ("ARM: s3c: remove s3c6400 support"), so remove it. Signed-off-by: Gaosheng Cui <cuigaosheng1@huawei.com> Link: https://lore.kernel.org/r/20240813105545.1180788-2-cuigaosheng1@huawei.com Fixes: 6bac4f78ea3d ("ARM: s3c: remove s3c6400 support") Signed-off-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org>
2024-08-19ARM: s3c: Remove unused s3c_init_uart_irqs() declarationGaosheng Cui1-2/+0
The s3c_init_uart_irqs() has not been used since commit 2a8d7bddf273 ("ARM: SAMSUNG: Remove uart irq handling from plaform code"), so remove it. Signed-off-by: Gaosheng Cui <cuigaosheng1@huawei.com> Link: https://lore.kernel.org/r/20240813105037.1178393-1-cuigaosheng1@huawei.com Fixes: 2a8d7bddf273 ("ARM: SAMSUNG: Remove uart irq handling from plaform code") Signed-off-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org>
2024-08-19ARM: davinci: remove unused cpuidle codeBartosz Golaszewski4-116/+0
The cpuidle driver in mach-davinci is no longer used by anyone. Remove it. Link: https://lore.kernel.org/r/20240813082735.52402-1-brgl@bgdev.pl Signed-off-by: Bartosz Golaszewski <bartosz.golaszewski@linaro.org>
2024-08-19ARM: dts: microchip: sama5d29_curiosity: Add reg_5v to supply PMIC nodesAndrei Simion1-0/+13
Align with the datasheet by adding regulator-5v which supplies each node from the regulator using phandle to regulator-5v through pvin[1-4]-supply and lvin-supply. Co-developed-by: Mihai Sain <mihai.sain@microchip.com> Signed-off-by: Mihai Sain <mihai.sain@microchip.com> Signed-off-by: Andrei Simion <andrei.simion@microchip.com> Link: https://lore.kernel.org/r/20240812135231.43744-8-andrei.simion@microchip.com Signed-off-by: Claudiu Beznea <claudiu.beznea@tuxon.dev>
2024-08-19ARM: dts: microchip: at91-sama5d27_wlsom1: Add reg_5v to supply PMIC nodesAndrei Simion1-0/+13
Align with the datasheet by adding regulator-5v which supplies each node from the regulator using phandle to regulator-5v through pvin[1-4]-supply and lvin-supply. Co-developed-by: Mihai Sain <mihai.sain@microchip.com> Signed-off-by: Mihai Sain <mihai.sain@microchip.com> Signed-off-by: Andrei Simion <andrei.simion@microchip.com> Link: https://lore.kernel.org/r/20240812135231.43744-7-andrei.simion@microchip.com Signed-off-by: Claudiu Beznea <claudiu.beznea@tuxon.dev>
2024-08-19ARM: dts: microchip: at91-sama5d2_icp: Add reg_5v to supply PMIC nodesAndrei Simion1-0/+13
Align with the datasheet by adding regulator-5v which supplies each node from the regulator using phandle to regulator-5v through pvin[1-4]-supply and lvin-supply. Co-developed-by: Mihai Sain <mihai.sain@microchip.com> Signed-off-by: Mihai Sain <mihai.sain@microchip.com> Signed-off-by: Andrei Simion <andrei.simion@microchip.com> Link: https://lore.kernel.org/r/20240812135231.43744-6-andrei.simion@microchip.com Signed-off-by: Claudiu Beznea <claudiu.beznea@tuxon.dev>
2024-08-19ARM: dts: microchip: at91-sama7g54_curiosity: Add reg_5v to supply PMIC nodesAndrei Simion1-0/+13
Align with the datasheet by adding regulator-5v which supplies each node from the regulator using phandle to regulator-5v through pvin[1-4]-supply and lvin-supply. Co-developed-by: Mihai Sain <mihai.sain@microchip.com> Signed-off-by: Mihai Sain <mihai.sain@microchip.com> Signed-off-by: Andrei Simion <andrei.simion@microchip.com> Link: https://lore.kernel.org/r/20240812135231.43744-5-andrei.simion@microchip.com Signed-off-by: Claudiu Beznea <claudiu.beznea@tuxon.dev>
2024-08-19ARM: dts: microchip: at91-sama7g5ek: Add reg_5v to supply PMIC nodesAndrei Simion1-0/+13
Align with the datasheet by adding regulator-5v which supplies each node from the regulator using phandle to regulator-5v through pvin[1-4]-supply and lvin-supply. Co-developed-by: Mihai Sain <mihai.sain@microchip.com> Signed-off-by: Mihai Sain <mihai.sain@microchip.com> Signed-off-by: Andrei Simion <andrei.simion@microchip.com> Link: https://lore.kernel.org/r/20240812135231.43744-4-andrei.simion@microchip.com Signed-off-by: Claudiu Beznea <claudiu.beznea@tuxon.dev>
2024-08-17crypto: arm/aes-neonbs - go back to using aes-arm directlyEric Biggers4-96/+67
In aes-neonbs, instead of going through the crypto API for the parts that the bit-sliced AES code doesn't handle, namely AES-CBC encryption and single-block AES, just call the ARM scalar AES cipher directly. This basically goes back to the original approach that was used before commit b56f5cbc7e08 ("crypto: arm/aes-neonbs - resolve fallback cipher at runtime"). Calling the ARM scalar AES cipher directly is faster, simpler, and avoids any chance of bugs specific to the use of fallback ciphers such as module loading deadlocks which have happened twice. The deadlocks turned out to be fixable in other ways, but there's no need to rely on anything so fragile in the first place. The rationale for the above-mentioned commit was to allow people to choose to use a time-invariant AES implementation for the fallback cipher. There are a couple problems with that rationale, though: - In practice the ARM scalar AES cipher (aes-arm) was used anyway, since it has a higher priority than aes-fixed-time. Users *could* go out of their way to disable or blacklist aes-arm, or to lower its priority using NETLINK_CRYPTO, but very few users customize the crypto API to this extent. Systems with the ARMv8 Crypto Extensions used aes-ce, but the bit-sliced algorithms are irrelevant on such systems anyway. - Since commit 913a3aa07d16 ("crypto: arm/aes - add some hardening against cache-timing attacks"), the ARM scalar AES cipher is partially hardened against cache-timing attacks. It actually works like aes-fixed-time, in that it disables interrupts and prefetches its lookup table. It does use a larger table than aes-fixed-time, but even so, it is not clear that aes-fixed-time is meaningfully more time-invariant than aes-arm. And of course, the real solution for time-invariant AES is to use a CPU that supports AES instructions. Signed-off-by: Eric Biggers <ebiggers@google.com> Signed-off-by: Herbert Xu <herbert@gondor.apana.org.au>
2024-08-16perf: arm_pmuv3: Add support for Armv9.4 PMU instruction counterRob Herring (Arm)1-0/+20
Armv9.4/8.9 PMU adds optional support for a fixed instruction counter similar to the fixed cycle counter. Support for the feature is indicated in the ID_AA64DFR1_EL1 register PMICNTR field. The counter is not accessible in AArch32. Existing userspace using direct counter access won't know how to handle the fixed instruction counter, so we have to avoid using the counter when user access is requested. Acked-by: Mark Rutland <mark.rutland@arm.com> Signed-off-by: Rob Herring (Arm) <robh@kernel.org> Tested-by: James Clark <james.clark@linaro.org> Link: https://lore.kernel.org/r/20240731-arm-pmu-3-9-icntr-v3-7-280a8d7ff465@kernel.org Signed-off-by: Will Deacon <will@kernel.org>
2024-08-15ARM: dts: qcom: add generic compat string to RPM glink channelsDmitry Baryshkov3-3/+3
Add the generic qcom,smd-rpm compatible to RPM nodes to follow the schema. Signed-off-by: Dmitry Baryshkov <dmitry.baryshkov@linaro.org> Reviewed-by: Konrad Dybcio <konradybcio@kernel.org> Link: https://lore.kernel.org/r/20240729-fix-smd-rpm-v2-4-0776408a94c5@linaro.org Signed-off-by: Bjorn Andersson <andersson@kernel.org>
2024-08-15ARM: dts: qcom: msm8226-microsoft-common: Add inertial sensorsRayyan Ansari3-0/+32
Add nodes for the Asahi Kasei AK09911 magnetometer and the Kionix KX022-1020 accelerometer, both of which are connected over i2c2, in the common device tree for msm8x26 Lumias. Moneypenny (Lumia 630) does not have a magnetometer, and so the node is deleted. Tesla's (Lumia 830's) magnetometer is currently unknown. Signed-off-by: Rayyan Ansari <rayyan@ansari.sh> Reviewed-by: Konrad Dybcio <konrad.dybcio@linaro.org> Link: https://lore.kernel.org/r/20240714173431.54332-4-rayyan@ansari.sh Signed-off-by: Bjorn Andersson <andersson@kernel.org>
2024-08-15ARM: dts: qcom: msm8226: Convert APCS usages to mbox interfaceLuca Weiss1-3/+3
Since we now have the apcs set up as a mailbox provider, let's use the interface for all drivers where possible. Signed-off-by: Luca Weiss <luca@lucaweiss.eu> Reviewed-by: Dmitry Baryshkov <dmitry.baryshkov@linaro.org> Reviewed-by: Konrad Dybcio <konrad.dybcio@linaro.org> Link: https://lore.kernel.org/r/20240619-msm8226-cpufreq-v1-7-85143f5291d1@lucaweiss.eu Signed-off-by: Bjorn Andersson <andersson@kernel.org>
2024-08-15ARM: dts: qcom: msm8226: Hook up CPU coolingLuca Weiss1-0/+25
Add cooling-maps for the CPU thermal zones so the driver can actually do something when the CPU temperature rises too much. Signed-off-by: Luca Weiss <luca@lucaweiss.eu> Reviewed-by: Konrad Dybcio <konrad.dybcio@linaro.org> Reviewed-by: Dmitry Baryshkov <dmitry.baryshkov@linaro.org> Link: https://lore.kernel.org/r/20240619-msm8226-cpufreq-v1-6-85143f5291d1@lucaweiss.eu Signed-off-by: Bjorn Andersson <andersson@kernel.org>
2024-08-15ARM: dts: qcom: msm8226: Add CPU frequency scaling supportLuca Weiss1-3/+100
Add a node for the a7pll with its frequencies. With this we can use the apcs-kpss-global driver for the apcs node and use the apcs to scale the CPU frequency according to the opp-table. At the same time unfortunately we need to provide the gcc node xo_board instead of the XO via rpmcc since otherwise we'll have a circular dependency between apcs, gcc and the rpm. Signed-off-by: Luca Weiss <luca@lucaweiss.eu> Link: https://lore.kernel.org/r/20240619-msm8226-cpufreq-v1-5-85143f5291d1@lucaweiss.eu Signed-off-by: Bjorn Andersson <andersson@kernel.org>
2024-08-13ARM: dts: bcm2837/bcm2712: adjust local intc node namesStefan Wahren1-1/+1
After converting the bcm2836-l1-intc DT binding to YAML, the DT schema checks gave warnings like: 'local_intc@40000000' does not match '^interrupt-controller(@[0-9a-f,]+)*$' So fix them accordingly. Signed-off-by: Stefan Wahren <wahrenst@gmx.net> Link: https://lore.kernel.org/r/20240812200358.4061-4-wahrenst@gmx.net Signed-off-by: Florian Fainelli <florian.fainelli@broadcom.com>
2024-08-13ARM: riscpc: ecard: Fix the buildBart Van Assche1-1/+1
Fix a recently introduced build failure. Cc: Russell King <rmk+kernel@armlinux.org.uk> Fixes: d69d80484598 ("driver core: have match() callback in struct bus_type take a const *") Signed-off-by: Bart Van Assche <bvanassche@acm.org> Link: https://lore.kernel.org/r/20240805232026.65087-2-bvanassche@acm.org Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
2024-08-13ARM: dts: imx1/imx27: Use dma-controller as node nameFabio Estevam2-2/+2
According to fsl,imx-dma.yaml, the node name must be dma-controller. Change it accordingly to fix the following dt-schema warnings: 'dma@10001000' does not match '^dma-controller(@.*)?$' Signed-off-by: Fabio Estevam <festevam@denx.de> Signed-off-by: Shawn Guo <shawnguo@kernel.org>
2024-08-13ARM: davinci: remove unused davinci_init_ide() declarationGaosheng Cui1-1/+0
The davinci_init_ide() has been removed since commit 2af4fcc0d357 ("ARM: davinci: remove unused board support"), so remove it. Signed-off-by: Gaosheng Cui <cuigaosheng1@huawei.com> Link: https://lore.kernel.org/r/20240813071640.1047137-3-cuigaosheng1@huawei.com Signed-off-by: Bartosz Golaszewski <bartosz.golaszewski@linaro.org>
2024-08-13ARM: davinci: remove unused davinci_cfg_reg_list() declarationGaosheng Cui1-5/+0
The davinci_cfg_reg_list() has been removed since commit dec85a95167a ("ARM: davinci: clean up platform support"), so remove it. Signed-off-by: Gaosheng Cui <cuigaosheng1@huawei.com> Link: https://lore.kernel.org/r/20240813071640.1047137-2-cuigaosheng1@huawei.com Signed-off-by: Bartosz Golaszewski <bartosz.golaszewski@linaro.org>
2024-08-13introduce fd_file(), convert all accessors to it.Al Viro1-5/+5
For any changes of struct fd representation we need to turn existing accesses to fields into calls of wrappers. Accesses to struct fd::flags are very few (3 in linux/file.h, 1 in net/socket.c, 3 in fs/overlayfs/file.c and 3 more in explicit initializers). Those can be dealt with in the commit converting to new layout; accesses to struct fd::file are too many for that. This commit converts (almost) all of f.file to fd_file(f). It's not entirely mechanical ('file' is used as a member name more than just in struct fd) and it does not even attempt to distinguish the uses in pointer context from those in boolean context; the latter will be eventually turned into a separate helper (fd_empty()). NOTE: mass conversion to fd_empty(), tempting as it might be, is a bad idea; better do that piecewise in commit that convert from fdget...() to CLASS(...). [conflicts in fs/fhandle.c, kernel/bpf/syscall.c, mm/memcontrol.c caught by git; fs/stat.c one got caught by git grep] [fs/xattr.c conflict] Reviewed-by: Christian Brauner <brauner@kernel.org> Signed-off-by: Al Viro <viro@zeniv.linux.org.uk>
2024-08-12ARM: dts: imx6dl-yapp43: Increase LED current to match the yapp4 HW designMichal Vokáč1-6/+6
On the imx6dl-yapp4 revision based boards, the RGB LED is not driven directly by the LP5562 driver but through FET transistors. Hence the LED current is not determined by the driver but by the LED series resistors. On the imx6dl-yapp43 revision based boards, we removed the FET transistors to drive the LED directly from the LP5562 but forgot to tune the output current to match the previous HW design. Set the LED current on imx6dl-yapp43 based boards to the same values measured on the imx6dl-yapp4 boards and limit the maximum current to 20mA. Fixes: 7da4734751e0 ("ARM: dts: imx6dl-yapp43: Add support for new HW revision of the IOTA board") Cc: <stable@vger.kernel.org> Signed-off-by: Michal Vokáč <michal.vokac@ysoft.com> Signed-off-by: Shawn Guo <shawnguo@kernel.org>
2024-08-12ARM: dts: imx53-qsb-hdmi: Merge display0 nodeLiu Ying1-2/+0
It's not necessary to split display0 node. Merge it to save two lines. Signed-off-by: Liu Ying <victor.liu@nxp.com> Signed-off-by: Shawn Guo <shawnguo@kernel.org>
2024-08-12ARM: dts: imx53-qsb-hdmi: Do not disable TVELiu Ying1-4/+0
SII9022 and TVE are connected with IPU DI0 and IPU DI1 respectively, so they are in two different display pipelines and may run simultaneously. Keep TVE being enabled as imx53-qsb-common.dtsi does by not setting it's status property to "disabled". Fixes: eeb403df953f ("ARM: dts: imx53-qsb: add support for the HDMI expander") Signed-off-by: Liu Ying <victor.liu@nxp.com> Signed-off-by: Shawn Guo <shawnguo@kernel.org>
2024-08-12ARM: dts: nuvoton: wpcm450: align LED and GPIO keys node name with bindingsKrzysztof Kozlowski1-3/+3
Bindings expect the LED and GPIO keys node names to follow certain pattern, see dtbs_check warnings: nuvoton-wpcm450-supermicro-x9sci-ln4f.dtb: gpio-keys: 'uid' does not match any of the regexes: '^(button|event|key|switch|(button|event|key|switch)... Reviewed-by: Jonathan Neuschäfer <j.neuschaefer@gmx.net> Link: https://lore.kernel.org/r/20240701164915.577068-1-krzysztof.kozlowski@linaro.org Signed-off-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org>
2024-08-12arm: dts: realview: Add/drop missing/spurious unit-addresesRob Herring (Arm)4-4/+4
Various nodes on the Arm Realview boards have missing or spurious unit-addresses. Signed-off-by: Rob Herring (Arm) <robh@kernel.org> Reviewed-by: Linus Walleij <linus.walleij@linaro.org> Link: https://lore.kernel.org/r/20240528191510.1444068-1-robh@kernel.org Signed-off-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org>
2024-08-09Merge tag 'arm-fixes-6.11-1' of ↵Linus Torvalds1-4/+7
git://git.kernel.org/pub/scm/linux/kernel/git/soc/soc Pull ARM SoC fixes from Arnd Bergmann: "There are three sets of patches for the soc tree: - Marek Behún addresses multiple build time regressions caused by changes to the cznic turris-omnia support - Dmitry Torokhov fixes a regression in the legacy "gumstix" board code he cleaned up earlier - The TI K3 maintainers found multiple bugs in the in gpio, audio and pcie devicetree nodes" * tag 'arm-fixes-6.11-1' of git://git.kernel.org/pub/scm/linux/kernel/git/soc/soc: ARM: pxa/gumstix: fix attaching properties to vbus gpio device doc: platform: cznic: turris-omnia-mcu: Use double backticks for attribute value doc: platform: cznic: turris-omnia-mcu: Fix sphinx-build warning platform: cznic: turris-omnia-mcu: Make GPIO code optional platform: cznic: turris-omnia-mcu: Make poweroff and wakeup code optional platform: cznic: turris-omnia-mcu: Make TRNG code optional platform: cznic: turris-omnia-mcu: Make watchdog code optional arm64: dts: ti: k3-j784s4-main: Correct McASP DMAs arm64: dts: ti: k3-j722s: Fix gpio-range for main_pmx0 arm64: dts: ti: k3-am62p: Fix gpio-range for main_pmx0 arm64: dts: ti: k3-am62p: Add gpio-ranges for mcu_gpio0 arm64: dts: ti: k3-am62-verdin-dahlia: Keep CTRL_SLEEP_MOCI# regulator on arm64: dts: ti: k3-j784s4-evm: Consolidate serdes0 references arm64: dts: ti: k3-j784s4-evm: Assign only lanes 0 and 1 to PCIe1
2024-08-08ARM: dts: microchip: at91: align LED node name with bindingsKrzysztof Kozlowski4-19/+19
Bindings expect the LED node names to follow certain pattern, see dtbs_check warnings: at91sam9g15ek.dtb: leds: 'pb18', 'pd21' do not match any of the regexes: '(^led-[0-9a-f]$|led)', 'pinctrl-[0-9]+' Signed-off-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org> Reviewed-by: Alexander Dahl <ada@thorsis.com> Link: https://lore.kernel.org/r/20240701164952.577277-1-krzysztof.kozlowski@linaro.org Signed-off-by: Claudiu Beznea <claudiu.beznea@tuxon.dev>
2024-08-08ARM: dts: microchip: sam9x60: Move i2c address/size to dtsiAlexander Dahl3-6/+26
These properties are common for all i2c subnodes. Allows to add i2c device nodes (like an rtc for example) in other .dts files including sam9x60.dtsi without requiring to repeat these properties for each i2c device again and again. Found on a custom board after adding this in .dts: &flx5 { atmel,flexcom-mode = <ATMEL_FLEXCOM_MODE_TWI>; status = "okay"; i2c5: i2c@600 { pinctrl-0 = <&pinctrl_flx5_default>; status = "okay"; pcf8523: rtc@68 { compatible = "nxp,pcf8523"; reg = <0x68>; }; }; }; … which created a warning like this: […]:236.4-17: Warning (reg_format): /ahb/apb/flexcom@f0004000/i2c@600/rtc@68:reg: property has invalid length (4 bytes) (#address-cells == 2, #size-cells == 1) […]: Warning (pci_device_reg): Failed prerequisite 'reg_format' […]: Warning (pci_device_bus_num): Failed prerequisite 'reg_format' […]: Warning (simple_bus_reg): Failed prerequisite 'reg_format' […]/linux-6.6.25/arch/arm/boot/dts/microchip/sam9x60.dtsi:283.19-299.7: Warning (i2c_bus_bridge): /ahb/apb/flexcom@f0004000/i2c@600: incorrect #address-cells for I2C bus also defined at […]:228.16-238.4 […]/linux-6.6.25/arch/arm/boot/dts/microchip/sam9x60.dtsi:283.19-299.7: Warning (i2c_bus_bridge): /ahb/apb/flexcom@f0004000/i2c@600: incorrect #size-cells for I2C bus also defined at […]:228.16-238.4 […]: Warning (i2c_bus_reg): Failed prerequisite 'reg_format' […]: Warning (i2c_bus_reg): Failed prerequisite 'i2c_bus_bridge' […]: Warning (spi_bus_reg): Failed prerequisite 'reg_format' […]:234.19-237.5: Warning (avoid_default_addr_size): /ahb/apb/flexcom@f0004000/i2c@600/rtc@68: Relying on default #address-cells value […]:234.19-237.5: Warning (avoid_default_addr_size): /ahb/apb/flexcom@f0004000/i2c@600/rtc@68: Relying on default #size-cells value […]: Warning (avoid_unnecessary_addr_size): Failed prerequisite 'avoid_default_addr_size' […]: Warning (unique_unit_address): Failed prerequisite 'avoid_default_addr_size' This probably should have been done with commit 84f23f3284d5 ("ARM: dts: at91: sam9x60: move flexcom definitions") already, where those address-cells and size-cells properties were left in the board .dts files instead of moving them to the dtsi. Signed-off-by: Alexander Dahl <ada@thorsis.com> Acked-by: Nicolas Ferre <nicolas.ferre@microchip.com> Link: https://lore.kernel.org/r/20240528153109.439407-1-ada@thorsis.com [claudiu.beznea: adjusted commit message as the properties are not required anymore] Signed-off-by: Claudiu Beznea <claudiu.beznea@tuxon.dev>
2024-08-07ARM: at91: Kconfig: add config flag for SAM9X7 SoCVarshini Rajendran1-3/+19
Add config flag for sam9x7 SoC. Signed-off-by: Varshini Rajendran <varshini.rajendran@microchip.com> Reviewed-by: Claudiu Beznea <claudiu.beznea@tuxon.dev> Link: https://lore.kernel.org/r/20240729070916.1991370-1-varshini.rajendran@microchip.com Signed-off-by: Claudiu Beznea <claudiu.beznea@tuxon.dev>
2024-08-07ARM: at91: pm: add sam9x7 SoC init configVarshini Rajendran2-0/+34
Add SoC init config for sam9x7 family. Signed-off-by: Varshini Rajendran <varshini.rajendran@microchip.com> Reviewed-by: Claudiu Beznea <claudiu.beznea@tuxon.dev> Link: https://lore.kernel.org/r/20240729070705.1990557-1-varshini.rajendran@microchip.com Signed-off-by: Claudiu Beznea <claudiu.beznea@tuxon.dev>
2024-08-07ARM: at91: pm: add support for sam9x7 SoC familyVarshini Rajendran2-0/+31
Add support and pm init config for sam9x7 SoC. Signed-off-by: Varshini Rajendran <varshini.rajendran@microchip.com> Reviewed-by: Claudiu Beznea <claudiu.beznea@microchip.com> Link: https://lore.kernel.org/r/20240729070659.1990506-1-varshini.rajendran@microchip.com Signed-off-by: Claudiu Beznea <claudiu.beznea@tuxon.dev>
2024-08-07ARM: configs: at91: enable config flags for sam9x7 SoC familyVarshini Rajendran1-0/+1
Enable config flags for SAM9X7 SoC for the sam9x7 SoC family. Signed-off-by: Varshini Rajendran <varshini.rajendran@microchip.com> Reviewed-by: Claudiu Beznea <claudiu.beznea@tuxon.dev> Link: https://lore.kernel.org/r/20240729070923.1991418-1-varshini.rajendran@microchip.com Signed-off-by: Claudiu Beznea <claudiu.beznea@tuxon.dev>
2024-08-07ARM: dts: microchip: at91-sama7g5ek: add EEPROMsClaudiu Beznea1-0/+40
The main boot sequence for Microchip AT91 devices is one of the following: 1/ ROM BOOT -> AT91Bootstrap -> U-Boot -> Linux Kernel 2/ ROM BOOT -> AT91Bootstrap -> Linux Kernel For case 1/ U-Boot is the stage where the Ethernet MAC addresses are set. For case 2/ where U-Boot is skipped the Ethernet MAC addresses need to be configured in Linux. For this add EEPROMs and nvmem-layout to describe EUI48 MAC address regions. Signed-off-by: Claudiu Beznea <claudiu.beznea@microchip.com> [andrei.simion@microchip.com: Add nvmem-layout to describe eui48 mac region. Align compatible name with datasheet. Reword commit message.] Signed-off-by: Andrei Simion <andrei.simion@microchip.com> [claudiu.beznea: adjusted the new commit message] Signed-off-by: Claudiu Beznea <claudiu.beznea@tuxon.dev> Link: https://lore.kernel.org/r/20240703084704.197697-3-andrei.simion@microchip.com
2024-08-07ARM: pxa/gumstix: fix attaching properties to vbus gpio deviceDmitry Torokhov1-4/+7
Commit f1d6588af93b tried to convert GPIO lookup tables to software properties for the vbus gpio device, bit forgot the most important step: actually attaching the new properties to the device. Also fix up the name of the property array to reflect the board name, and add missing gpio/property.h and devices.h includes absence of which causes compile failures on some configurations. Switch "#ifdef CONFIG_USB_PXA25X" to "#if IS_ENABLED(CONFIG_USB_PXA25X)" because it should not matter if the driver is buolt in or a module, it still need vbus controls. Reported-by: Arnd Bergmann <arnd@arndb.de> Fixes: f1d6588af93b ("ARM: pxa/gumstix: convert vbus gpio to use software nodes") Signed-off-by: Dmitry Torokhov <dmitry.torokhov@gmail.com> Signed-off-by: Arnd Bergmann <arnd@arndb.de>
2024-08-05ARM: dts: omap3-n900: correct the accelerometer orientationSicelo A. Mhlongo1-1/+1
Negate the values reported for the accelerometer z-axis in order to match Documentation/devicetree/bindings/iio/mount-matrix.txt. Fixes: 14a213dcb004 ("ARM: dts: n900: use iio driver for accelerometer") Signed-off-by: Sicelo A. Mhlongo <absicsz@gmail.com> Reviewed-By: Andreas Kemnade <andreas@kemnade.info> Link: https://lore.kernel.org/r/20240722113137.3240847-1-absicsz@gmail.com Signed-off-by: Kevin Hilman <khilman@baylibre.com>
2024-08-05ARM: mach-imx: imx6sx: Remove Ethernet refclock settingFabio Estevam1-22/+0
The Ethernet refclock configuration is board specific and should not be harcoded in machine code. Remove it to align with the imx6ul commit e87f3be1c7f8 ("ARM: mach-imx: imx6ul: remove not optional ethernet refclock overwrite"). Clearing bits 13 and 17 of GPR1 is the POR values, so this change does not affect existing boards in mainline. Tested on imx6sx-udoo-neo and imx6sx-sdb boards. Signed-off-by: Fabio Estevam <festevam@denx.de> Signed-off-by: Shawn Guo <shawnguo@kernel.org>
2024-08-05ARM: dts: imx6sx-udoo-neo: Properly configure ENET_REFFabio Estevam1-0/+5
By default, the ENET_REF is configured at 125MHz on i.MX6SX, which works well for boards that operate in RGMII mode. The imx6sx-udoo-neo has a KSZ8091 Ethernet PHY that is connected via RMII interface, so a 50MHz ENET_REF clock is expected. Describe the IMX6SX_CLK_ENET_REF accordingly. Signed-off-by: Fabio Estevam <festevam@denx.de> Signed-off-by: Shawn Guo <shawnguo@kernel.org>
2024-08-04arm: dts: arm: versatile-ab: Fix duplicate clock node nameRob Herring (Arm)1-1/+1
Commit 04f08ef291d4 ("arm/arm64: dts: arm: Use generic clock and regulator nodenames") renamed nodes and created 2 "clock-24000000" nodes (at different paths). The kernel can't handle these duplicate names even though they are at different paths. Fix this by renaming one of the nodes to "clock-pclk". This name is aligned with other Arm boards (those didn't have a known frequency to use in the node name). Fixes: 04f08ef291d4 ("arm/arm64: dts: arm: Use generic clock and regulator nodenames") Reported-by: Guenter Roeck <linux@roeck-us.net> Signed-off-by: Rob Herring (Arm) <robh@kernel.org> Tested-by: Guenter Roeck <linux@roeck-us.net> Reviewed-by: Linus Walleij <linus.walleij@linaro.org> Tested-by: Linus Walleij <linus.walleij@linaro.org> Signed-off-by: Linus Torvalds <torvalds@linux-foundation.org>
2024-08-02ARM: shmobile: defconfig: Enable slab hardening and kmalloc bucketsGeert Uytterhoeven1-0/+1
Enable slab freelist metadata hardening, which in turn enables support for allocation from separate kmalloc buckets. The latter is recommended to be enabled, as per its help text. Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be> Link: https://lore.kernel.org/96fc3f0ed509b6364d8aeb297d5acf4abed18404.1722349907.git.geert+renesas@glider.be