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2017-11-28ARM: dts: am437x-cm-t43: Correct the dmas property of spi0Peter Ujfalusi1-2/+2
The DMA binding for eDMA needs 2 parameters, not 1. The second, missing parameter is the tptc to be used for the channel. Signed-off-by: Peter Ujfalusi <peter.ujfalusi@ti.com> Signed-off-by: Tony Lindgren <tony@atomide.com>
2017-11-28ARM: dts: am4372: Correct the interrupts_properties of McASPPeter Ujfalusi1-2/+4
Fixes the following warnings: arch/arm/boot/dts/am437x-cm-t43.dtb: Warning (interrupts_property): interrupts size is (8), expected multiple of 12 in /ocp@44000000/mcasp@48038000 arch/arm/boot/dts/am437x-cm-t43.dtb: Warning (interrupts_property): interrupts size is (8), expected multiple of 12 in /ocp@44000000/mcasp@4803C000 Signed-off-by: Peter Ujfalusi <peter.ujfalusi@ti.com> Signed-off-by: Tony Lindgren <tony@atomide.com>
2017-11-28ARM: dts: logicpd-somlv: Fix wl127x pinmuxAdam Ford1-5/+9
The pin assignment for the wl127x interrupt was incorrect. I am not sure how this every worked. This also eliminates a conflict with the SMC911x ethernet driver and properly moves pinmuxes for the related gpio to omap3_pmx_wkup from omap3_pmx_core. Fixes: ab8dd3aed011 ("ARM: DTS: Add minimal Support for Logic PD DM3730 SOM-LV") Signed-off-by: Adam Ford <aford173@gmail.com> Signed-off-by: Tony Lindgren <tony@atomide.com>
2017-11-28Merge branch 'soc-fixes' into omap-for-v4.15/fixesTony Lindgren1236-13978/+25981
2017-11-28ARM: dts: logicpd-som-lv: Fix gpmc addresses for NAND and enetAdam Ford2-2/+3
This patch fixes and issue where the NAND and GPMC based ethernet controller stopped working. This also updates the GPMC settings to be consistent with the Logic PD Torpedo development from the commit listed above. Fixes: 44e4716499b8 ("ARM: dts: omap3: Fix NAND device nodes") Signed-off-by: Adam Ford <aford173@gmail.com> Signed-off-by: Tony Lindgren <tony@atomide.com>
2017-11-28ARM: dts: Fix omap4 hang with GPS connected to USB by using wakeupgenTony Lindgren1-2/+0
There's been a reproducable USB OHCI/EHCI cpuidle related hang on omap4 for a while that happens after about 20 - 40 minutes on an idle system with some data feeding device being connected, like a USB GPS device or a cellular modem. This issue happens in cpuidle states C2 and C3 and does not happen if cpuidle is limited to C1 state only. The symptoms are that the whole system hangs and never wakes up from idle, and if a watchdog is configured the system reboots after a while. Turns out that OHCI/EHCI devices on omap4 are trying to use the GIC interrupt controller directly as a parent instead of the WUGEN. We need to pass the interrupts through WUGEN to GIC to provide the wakeup events for the processor. Let's fix the issue by removing the gic interrupt-parent and use the default interrupt-parent wakeupgen instead. Note that omap5.dtsi had this already fixes earlier by commit 7136d457f365 ("ARM: omap: convert wakeupgen to stacked domains") but we somehow missed omap4 at that point. Fixes: 7136d457f365 ("ARM: omap: convert wakeupgen to stacked domains") Cc: Dave Gerlach <d-gerlach@ti.com> Cc: Nishanth Menon <nm@ti.com> Cc: Marc Zyngier <marc.zyngier@arm.com> Cc: Sebastian Reichel <sebastian.reichel@collabora.co.uk> Reviewed-by: Roger Quadros <rogerq@ti.com> Signed-off-by: Tony Lindgren <tony@atomide.com>
2017-11-28ARM: OMAP2+: Missing error code in omap_device_build()Dan Carpenter1-1/+3
We need to set the error code if omap_device_alloc() fails. Signed-off-by: Dan Carpenter <dan.carpenter@oracle.com> Signed-off-by: Tony Lindgren <tony@atomide.com>
2017-11-28ARM: AM33xx: PRM: Remove am33xx_pwrdm_read_prev_pwrst functionKeerthy1-12/+0
Referring TRM Am335X series: http://www.ti.com/lit/ug/spruh73p/spruh73p.pdf The LastPowerStateEntered bitfield is present only for PM_CEFUSE domain. This is not present in any of the other power domains. Hence remove the generic am33xx_pwrdm_read_prev_pwrst hook which wrongly reads the reserved bit fields for all the other power domains. Reading the reserved bits leads to wrongly interpreting the low power transitions for various power domains that do not have the LastPowerStateEntered field. The pm debug counters values are wrong currently as we are incrementing them based on the reserved bits. Signed-off-by: Keerthy <j-keerthy@ti.com> Signed-off-by: Tony Lindgren <tony@atomide.com>
2017-11-28ARM: OMAP2+: Fix SRAM virt to phys translation for save_secure_ram_contextTony Lindgren5-35/+31
With the CMA changes from Joonsoo Kim <iamjoonsoo.kim@lge.com>, it was noticed that n900 stopped booting. After investigating it turned out that n900 save_secure_ram_context does some whacky virtual to physical address translation for the SRAM data address. As we now only have minimal parts of omap3 idle code copied to SRAM, running save_secure_ram_context() in SRAM is not needed. It only gets called on PM init. And it seems there's no need to ever call this from SRAM idle code. So let's just keep save_secure_ram_context() in DDR, and pass it the physical address of the parameters. We can do everything else in omap-secure.c like we already do for other secure code. And since we don't have any documentation, I still have no clue what the values for 0, 1 and 1 for the parameters might be. If somebody has figured it out, please do send a patch to add some comments. Debugged-by: Joonsoo Kim <iamjoonsoo.kim@lge.com> Signed-off-by: Tony Lindgren <tony@atomide.com>
2017-11-27Merge tag 'bcm2835-dt-next-fixes-2017-11-15' into devicetree/fixesFlorian Fainelli1-0/+1
This pull request brings in a fix for a warning that started occuring when dtc from -next got merged. Signed-off-by: Florian Fainelli <f.fainelli@gmail.com>
2017-11-27ARM: dts: NSP: Fix PPI interrupt typesFlorian Fainelli1-2/+2
Booting a kernel results in the kernel warning us about the following PPI interrupts configuration: [ 0.105127] smp: Bringing up secondary CPUs ... [ 0.110545] GIC: PPI11 is secure or misconfigured [ 0.110551] GIC: PPI13 is secure or misconfigured Fix this by using the appropriate edge configuration for PPI11 and PPI13, this is similar to what was fixed for Northstar (BCM5301X) in commit 0e34079cd1f6 ("ARM: dts: BCM5301X: Correct GIC_PPI interrupt flags"). Fixes: 7b2e987de207 ("ARM: NSP: add minimal Northstar Plus device tree") Fixes: 1a9d53cabaf4 ("ARM: dts: NSP: Add TWD Support to DT") Acked-by: Jon Mason <jon.mason@broadcom.com> Signed-off-by: Florian Fainelli <f.fainelli@gmail.com>
2017-11-27ARM: dts: NSP: Disable AHCI controller for HR NSP boardsFlorian Fainelli2-8/+0
The AHCI controller is currently enabled for all of these boards: bcm958623hr and bcm958625hr would result in a hard hang on boot that we cannot get rid of. Since this does not appear to have an easy and simple fix, just disable the AHCI controller for now until this gets resolved. Fixes: 70725d6e97ac ("ARM: dts: NSP: Enable SATA on bcm958625hr") Fixes: d454c3762437 ("ARM: dts: NSP: Add new DT file for bcm958623hr") Acked-by: Jon Mason <jon.mason@broadcom.com> Signed-off-by: Florian Fainelli <f.fainelli@gmail.com>
2017-11-27ARM: dts: exynos: Remove duplicate definitions of SSS nodes for Exynos5Łukasz Stelmach3-14/+11
Move Security Subsystem nodes common for Exynos5250 and Exynos54xx to exynos5.dtsi to avoid duplication. Signed-off-by: Łukasz Stelmach <l.stelmach@samsung.com> Signed-off-by: Krzysztof Kozlowski <krzk@kernel.org>
2017-11-27ARM: dts: exynos: Add bcm4334 device node to Trats2Simon Shields1-0/+27
This patch allows the bcm4334 to power on and enables WiFi functionality on Trats2. Signed-off-by: Simon Shields <simon@lineageos.org> Signed-off-by: Krzysztof Kozlowski <krzk@kernel.org>
2017-11-27ARM: dts: exynos: Correct Trats2 panel reset lineSimon Shields1-1/+1
Trats2 uses gpf2-1 as the panel reset GPIO. gpy4-5 was only used on early revisions of the board. Fixes: 420ae8451a22 ("ARM: dts: exynos4412-trats2: add panel node") Signed-off-by: Simon Shields <simon@lineageos.org> Acked-by: Marek Szyprowski <m.szyprowski@samsung.com> Tested-by: Marek Szyprowski <m.szyprowski@samsung.com> Signed-off-by: Krzysztof Kozlowski <krzk@kernel.org>
2017-11-27ARM: dts: exynos: Add sound support for Odroid XU4Sylwester Nawrocki1-0/+52
This patch adds support for Odroid XU4 audio. The main difference comparing to Odroid XU3 is a missing on-board audio CODEC, only HDMI output is supported on Odroid XU4. External CODEC could be optionally connected to the I2S port connector. Signed-off-by: Sylwester Nawrocki <s.nawrocki@samsung.com> Signed-off-by: Krzysztof Kozlowski <krzk@kernel.org>
2017-11-27ARM: dts: exynos: Switch to dedicated Odroid XU3 sound card bindingSylwester Nawrocki3-22/+40
The new sound card DT binding is used for Odroid XU3 in order to properly support the HDMI audio path. Clocks configuration is changed so the I2S controller is now the bit clock and the frame clock master. The EPLL output clock is now the audio root clock adjusted to each audio sample rate. Signed-off-by: Sylwester Nawrocki <s.nawrocki@samsung.com> Signed-off-by: Krzysztof Kozlowski <krzk@kernel.org>
2017-11-27ARM: sa1111: remove legacy shutdown methodRussell King2-10/+0
Since the only user of the SA1111 device driver shutdown method has now gone, we can kill the bus level support code and the entry in the sa1111 device driver structure. Signed-off-by: Russell King <rmk+kernel@armlinux.org.uk>
2017-11-27ARM: davinci_all_defconfig: enable support for USB network adaptorsAparna Balasubramanian1-0/+1
Enables CONFIG_USB_USBNET so that well known USB network adapters can enumerate as network interfaces. Signed-off-by: Aparna Balasubramanian <aparnab@ti.com> Signed-off-by: Sekhar Nori <nsekhar@ti.com>
2017-11-27ARM: avoid faulting on qemuRussell King1-2/+2
When qemu starts a kernel in a bare environment, the default SCR has the AW and FW bits clear, which means that the kernel can't modify the PSR A or PSR F bits, and means that FIQs and imprecise aborts are always masked. When running uboot under qemu, the AW and FW SCR bits are set, and the kernel functions normally - and this is how real hardware behaves. Fix this for qemu by ignoring the FIQ bit. Fixes: 8bafae202c82 ("ARM: BUG if jumping to usermode address in kernel mode") Signed-off-by: Russell King <rmk+kernel@armlinux.org.uk>
2017-11-27ARM: dts: genmai: Correct primary compatible value for eepromGeert Uytterhoeven1-1/+1
The Renesas part number of the two-wire serial interface EEPROM is not 24C128, but R1EX24128ASA00A. Hence change its primary compatible value to "renesas,r1ex24128". Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be> Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
2017-11-27ARM: dts: koelsch: Correct primary compatible value for eepromGeert Uytterhoeven1-1/+1
The Renesas part number of the two-wire serial interface EEPROM is not 24C02, but R1EX24002ATAS0G. Hence change its primary compatible value to "renesas,r1ex24002", like on Gose. Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be> Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
2017-11-27ARM: dts: r8a7745: add VIN dt supportFabrizio Castro1-0/+24
Add VIN[01] support to SoC dt. Also, add aliases. Signed-off-by: Fabrizio Castro <fabrizio.castro@bp.renesas.com> Reviewed-by: Biju Das <biju.das@bp.renesas.com> Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
2017-11-27ARM: dts: r8a7743: add VIN dt supportFabrizio Castro1-0/+36
Add VIN[012] support to SoC dt. Also, add aliases. Signed-off-by: Fabrizio Castro <fabrizio.castro@bp.renesas.com> Reviewed-by: Biju Das <biju.das@bp.renesas.com> Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
2017-11-27ARM: dts: iwg20d-q7: Enable PCIe ControllerBiju Das1-0/+8
Enable PCIe Controller & set PCIe bus clock frequency. Signed-off-by: Biju Das <biju.das@bp.renesas.com> Reviewed-by: Fabrizio Castro <fabrizio.castro@bp.renesas.com> Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
2017-11-27ARM: dts: r8a7743: Add PCIe Controller device nodeBiju Das1-0/+28
Signed-off-by: Biju Das <biju.das@bp.renesas.com> Reviewed-by: Fabrizio Castro <fabrizio.castro@bp.renesas.com> Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
2017-11-27ARM: dts: r8a7743: Add default PCIe bus clockBiju Das1-0/+7
This patch adds a default PCIe bus clock node. Signed-off-by: Biju Das <biju.das@bp.renesas.com> Reviewed-by: Fabrizio Castro <fabrizio.castro@bp.renesas.com> Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
2017-11-27ARM: dts: iwg20d-q7-dbcm-ca: Add can1 support to camera DBFabrizio Castro1-0/+12
CAN1 interface is exposed via connector J3 found on the camera daughter board. This patch enables can1 DT node from within the daughter board specific dtsi. Signed-off-by: Fabrizio Castro <fabrizio.castro@bp.renesas.com> Reviewed-by: Biju Das <biju.das@bp.renesas.com> Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
2017-11-27ARM: dts: iwg20d-q7-common: Add can0 support to carrier boardFabrizio Castro1-0/+12
This patch enables CAN0 interface exposed through connector J20 on the carrier board. Signed-off-by: Fabrizio Castro <fabrizio.castro@bp.renesas.com> Reviewed-by: Biju Das <biju.das@bp.renesas.com> Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
2017-11-27ARM: dts: r8a7743: Add CAN[01] SoC supportFabrizio Castro1-0/+36
Add the definitions for can0 and can1 to the SoC .dtsi. Signed-off-by: Fabrizio Castro <fabrizio.castro@bp.renesas.com> Reviewed-by: Biju Das <biju.das@bp.renesas.com> Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
2017-11-27ARM: dts: iwg22d-sodimm-dbhd-ca: Add can1 support to HDMI DBFabrizio Castro1-0/+12
CAN1 interface is exposed via connector J1 found on the HDMI daughter board. This patch enables can1 DT node from within the daughter board specific device tree. Signed-off-by: Fabrizio Castro <fabrizio.castro@bp.renesas.com> Reviewed-by: Biju Das <biju.das@bp.renesas.com> Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
2017-11-27ARM: dts: iwg22d-sodimm: Add can0 support to carrier boardFabrizio Castro1-0/+12
This patch enables CAN0 interface exposed through connector J15 on the carrier board. Signed-off-by: Fabrizio Castro <fabrizio.castro@bp.renesas.com> Reviewed-by: Biju Das <biju.das@bp.renesas.com> Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
2017-11-27ARM: dts: r8a7745: Add CAN[01] SoC supportFabrizio Castro1-0/+36
Add the definitions for can0 and can1 to the SoC .dtsi. Signed-off-by: Fabrizio Castro <fabrizio.castro@bp.renesas.com> Reviewed-by: Biju Das <biju.das@bp.renesas.com> Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
2017-11-27ARM: dts: iwg22d-sodimm-dbhd-ca: Add HDMI video outputFabrizio Castro1-0/+85
This patch enables the HDMI interface found on the expansion board. Signed-off-by: Fabrizio Castro <fabrizio.castro@bp.renesas.com> Reviewed-by: Biju Das <biju.das@bp.renesas.com> Acked-by: Laurent Pinchart <laurent.pinchart@ideasonboard.com> Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
2017-11-27ARM: dts: r8a7745: Add DU supportFabrizio Castro1-0/+27
Add du node to r8a7745 SoC DT. Boards that want to enable the DU need to specify the output topology. Signed-off-by: Fabrizio Castro <fabrizio.castro@bp.renesas.com> Reviewed-by: Biju Das <biju.das@bp.renesas.com> Reviewed-by: Laurent Pinchart <laurent.pinchart@ideasonboard.com> Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
2017-11-27ARM: dts: koelsch: Move cec_clock to root nodeSimon Horman1-6/+6
cec-clock is a fixed clock generator that is not controlled by i2c5 and thus should not be a child of the i2c5 bus node. Rather, it should be a child of the root node of the DT. Fixes: 02a5ab18d366 ("ARM: dts: koelsch: Add CEC clock for HDMI transmitter") Reported-by: Laurent Pinchart <laurent.pinchart@ideasonboard.com> Signed-off-by: Simon Horman <horms+renesas@verge.net.au> Reviewed-by: Laurent Pinchart <laurent.pinchart@ideasonboard.com>
2017-11-27ARM: dts: iwg20d-q7: Add support for ttySC3Fabrizio Castro1-0/+14
Signed-off-by: Fabrizio Castro <fabrizio.castro@bp.renesas.com> Signed-off-by: Chris Paterson <chris.paterson2@renesas.com> Reviewed-by: Geert Uytterhoeven <geert+renesas@glider.be> Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
2017-11-27ARM: dts: r8a7794: Use R-Car SDHI Gen2 fallback compat stringSimon Horman1-3/+6
Use newly added R-Car SDHI Gen2 fallback compat string in the DT of the r8a7794 SoC. This should have no run-time effect as the driver matches against the per-SoC compat string before considering the fallback compat string. Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
2017-11-27ARM: dts: r8a7793: Use R-Car SDHI Gen2 fallback compat stringSimon Horman1-3/+6
Use newly added R-Car SDHI Gen2 fallback compat string in the DT of the r8a7793 SoC. This should have no run-time effect as the driver matches against the per-SoC compat string before considering the fallback compat string. Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
2017-11-27ARM: dts: r8a7792: Use R-Car SDHI Gen2 fallback compat stringSimon Horman1-1/+2
Use newly added R-Car SDHI Gen2 fallback compat string in the DT of the r8a7792 SoC. This should have no run-time effect as the driver matches against the per-SoC compat string before considering the fallback compat string. Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
2017-11-27ARM: dts: r8a7791: Use R-Car SDHI Gen2 fallback compat stringSimon Horman1-3/+6
Use newly added R-Car SDHI Gen2 fallback compat string in the DT of the r8a7791 SoC. This should have no run-time effect as the driver matches against the per-SoC compat string before considering the fallback compat string. Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
2017-11-27ARM: dts: r8a7790: Use R-Car SDHI Gen2 fallback compat stringSimon Horman1-4/+8
Use newly added R-Car SDHI Gen2 fallback compat string in the DT of the r8a7790 SoC. This should have no run-time effect as the driver matches against the per-SoC compat string before considering the fallback compat string. Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
2017-11-27ARM: dts: r8a7779: Use R-Car SDHI Gen1 fallback compat stringSimon Horman1-4/+8
Use newly added R-Car SDHI Gen1 fallback compat string in the DT of the r8a7779 SoC. This should have no run-time effect as the driver matches against the per-SoC compat string before considering the fallback compat string. Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
2017-11-27ARM: dts: r8a7778: Use R-Car SDHI Gen1 fallback compat stringSimon Horman1-3/+6
Use newly added R-Car SDHI Gen1 fallback compat string in the DT of the r8a7778 SoC. This should have no run-time effect as the driver matches against the per-SoC compat string before considering the fallback compat string. Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
2017-11-27ARM: dts: r8a7745: Use R-Car SDHI Gen2 fallback compat stringSimon Horman1-3/+6
Use newly added R-Car SDHI Gen2 fallback compat string in the DT of the r8a7745 SoC. This should have no run-time effect as the driver matches against the per-SoC compat string before considering the fallback compat string. Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
2017-11-27ARM: dts: r8a7743: Use R-Car SDHI Gen2 fallback compat stringSimon Horman1-3/+6
Use newly added R-Car SDHI Gen2 fallback compat string in the DT of the r8a7743 SoC. This should have no run-time effect as the driver matches against the per-SoC compat string before considering the fallback compat string. Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
2017-11-27ARM: dts: r8a7745: Add IIC cores to dtsiFabrizio Castro1-0/+36
Add iic0 and iic1 nodes to SoC dtsi. Also, define aliases i2c6 and i2c7. Board specific DT files will enable the interfaces if needed. Signed-off-by: Fabrizio Castro <fabrizio.castro@bp.renesas.com> Reviewed-by: Chris Paterson <chris.paterson2@renesas.com> Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
2017-11-27ARM: dts: iwg22d-sodimm: Enable HS-USBBiju Das1-0/+11
From: Biju Das <biju.das@bp.renesas.com> Enable HS-USB on iWave RZ/G1E carrier board. Signed-off-by: Biju Das <biju.das@bp.renesas.com> Reviewed-by: Fabrizio Castro <fabrizio.castro@bp.renesas.com> Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
2017-11-27ARM: dts: r8a7745: Enable DMA for HSUSBBiju Das1-0/+3
From: Biju Das <biju.das@bp.renesas.com> This patch adds DMA properties to the HSUSB node. Signed-off-by: Biju Das <biju.das@bp.renesas.com> Reviewed-by: Fabrizio Castro <fabrizio.castro@bp.renesas.com> Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
2017-11-27ARM: dts: r8a7745: Add USB-DMAC device nodesBiju Das1-0/+28
From: Biju Das <biju.das@bp.renesas.com> Signed-off-by: Biju Das <biju.das@bp.renesas.com> Reviewed-by: Fabrizio Castro <fabrizio.castro@bp.renesas.com> Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
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