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Turris Omnia has an SFP cage that, together with WAN PHY, is connected
to eth2 SerDes via a SerDes multiplexor. When a SFP module is present,
the multiplexor switches the SerDes signal from PHY to SFP.
Describe the SFP cage, but leave it disabled. Until phylink has support
for such configuration, we are leaving it to U-Boot to enable SFP and
disable WAN PHY at boot time depending on whether a SFP module is
present.
Signed-off-by: Marek Behún <kabel@kernel.org>
Fixes: 26ca8b52d6e1 ("ARM: dts: add support for Turris Omnia")
Reviewed-by: Andrew Lunn <andrew@lunn.ch>
Cc: Russell King - ARM Linux admin <linux@armlinux.org.uk>
Cc: linux-arm-kernel@lists.infradead.org
Cc: Uwe Kleine-König <uwe@kleine-koenig.org>
Cc: Jason Cooper <jason@lakedaemon.net>
Cc: Gregory CLEMENT <gregory.clement@bootlin.com>
Cc: Andreas Färber <afaerber@suse.de>
Cc: Rob Herring <robh+dt@kernel.org>
Cc: devicetree@vger.kernel.org
Signed-off-by: Gregory CLEMENT <gregory.clement@bootlin.com>
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Describe switch interrupt for Turris Omnia so that the CPU does not have
to poll the switch. We also need to to set mpp45 pin to gpio function
for this.
Signed-off-by: Marek Behún <kabel@kernel.org>
Fixes: 26ca8b52d6e1 ("ARM: dts: add support for Turris Omnia")
Cc: linux-arm-kernel@lists.infradead.org
Cc: Uwe Kleine-König <uwe@kleine-koenig.org>
Cc: Jason Cooper <jason@lakedaemon.net>
Cc: Gregory CLEMENT <gregory.clement@bootlin.com>
Cc: Andreas Färber <afaerber@suse.de>
Cc: Andrew Lunn <andrew@lunn.ch>
Cc: Rob Herring <robh+dt@kernel.org>
Cc: devicetree@vger.kernel.org
Signed-off-by: Gregory CLEMENT <gregory.clement@bootlin.com>
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The eth2 controller on Turris Omnia is connected to SerDes. For SFP to
be able to switch between 1G and 2.5G modes the comphy link has to be
defined.
Signed-off-by: Marek Behún <kabel@kernel.org>
Fixes: f3a6a9f3704a ("ARM: dts: add description for Armada 38x ...")
Reviewed-by: Andrew Lunn <andrew@lunn.ch>
Reviewed-by: Andreas Färber <afaerber@suse.de>
Cc: linux-arm-kernel@lists.infradead.org
Cc: Uwe Kleine-König <uwe@kleine-koenig.org>
Cc: Jason Cooper <jason@lakedaemon.net>
Cc: Gregory CLEMENT <gregory.clement@bootlin.com>
Cc: Rob Herring <robh+dt@kernel.org>
Cc: devicetree@vger.kernel.org
Signed-off-by: Gregory CLEMENT <gregory.clement@bootlin.com>
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The buffer manager is available on Turris Omnia but needs to be
described in device-tree to be used.
Signed-off-by: Marek Behún <kabel@kernel.org>
Fixes: 26ca8b52d6e1 ("ARM: dts: add support for Turris Omnia")
Cc: linux-arm-kernel@lists.infradead.org
Cc: Uwe Kleine-König <uwe@kleine-koenig.org>
Cc: Jason Cooper <jason@lakedaemon.net>
Cc: Gregory CLEMENT <gregory.clement@bootlin.com>
Cc: Andreas Färber <afaerber@suse.de>
Cc: Andrew Lunn <andrew@lunn.ch>
Cc: Rob Herring <robh+dt@kernel.org>
Cc: devicetree@vger.kernel.org
Signed-off-by: Gregory CLEMENT <gregory.clement@bootlin.com>
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This adds support for the OMNIA Flex Concentrator product
from Kamstrup A/S. It's providing radio mesh communication
infrastructure for smart electricity meters.
Kamstrup OMNIA is a modular and scalable smart grid platform.
Signed-off-by: Bruno Thomsen <bruno.thomsen@gmail.com>
Signed-off-by: Shawn Guo <shawnguo@kernel.org>
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Update the calibration table to make the temperature more accurate.
Signed-off-by: Yuantian Tang <andy.tang@nxp.com>
Signed-off-by: Shawn Guo <shawnguo@kernel.org>
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i.MX23 and i.MX28 SoCs unique identifiers are factory-programmed
in On-Chip OTP memory. i.MX28's 64-bit unique id is in
HW_OCOTP_OPS2:HW_OCOTP_OPS3 (see MCIMX28 Ref. Man., sec. 20.4.22-23).
i.MX23 provides 32-bit long unique id in HW_OCOTP_OPS3.
Though not clearly documented, there is a clue in sec. 35.9.3.
The unique id is reported in /sys/devices/soc0/serial_number
and in /proc/cpuinfo
Signed-off-by: Ivan Zaentsev <ivan.zaentsev@wirenboard.ru>
Suggested-by: Evgeny Boger <boger@wirenboard.com>
Signed-off-by: Shawn Guo <shawnguo@kernel.org>
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We need the USB fixes in here as well.
Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
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The range of dcfg reg is wrong, which overlap with other device,
such as rcpm. This issue causing rcpm driver failed to claim
reg resource when calling devm_ioremap_resource().
Signed-off-by: Ran Wang <ran.wang_1@nxp.com>
Acked-by: Li Yang <leoyang.li@nxp.com>
Signed-off-by: Shawn Guo <shawnguo@kernel.org>
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The data of property 'fsl,rcpm-wakeup' is not corrcet, which causing
RCPM driver incorrectly program register IPPDEXPCR1, then flextimer is
wrongly clock gated during system suspend, can't send interrupt to
wake.
Signed-off-by: Ran Wang <ran.wang_1@nxp.com>
Acked-by: Li Yang <leoyang.li@nxp.com>
Signed-off-by: Shawn Guo <shawnguo@kernel.org>
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This converts the Collie battery driver to use GPIO descriptors.
We use a mixture of 3 GPIOs defined in the machine and 3
GPIOs requested directly from the ucb1x00 chip.
Cc: Robert Jarzmik <robert.jarzmik@free.fr>
Cc: Dmitry Eremin-Solenikov <dbaryshkov@gmail.com>
Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
Signed-off-by: Sebastian Reichel <sebastian.reichel@collabora.com>
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This converts the S3C ADC battery to use GPIO descriptors
instead of a global GPIO number for the charging completed
GPIO. Using the pattern from the GPIO charger we name this
GPIO line "charge-status" in the board file.
Cc: linux-samsung-soc@vger.kernel.org
Cc: Sergiy Kibrik <sakib@darkstar.site>
Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
Signed-off-by: Sebastian Reichel <sebastian.reichel@collabora.com>
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git://git.kernel.org/pub/scm/linux/kernel/git/tip/tip
Pull locking fixes from Thomas Gleixner:
"Two more places which invoke tracing from RCU disabled regions in the
idle path.
Similar to the entry path the low level idle functions have to be
non-instrumentable"
* tag 'locking-urgent-2020-11-29' of git://git.kernel.org/pub/scm/linux/kernel/git/tip/tip:
intel_idle: Fix intel_idle() vs tracing
sched/idle: Fix arch_cpu_idle() vs tracing
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Add pinctrl information for the 98dx3236 (and variants). There is only
one choice for i2c0 MPP14 and MPP15.
Signed-off-by: Chris Packham <chris.packham@alliedtelesis.co.nz>
Reviewed-by: Andrew Lunn <andrew@lunn.ch>
Signed-off-by: Gregory CLEMENT <gregory.clement@bootlin.com>
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The switches with integrated CPUs have only got a single i2c controller.
They incorrectly gained one when they were split from the Armada-XP.
Fixes: 43e28ba87708 ("ARM: dts: Use armada-370-xp as a base for armada-xp-98dx3236")
Signed-off-by: Chris Packham <chris.packham@alliedtelesis.co.nz>
Reviewed-by: Andrew Lunn <andrew@lunn.ch>
Signed-off-by: Gregory CLEMENT <gregory.clement@bootlin.com>
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The convention for node names is to use hyphens, not underscores.
dtschema for pca95xx expects GPIO hogs to end with 'hog' prefix.
Signed-off-by: Krzysztof Kozlowski <krzk@kernel.org>
Signed-off-by: Gregory CLEMENT <gregory.clement@bootlin.com>
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The PCA95xx GPIO expander requires GPIO controller properties to operate
properly.
Signed-off-by: Krzysztof Kozlowski <krzk@kernel.org>
Reviewed-by: Linus Walleij <linus.walleij@linaro.org>
Signed-off-by: Gregory CLEMENT <gregory.clement@bootlin.com>
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While the DT parser recognizes "ok" as a valid value for the
"status" property, it is actually mentioned nowhere. Use the
proper value "okay" instead, as done in the majority of files
already.
Signed-off-by: Adrian Schmutzler <freifunk@adrianschmutzler.de>
Reviewed-by: Andrew Lunn <andrew@lunn.ch>
Signed-off-by: Gregory CLEMENT <gregory.clement@bootlin.com>
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MikroTik CRS328-4C-20S-4S board has a switch chip with an integrated
Marvell Prestera 98DX3236 CPU.
This commit includes two board variants, namely the factory
default one and a Bit variant. The Bit variant has a
bigger Macronix flash.
This device tree includes basic Linux support.
Signed-off-by: Luka Kovacic <luka.kovacic@sartura.hr>
Cc: Luka Perkov <luka.perkov@sartura.hr>
Cc: Jakov Petrina <jakov.petrina@sartura.hr>
Reviewed-by: Andrew Lunn <andrew@lunn.ch>
Signed-off-by: Gregory CLEMENT <gregory.clement@bootlin.com>
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MikroTik CRS305-1G-4S board has a switch chip with an integrated
Marvell Prestera 98DX3236 CPU.
This commit includes two board variants, namely the factory
default one and a Bit variant. The Bit variant has a
bigger Macronix flash.
This device tree includes basic Linux support.
Signed-off-by: Luka Kovacic <luka.kovacic@sartura.hr>
Cc: Luka Perkov <luka.perkov@sartura.hr>
Cc: Jakov Petrina <jakov.petrina@sartura.hr>
Reviewed-by: Andrew Lunn <andrew@lunn.ch>
Signed-off-by: Gregory CLEMENT <gregory.clement@bootlin.com>
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MikroTik CRS326-24G-2S board has a switch chip with an integrated
Marvell Prestera 98DX3236 CPU.
This commit includes two board variants, namely the factory
default one and a Bit variant. The Bit variant has a
bigger Macronix flash.
This device tree includes basic Linux support.
Signed-off-by: Luka Kovacic <luka.kovacic@sartura.hr>
Cc: Luka Perkov <luka.perkov@sartura.hr>
Cc: Jakov Petrina <jakov.petrina@sartura.hr>
Reviewed-by: Andrew Lunn <andrew@lunn.ch>
Signed-off-by: Gregory CLEMENT <gregory.clement@bootlin.com>
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This property is used by io-channel consumers, not providers so should
not present here. Note dt_schema will now detect this error as there
is a dependency between this property and io-channels.
Signed-off-by: Jonathan Cameron <Jonathan.Cameron@huawei.com>
Cc: Andy Gross <andy.gross@linaro.org>
Cc: Bjorn Andersson <bjorn.andersson@linaro.org>
Link: https://lore.kernel.org/r/20201115192951.1073632-7-jic23@kernel.org
Signed-off-by: Bjorn Andersson <bjorn.andersson@linaro.org>
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Enable the ARM SCMI protocol and the common clock, cpufreq and sensors
drivers. Broadcom STB platforms (ARCH_BRCMSTB) implement SCMI to provide
support for CPU frequency scaling, clock configuration and temperature
and current sensors.
Signed-off-by: Florian Fainelli <f.fainelli@gmail.com>
Acked-by: Sudeep Holla <sudeep.holla@arm.com>
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Trivial conflict in CAN, keep the net-next + the byteswap wrapper.
Conflicts:
drivers/net/can/usb/gs_usb.c
Signed-off-by: Jakub Kicinski <kuba@kernel.org>
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git://git.kernel.org/pub/scm/linux/kernel/git/arnd/asm-generic
Pull asm-generic fix from Arnd Bergmann:
"Add correct MAX_POSSIBLE_PHYSMEM_BITS setting to asm-generic.
This is a single bugfix for a bug that Stefan Agner found on 32-bit
Arm, but that exists on several other architectures"
* tag 'asm-generic-fixes-5.10-2' of git://git.kernel.org/pub/scm/linux/kernel/git/arnd/asm-generic:
arch: pgtable: define MAX_POSSIBLE_PHYSMEM_BITS where needed
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git://git.kernel.org/pub/scm/linux/kernel/git/soc/soc
Pull ARM SoC fixes from Arnd Bergmann:
"Another set of patches for devicetree files and Arm SoC specific
drivers:
- A fix for OP-TEE shared memory on non-SMP systems
- multiple code fixes for the OMAP platform, including one regression
for the CPSW network driver and a few runtime warning fixes
- Some DT patches for the Rockchip RK3399 platform, in particular
fixing the MMC device ordering that recently became
nondeterministic with async probe.
- Multiple DT fixes for the Tegra platform, including a regression
fix for suspend/resume on TX2
- A regression fix for a user-triggered fault in the NXP dpio driver
- A regression fix for a bug caused by an earlier bug fix in the
xilinx firmware driver
- Two more DTC warning fixes
- Sylvain Lemieux steps down as maintainer for the NXP LPC32xx
platform"
* tag 'arm-soc-fixes-v5.10-3' of git://git.kernel.org/pub/scm/linux/kernel/git/soc/soc: (24 commits)
arm64: tegra: Fix Tegra234 VDK node names
arm64: tegra: Wrong AON HSP reg property size
arm64: tegra: Fix USB_VBUS_EN0 regulator on Jetson TX1
arm64: tegra: Correct the UART for Jetson Xavier NX
arm64: tegra: Disable the ACONNECT for Jetson TX2
optee: add writeback to valid memory type
firmware: xilinx: Use hash-table for api feature check
firmware: xilinx: Fix SD DLL node reset issue
soc: fsl: dpio: Get the cpumask through cpumask_of(cpu)
ARM: dts: dra76x: m_can: fix order of clocks
bus: ti-sysc: suppress err msg for timers used as clockevent/source
MAINTAINERS: Remove myself as LPC32xx maintainers
arm64: dts: qcom: clear the warnings caused by empty dma-ranges
arm64: dts: broadcom: clear the warnings caused by empty dma-ranges
ARM: dts: am437x-l4: fix compatible for cpsw switch dt node
arm64: dts: rockchip: Reorder LED triggers from mmc devices on rk3399-roc-pc.
arm64: dts: rockchip: Assign a fixed index to mmc devices on rk3399 boards.
arm64: dts: rockchip: Remove system-power-controller from pmic on Odroid Go Advance
arm64: dts: rockchip: fix NanoPi R2S GMAC clock name
ARM: OMAP2+: Manage MPU state properly for omap_enter_idle_coupled()
...
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The SCMI pull request for the arm/drivers branch requires v5.10-rc2
because of dependencies with other git trees, so merge that in here.
Signed-off-by: Arnd Bergmann <arnd@arndb.de>
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git://git.kernel.org/pub/scm/linux/kernel/git/tegra/linux into arm/dt
ARM: tegra: Device tree changes for v5.11-rc1
This adds support for the Tegra30-based Ouya game console and enhances a
number of existing device trees. It also fixes a couple of minor issues
that were found during DT validation.
* tag 'tegra-for-5.11-arm-dt' of git://git.kernel.org/pub/scm/linux/kernel/git/tegra/linux: (23 commits)
ARM: tegra: Add EMC OPP and ICC properties to Tegra124 EMC and ACTMON device-tree nodes
ARM: tegra: Add EMC OPP and ICC properties to Tegra30 EMC and ACTMON device-tree nodes
ARM: tegra: Add EMC OPP properties to Tegra20 device-trees
ARM: tegra: Add nvidia,memory-controller phandle to Tegra20 EMC device-tree
ARM: tegra: Add interconnect properties to Tegra124 device-tree
ARM: tegra: Add interconnect properties to Tegra30 device-tree
ARM: tegra: Add interconnect properties to Tegra20 device-tree
ARM: tegra: acer-a500: Add Embedded Controller
ARM: tegra: Change order of SATA resets for Tegra124
ARM: tegra: Correct EMC registers size in Tegra20 device-tree
ARM: tegra: Properly align clocks for SOCTHERM
ARM: tegra: Hook up edp interrupt on Tegra124 SOCTHERM
ARM: tegra: Add missing hot temperatures to Tegra124 thermal-zones
ARM: tegra: Add missing gpu-throt-level to Tegra124 soctherm
ARM: tegra: Populate OPP table for Tegra20 Ventana
ARM: tegra: nexus7: Use panel-lvds as the only panel compatible
ARM: tegra: nexus7: Rename gpio-hog nodes
ARM: tegra: nexus7: Add power-supply to lvds-encoder node
ARM: tegra: nexus7: Improve CPU passive-cooling threshold
ARM: tegra: nexus7: Correct thermal zone names
...
Link: https://lore.kernel.org/r/20201127144329.124891-4-thierry.reding@gmail.com
Signed-off-by: Arnd Bergmann <arnd@arndb.de>
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git://git.kernel.org/pub/scm/linux/kernel/git/atorgue/stm32 into arm/dt
STM32 DT updates for v5.11, round 1
Highlights:
----------
MCU part:
-Fix dmamux reg property (length) on stm32h743.
-Explicitly set DCMI bus type on stm32429i eval board.
MPU part:
-Enable FIFO mode with half-full threshold for DCMI.
-Harmonize EHCI/OHCI nodes.
-Move SDMMC IP version to v2.0 to get features improvements.
-Add LP-timer wakeup support.
-Enable crypto/hash/crc support.
-Explicitly set DCMI bus type on stm32mp157 eval board.
-Add USB type-c controller (STUSB1600) on stm32mp15 DK boards
(It is connected to I2C4).
-Fix dmamux reg property (length) on stm32mp151.
-Optimize USB OTG FIFO sizes on stm32mp151.
-Declare tamp node also as "simple-mfd".
-LXA:
-Document Octavo vendor-prefixes yaml file.
-Document lxa,stm32mp157c-mc1 in STM32 yaml file.
-DH:
-Connect PHY IRQ line on DH SoM.
-Add KS8851 Ethernet support on DHCOM which is mapped to FMC2.
-Document all DH compatible strings in STM32 yaml file.
-Add DHCOM based PicoITX board. This board embedds ethernet port,
USB, CAN LEDS and a custom board-to-board connector.
* tag 'stm32-dt-for-v5.11-1' of git://git.kernel.org/pub/scm/linux/kernel/git/atorgue/stm32: (34 commits)
ARM: dts: stm32: lxa-mc1: add OSD32MP15x to list of compatibles
dt-bindings: arm: stm32: add extra SiP compatible for lxa,stm32mp157c-mc1
dt-bindings: vendor-prefixes: document Octavo Systems oct prefix
ARM: dts: stm32: Add DHCOM based PicoITX board
dt-bindings: arm: stm32: Add compatible strings for DH SoMs and boards
ARM: dts: stm32: support child mfd cells for the stm32mp1 TAMP syscon
dt-bindings: arm: stm32: add simple-mfd compatible for tamp node
ARM: dts: stm32: update stm32mp151 for remote proc synchronization support
ARM: dts: stm32: adjust USB OTG gadget fifo sizes in stm32mp151
ARM: dts: stm32: fix dmamux reg property on stm32h743
ARM: dts: stm32: fix dmamux reg property on stm32mp151
ARM: dts: stm32: fix mdma1 clients channel priority level on stm32mp151
ARM: dts: stm32: add STUSB1600 Type-C using I2C4 on stm32mp15xx-dkx
dt-bindings: usb: Add DT bindings for STUSB160x Type-C controller
dt-bindings: connector: add typec-power-opmode property to usb-connector
ARM: dts: stm32: reorder spi4 within stm32mp15-pinctrl
ARM: dts: stm32: set bus-type in DCMI endpoint for stm32429i-eval board
ARM: dts: stm32: set bus-type in DCMI endpoint for stm32mp157c-ev1 board
ARM: dts: stm32: enable CRYP by default on stm32mp15
ARM: dts: stm32: enable CRC1 by default on stm32mp15
...
Link: https://lore.kernel.org/r/873c17a5-28d5-9261-f691-1b917611c932@foss.st.com
Signed-off-by: Arnd Bergmann <arnd@arndb.de>
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git://git.kernel.org/pub/scm/linux/kernel/git/tmlind/linux-omap into arm/dt
Devicetree changes for omaps for v5.11 merge window
- Two non-urgent pandaboard updates to get gpio button and bluetooth
working on pandaboard-es
- Updates to follow devicetree binding docs for dwc3 and pwm-leds
- Add initial support for droid bionic based on what we have for droid4
- Add second sha instance for dra7
- Add eQEP nodes for am335x for boneblue
- Fix wrong comments for am335x gpio_31
* tag 'omap-for-v5.11/dt-signed' of git://git.kernel.org/pub/scm/linux/kernel/git/tmlind/linux-omap:
ARM: dts: am335x: Fix comments for AM335X_PIN_GPMC_WPN pin in GPIO mode
ARM: dts: am335x-boneblue: Enable eQEP
ARM: dts: am33xx: Add nodes for eQEP
ARM: dts: dra7: add second SHA instance
ARM: dts: xt875: add section for kionix kxtf9
ARM: dts: mapphone: separate out xt894 specific things
ARM: dts: omap: Fix schema warnings for pwm-leds
ARM: dts: omap5: Harmonize DWC USB3 DT nodes name
ARM: dts: am437x: Correct DWC USB3 compatible string
ARM: dts: pandaboard es: add bluetooth uart for HCI
ARM: dts: pandaboard: fix pinmux for gpio user button of Pandaboard ES
Link: https://lore.kernel.org/r/pull-1606462656-588116@atomide.com-2
Signed-off-by: Arnd Bergmann <arnd@arndb.de>
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git://git.kernel.org/pub/scm/linux/kernel/git/atorgue/stm32 into arm/defconfig
STM32 config updates for v5.11, round 1
Highlights:
----------
-Enable counters for STM32
-Enable crypto for STM32
-Enable audio for STM32: DFSDM and SPDIFRX
-Enable STUSB160x Type-C controller
All configs are enabled as module.
* tag 'stm32-config-for-v5.11-1' of git://git.kernel.org/pub/scm/linux/kernel/git/atorgue/stm32:
ARM: multi_v7_defconfig: enable STM32 dfsdm audio support
ARM: multi_v7_defconfig: enable STM32 spdifrx support
ARM: multi_v7_defconfig: enable STUSB160X Type-C port controller support
ARM: multi_v7_defconfig: add STM32 crypto support
ARM: multi_v7_defconfig: enable counter subsystem and stm32 counter drivers
Link: https://lore.kernel.org/r/a6ea4940-a9a3-eba6-4ef5-aba7ff382009@foss.st.com
Signed-off-by: Arnd Bergmann <arnd@arndb.de>
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git://git.kernel.org/pub/scm/linux/kernel/git/tmlind/linux-omap into arm/defconfig
Defconfig changes for omaps for v5.11 merge window
- Enable thermal support for omap3 now that the driver changes have
been merged
- Enable magnetometer and accelerometer support as loadable modules
for Motorola mapphone devices
- Enable eQEP counter for beaglebone blue as loadable modules
* tag 'omap-for-v5.11/defconfig-signed' of git://git.kernel.org/pub/scm/linux/kernel/git/tmlind/linux-omap:
ARM: omap2plus_defconfig: Enable TI eQEP counter driver
ARM: omap2plus_defconfig: add CONFIG_AK8975=m and CONFIG_KXCJK1013=m
ARM: omap2plus_defconfig: Enable OMAP3_THERMAL
Link: https://lore.kernel.org/r/pull-1606462656-588116@atomide.com-3
Signed-off-by: Arnd Bergmann <arnd@arndb.de>
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git://git.kernel.org/pub/scm/linux/kernel/git/geert/renesas-devel into arm/soc
Renesas ARM SoC updates for v5.11
- Stop using static I/O mappings and __raw_*() I/O accessors.
* tag 'renesas-arm-soc-for-v5.11-tag1' of git://git.kernel.org/pub/scm/linux/kernel/git/geert/renesas-devel:
ARM: shmobile: Stop using __raw_*() I/O accessors
ARM: shmobile: sh73a0: Remove obsolete static mapping
ARM: shmobile: sh73a0: Use ioremap() to map SMP registers
ARM: shmobile: sh73a0: Use ioremap() to map L2C registers
ARM: shmobile: r8a7779: Remove obsolete static mappings
ARM: shmobile: r8a7779: Use ioremap() to map SMP registers
ARM: shmobile: r8a7779: Use ioremap() to map INTC2 registers
ARM: shmobile: r8a7778: Introduce HPBREG_BASE
Link: https://lore.kernel.org/r/20201127132155.77418-3-geert@linux-m68k.org
Signed-off-by: Arnd Bergmann <arnd@arndb.de>
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git://git.kernel.org/pub/scm/linux/kernel/git/tmlind/linux-omap into arm/soc
SoC changes for omaps for v5.11 merge window:
Several non-urgent fixes for various issues found by automated tests.
So far we have not been hitting any of these so these can wait for the
merge window no problem.
* tag 'omap-for-v5.11/soc-signed' of git://git.kernel.org/pub/scm/linux/kernel/git/tmlind/linux-omap:
ARM: OMAP1: clock: Use IS_ERR_OR_NULL() to clean code
ARM: OMAP2+: Remove redundant null check before clk_prepare_enable/clk_disable_unprepare
ARM: OMAP2+: Remove redundant assignment to variable ret
ARM: OMAP2+: Fix kfree NULL pointer in omap2xxx_clkt_vps_init
ARM: OMAP2+: Fix memleak in omap2xxx_clkt_vps_init
Link: https://lore.kernel.org/r/pull-1606462656-588116@atomide.com
Signed-off-by: Arnd Bergmann <arnd@arndb.de>
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git://git.kernel.org/pub/scm/linux/kernel/git/tmlind/linux-omap into arm/fixes
Fixes for omaps for various issues noticed during the -rc cycle:
- Earlier omap4 cpuidle fix was incomplete and needs to use a
configured idle state instead
- Fix am4 cpsw driver compatible to avoid invalid resource error
for the legacy driver
- Two kconfig fixes for genpd support that we added for for v5.10
for proper location of the option and adding missing option
- Fix ti-sysc reset status checking on enabling modules to ignore
quirky modules with reset status only usable when the quirk is
activated during reset. Also fix bogus resetdone warning for
cpsw and modules with no sysst register reset status bit
- Suppress a ti-sysc warning for timers reserved as system timers
- Fix the ordering of clocks for dra7 m_can
* tag 'omap-for-v5.10/fixes-rc5-signed' of git://git.kernel.org/pub/scm/linux/kernel/git/tmlind/linux-omap:
ARM: dts: dra76x: m_can: fix order of clocks
bus: ti-sysc: suppress err msg for timers used as clockevent/source
ARM: dts: am437x-l4: fix compatible for cpsw switch dt node
ARM: OMAP2+: Manage MPU state properly for omap_enter_idle_coupled()
bus: ti-sysc: Fix bogus resetdone warning on enable for cpsw
bus: ti-sysc: Fix reset status check for modules with quirks
ARM: OMAP2+: Fix missing select PM_GENERIC_DOMAINS_OF
ARM: OMAP2+: Fix location for select PM_GENERIC_DOMAINS
Link: https://lore.kernel.org/r/pull-1606460270-864284@atomide.com
Signed-off-by: Arnd Bergmann <arnd@arndb.de>
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With commit df6c2ec872a6 ("ARM: OMAP2+: Drop legacy remaining legacy
platform data for am4") we moved am4 to boot with simple-pm-bus using
genpd and devicetree based data. But I forgot to test am4 only build
that still has few references to the old platform data left, and cause
undefined reference errors with omap_hwmod_set_postsetup_state and
omap_hwmod_for_each. We can just drop the related calls for am4 now,
and also drop the references to unused struct wkup_m3_platform_data.
Reported-by: Nishanth Menon <nm@ti.com>
Signed-off-by: Tony Lindgren <tony@atomide.com>
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into arm/dt
ARM: DT: Hisilicon ARM32 DT updates for 5.11
- Cleanups of the hisilicon DTS to align with the dtschema including
serial, usb, amba-bus, memory, mmc, spi and syscon. All of them do not
have any functional effect except passing dtschema checks or dtc W=2
builds.
* tag 'hisi-arm32-dt-for-5.11' of git://github.com/hisilicon/linux-hisi:
ARM: dts: hisilicon: fix errors detected by syscon.yaml
ARM: dts: hisilicon: fix errors detected by spi-pl022.yaml
ARM: dts: hisilicon: fix errors detected by synopsys-dw-mshc.yaml
ARM: dts: hisilicon: fix errors detected by root-node.yaml
ARM: dts: hisilicon: fix errors detected by simple-bus.yaml
ARM: dts: hisilicon: fix errors detected by usb yaml
ARM: dts: hisilicon: fix errors detected by pl011.yaml
ARM: dts: hisilicon: fix errors detected by snps-dw-apb-uart.yaml
Link: https://lore.kernel.org/r/5FBDC347.4050102@hisilicon.com
Signed-off-by: Arnd Bergmann <arnd@arndb.de>
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device-tree nodes
Add EMC OPP DVFS/DFS tables and interconnect paths that will be used for
dynamic memory bandwidth scaling based on memory utilization statistics.
Update board device-trees by removing unsupported EMC OPPs.
Note that ACTMON watches all memory interconnect paths, but we use a
single CPU-READ interconnect path for driving memory bandwidth, for
simplicity.
Signed-off-by: Dmitry Osipenko <digetx@gmail.com>
Signed-off-by: Thierry Reding <treding@nvidia.com>
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device-tree nodes
Add EMC OPP tables and interconnect paths that will be used for
dynamic memory bandwidth scaling based on memory utilization statistics.
Update board device-trees by removing unsupported EMC OPPs.
Note that ACTMON watches all memory interconnect paths, but we use a
single CPU-READ interconnect path for driving memory bandwidth, for
simplicity.
Signed-off-by: Dmitry Osipenko <digetx@gmail.com>
Signed-off-by: Thierry Reding <treding@nvidia.com>
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Add EMC OPP DVFS tables and update board device-trees by removing
unsupported OPPs.
Signed-off-by: Dmitry Osipenko <digetx@gmail.com>
Signed-off-by: Thierry Reding <treding@nvidia.com>
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Add nvidia,memory-controller to the Tegra20 External Memory Controller
node. This allows to perform a direct lookup of the Memory Controller
instead of walking up the whole tree. This puts Tegra20 device-tree on
par with Tegra30+.
Signed-off-by: Dmitry Osipenko <digetx@gmail.com>
Signed-off-by: Thierry Reding <treding@nvidia.com>
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Add interconnect properties to the Memory Controller, External Memory
Controller and the Display Controller nodes in order to describe hardware
interconnection.
Signed-off-by: Dmitry Osipenko <digetx@gmail.com>
Signed-off-by: Thierry Reding <treding@nvidia.com>
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Add interconnect properties to the Memory Controller, External Memory
Controller and the Display Controller nodes in order to describe hardware
interconnection.
Signed-off-by: Dmitry Osipenko <digetx@gmail.com>
Signed-off-by: Thierry Reding <treding@nvidia.com>
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Add interconnect properties to the Memory Controller, External Memory
Controller and the Display Controller nodes in order to describe hardware
interconnection.
Signed-off-by: Dmitry Osipenko <digetx@gmail.com>
Signed-off-by: Thierry Reding <treding@nvidia.com>
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This patch adds device-tree node for the Embedded Controller which is
found on the Picasso board. The Embedded Controller itself is ENE KB930,
it provides functions like battery-gauge/LED/GPIO/etc and it uses firmware
that is specifically customized for the Acer A500 device.
Signed-off-by: Dmitry Osipenko <digetx@gmail.com>
Signed-off-by: Thierry Reding <treding@nvidia.com>
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Tegra AHCI dt-binding doc is converted from text based to yaml based.
dtbs_check valdiation strictly follows reset-names order specified
in yaml dt-binding.
Tegra124 thru Tegra210 has 3 resets sata, sata-oob and sata-cold.
Tegra186 has 2 resets sata and sata-cold.
This patch changes order of SATA resets to maintain proper resets
order for commonly available resets across Tegra124 thru Tegra186
for dtbs_check to pass.
Signed-off-by: Sowjanya Komatineni <skomatineni@nvidia.com>
Signed-off-by: Thierry Reding <treding@nvidia.com>
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Fix the size of Tegra20 EMC registers, which should be twice bigger.
Acked-by: Krzysztof Kozlowski <krzk@kernel.org>
Signed-off-by: Dmitry Osipenko <digetx@gmail.com>
Signed-off-by: Thierry Reding <treding@nvidia.com>
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Entries on subsequent lines should be aligned with the entry on the
first line.
Signed-off-by: Thierry Reding <treding@nvidia.com>
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For some reason this was never hooked up. Do it now so that over-current
interrupts can be logged.
Reported-by: Nicolas Chauvet <kwizart@gmail.com>
Suggested-by: Jon Hunter <jonathanh@nvidia.com>
Signed-off-by: Thierry Reding <treding@nvidia.com>
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According to dmesg, thermal-zones for mem and cpu are missing hot
temperatures properties.
throttrip: pll: missing hot temperature
...
throttrip: mem: missing hot temperature
...
Adding them will clear the messages.
Signed-off-by: Nicolas Chauvet <kwizart@gmail.com>
Signed-off-by: Thierry Reding <treding@nvidia.com>
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