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2010-10-22[ARM] tegra: Add APB DMA supportColin Cross5-0/+922
The APB DMA block handles DMA transfers to and from some peripherals in the Tegra SOC. It reads from sequential addresses on the memory bus, and writes repeatedly to the same address on the APB bus. Two transfer modes are supported, oneshot for transferring a known size to or from a peripheral, and continuous for streaming data. In continuous mode, a callback occurs when the buffer is half full to allow the existing data to be handled and a new request queued.x v2 changes: dma API no longer uses PTR_ERR Signed-off-by: Erik Gilling <konkers@android.com> Signed-off-by: Colin Cross <ccross@android.com>
2010-10-22[ARM] tegra: Add cpufreq supportColin Cross3-0/+187
Implement cpufreq support for the Tegra SOC. DVFS is handled by the core virtual cpu clock. The frequencies of the two cores are tied together, the highest frequency requested by either core determines the actual frequency. Signed-off-by: Colin Cross <ccross@android.com>
2010-10-22[ARM] tegra: common: Update common clock init tableColin Cross1-2/+2
Renames clocks in the clock init table to match the datasheet names Signed-off-by: Colin Cross <ccross@android.com>
2010-10-22[ARM] tegra: clock: Add dvfs support, bug fixes, and cleanupsColin Cross7-210/+1005
- Add drivers to clock lookup table - Add new pll_m entries - Support I2C U16 divider - Fix rate reporting on 32.768kHz clock - Call propagate rate only if set_rate succeeds - Add support for audio_sync clock - Add 24MHz to PLLA frequency list - Correct i2s1/2/spdifout mux - Add suspend support - Fix enable/disable parent clocks in set_parent - Add max_rate parameter to all clocks - DVFS support - Add virtual cpu clock with dvfs - Support clk_round_rate - Fix requesting very high periph frequencies - Add quirks for PLLU: PLLU is slightly different from the rest of the PLLs. The lock enable bit is at bit 22 instead of 18 in the MISC register, and the post divider field is a single bit with reversed values from other PLLs. - Simplify recalculating clock rates - Fix UART divider flags - Remove unused clock ops Signed-off-by: Colin Cross <ccross@android.com>
2010-10-22[ARM] tegra: Add support for reading fusesColin Cross4-0/+111
The Tegra SOC contains fuses to identify the CPU type and bin, and a unique id. The CPU info is required to determine the correct voltages for each cpu and core frequency. Signed-off-by: Colin Cross <ccross@android.com>
2010-10-22[ARM] tegra: gpio: Add suspend and wake supportColin Cross2-13/+95
Includes checkpatch fixes and TEGRA_NR_GPIOS changes from Mike Rapoport <mike@compulab.co.il> Signed-off-by: Colin Cross <ccross@android.com>
2010-10-22[ARM] tegra: pinmux: add safe values, move tegra2, add suspendColin Cross5-396/+603
- the reset values for some pin groups in the tegra pin mux can result in functional errors due to conflicting with actively-configured pin groups muxing from the same controller. this change adds a known safe, non- conflicting mux for every pin group, which can be used on platforms where the pin group is not routed to any peripheral - also add each pin group's I/O voltage rail, to enable platform code to map from the pin groups used by each interface to the regulators used for dynamic voltage control - add routines to individually configure the tristate, pin mux and pull- ups for a pingroup_config array, so that it is possible to program individual values at run-time without modifying other values. this allows driver power-management code to reprogram individual interfaces into lower power states during idle / suspend, or to reprogram the pin mux to support multiple physical busses per internal controller (e.g., sharing a single I2C or SPI controller across multiple pin groups) - move chip-specific data like pingroups and drive-pingroups out of the common code and into chip-specific code - fix debug output for group with no pullups - add a TEGRA_MUX_SAFE function. Setting a pingroup to TEGRA_MUX_SAFE will automatically select a mux setting that is guaranteed not to conflict with any of the hardware blocks. Signed-off-by: Gary King <gking@nvidia.com>
2010-10-22[ARM] tegra: add suspend and mirror irqs to legacy controllerGary King2-0/+139
mirror IRQ enable and disable operations on the legacy PPI system interrupt controller, since the legacy controller is responsible for responding to wakeup interrupts when the CPU is in LP2 idle mode save the irq controller state on suspend and restore on resume Signed-off-by: Gary King <gking@nvidia.com>
2010-10-22[ARM] tegra: Add legacy irq supportColin Cross3-1/+146
The "legacy irq controller" duplicates the functionality of the GIC, but remains powered during the cpu suspend and idle modes that power down the CPU and the GIC. Signed-off-by: Colin Cross <ccross@android.com>
2010-10-22[ARM] tegra: update iomapColin Cross3-6/+39
Add missing io address map entries from datasheet. Add the IRAM area to the statically mapped io regions. Correct the onewire, USB, and statmon addresses Signed-off-by: Colin Cross <ccross@android.com>
2010-10-22Merge branch 'devel' of master.kernel.org:/home/rmk/linux-2.6-armLinus Torvalds814-6582/+24047
* 'devel' of master.kernel.org:/home/rmk/linux-2.6-arm: (278 commits) arm: remove machine_desc.io_pg_offst and .phys_io arm: use addruart macro to establish debug mappings arm: return both physical and virtual addresses from addruart arm/debug: consolidate addruart macros for CONFIG_DEBUG_ICEDCC ARM: make struct machine_desc definition coherent with its comment eukrea_mbimxsd-baseboard: Pass the correct GPIO to gpio_free cpuimx27: fix compile when ULPI is selected mach-pcm037_eet: fix compile errors Fixing ethernet driver compilation error for i.MX31 ADS board cpuimx51: update board support mx5: add cpuimx51sd module and its baseboard iomux-mx51: fix GPIO_1_xx 's IOMUX configuration imx-esdhc: update devices registration mx51: add resources for SD/MMC on i.MX51 iomux-mx51: fix SD1 and SD2's iomux configuration clock-mx51: rename CLOCK1 to CLOCK_CCGR for better readability clock-mx51: factorize clk_set_parent and clk_get_rate eukrea_mbimxsd: add support for DVI displays cpuimx25 & cpuimx35: fix OTG port registration in host mode i.MX31 and i.MX35 : fix errate TLSbo65953 and ENGcm09472 ...
2010-10-22Merge git://git.kernel.org/pub/scm/linux/kernel/git/dhowells/linux-2.6-irqflagsLinus Torvalds1-61/+84
* git://git.kernel.org/pub/scm/linux/kernel/git/dhowells/linux-2.6-irqflags: Fix IRQ flag handling naming MIPS: Add missing #inclusions of <linux/irq.h> smc91x: Add missing #inclusion of <linux/irq.h> Drop a couple of unnecessary asm/system.h inclusions SH: Add missing consts to sys_execve() declaration Blackfin: Rename IRQ flags handling functions Blackfin: Add missing dep to asm/irqflags.h Blackfin: Rename DES PC2() symbol to avoid collision Blackfin: Split the BF532 BFIN_*_FIO_FLAG() functions to their own header Blackfin: Split PLL code from mach-specific cdef headers
2010-10-22Merge branch 'next-spi' of git://git.secretlab.ca/git/linux-2.6Linus Torvalds5-25/+8
* 'next-spi' of git://git.secretlab.ca/git/linux-2.6: (53 commits) spi/omap2_mcspi: Verify TX reg is empty after TX only xfer with DMA spi/omap2_mcspi: disable channel after TX_ONLY transfer in PIO mode spi/bfin_spi: namespace local structs spi/bfin_spi: init early spi/bfin_spi: check per-transfer bits_per_word spi/bfin_spi: warn when CS is driven by hardware (CPHA=0) spi/bfin_spi: cs should be always low when a new transfer begins spi/bfin_spi: fix typo in comment spi/bfin_spi: reject unsupported SPI modes spi/bfin_spi: use dma_disable_irq_nosync() in irq handler spi/bfin_spi: combine duplicate SPI_CTL read/write logic spi/bfin_spi: reset ctl_reg bits when setup is run again on a device spi/bfin_spi: push all size checks into the transfer function spi/bfin_spi: use nosync when disabling the IRQ from the IRQ handler spi/bfin_spi: sync hardware state before reprogramming everything spi/bfin_spi: save/restore state when suspending/resuming spi/bfin_spi: redo GPIO CS handling Blackfin: SPI: expand SPI bitmasks spi/bfin_spi: use the SPI namespaced bit names spi/bfin_spi: drop extra memory we don't need ...
2010-10-22Merge branch 'irq-core-for-linus' of ↵Linus Torvalds4-16/+10
git://git.kernel.org/pub/scm/linux/kernel/git/tip/linux-2.6-tip * 'irq-core-for-linus' of git://git.kernel.org/pub/scm/linux/kernel/git/tip/linux-2.6-tip: (96 commits) apic, x86: Use BIOS settings for IBS and MCE threshold interrupt LVT offsets apic, x86: Check if EILVT APIC registers are available (AMD only) x86: ioapic: Call free_irte only if interrupt remapping enabled arm: Use ARCH_IRQ_INIT_FLAGS genirq, ARM: Fix boot on ARM platforms genirq: Fix CONFIG_GENIRQ_NO_DEPRECATED=y build x86: Switch sparse_irq allocations to GFP_KERNEL genirq: Switch sparse_irq allocator to GFP_KERNEL genirq: Make sparse_lock a mutex x86: lguest: Use new irq allocator genirq: Remove the now unused sparse irq leftovers genirq: Sanitize dynamic irq handling genirq: Remove arch_init_chip_data() x86: xen: Sanitise sparse_irq handling x86: Use sane enumeration x86: uv: Clean up the direct access to irq_desc x86: Make io_apic.c local functions static genirq: Remove irq_2_iommu x86: Speed up the irq_remapped check in hot pathes intr_remap: Simplify the code further ... Fix up trivial conflicts in arch/x86/Kconfig
2010-10-21Merge branch 'perf-core-for-linus' of ↵Linus Torvalds5-427/+113
git://git.kernel.org/pub/scm/linux/kernel/git/tip/linux-2.6-tip * 'perf-core-for-linus' of git://git.kernel.org/pub/scm/linux/kernel/git/tip/linux-2.6-tip: (163 commits) tracing: Fix compile issue for trace_sched_wakeup.c [S390] hardirq: remove pointless header file includes [IA64] Move local_softirq_pending() definition perf, powerpc: Fix power_pmu_event_init to not use event->ctx ftrace: Remove recursion between recordmcount and scripts/mod/empty jump_label: Add COND_STMT(), reducer wrappery perf: Optimize sw events perf: Use jump_labels to optimize the scheduler hooks jump_label: Add atomic_t interface jump_label: Use more consistent naming perf, hw_breakpoint: Fix crash in hw_breakpoint creation perf: Find task before event alloc perf: Fix task refcount bugs perf: Fix group moving irq_work: Add generic hardirq context callbacks perf_events: Fix transaction recovery in group_sched_in() perf_events: Fix bogus AMD64 generic TLB events perf_events: Fix bogus context time tracking tracing: Remove parent recording in latency tracer graph options tracing: Use one prologue for the preempt irqs off tracer function tracers ...
2010-10-20arm: remove machine_desc.io_pg_offst and .phys_ioNicolas Pitre361-852/+1
Since we're now using addruart to establish the debug mapping, we can remove the io_pg_offst and phys_io members of struct machine_desc. The various declarations were removed using the following script: grep -rl MACHINE_START arch/arm | xargs \ sed -i '/MACHINE_START/,/MACHINE_END/ { /\.\(phys_io\|io_pg_offst\)/d }' [ Initial patch was from Jeremy Kerr, example script from Russell King ] Signed-off-by: Nicolas Pitre <nicolas.pitre@linaro.org> Acked-by: Eric Miao <eric.miao at canonical.com>
2010-10-20arm: use addruart macro to establish debug mappingsJeremy Kerr1-4/+19
Since we can get both physical and virtual addresses from the addruart macro, we can use this to establish the debug mappings. In the case of CONFIG_DEBUG_ICEDCC, we don't need any mappings, but may still need to setup r7 correctly. Incorporating ASM changes from Nicolas Pitre <npitre@fluxnic.net>. Signed-off-by: Jeremy Kerr <jeremy.kerr@canonical.com> Tested-by: Kevin Hilman <khilman@deeprootsystems.com>
2010-10-20arm: return both physical and virtual addresses from addruartJeremy Kerr56-454/+440
Rather than checking the MMU status in every instance of addruart, do it once in kernel/debug.S, and change the existing addruart macros to return both physical and virtual addresses. The main debug code can then select the appropriate address to use. This will also allow us to retreive the address of a uart for the MMU state that we're not current in. Updated with fixes for OMAP from Jason Wang <jason77.wang@gmail.com> and Tony Lindgren <tony@atomide.com>, and fix for versatile express from Lorenzo Pieralisi <lorenzo.pieralisi@arm.com>. Signed-off-by: Jeremy Kerr <jeremy.kerr@canonical.com> Signed-off-by: Lorenzo Pieralisi <lorenzo.pieralisi@arm.com> Signed-off-by: Jason Wang <jason77.wang@gmail.com> Signed-off-by: Tony Lindgren <tony@atomide.com> Tested-by: Kevin Hilman <khilman@deeprootsystems.com>
2010-10-20arm/debug: consolidate addruart macros for CONFIG_DEBUG_ICEDCCJeremy Kerr1-11/+2
We have the same (empty) macro for all IDEDCC flavours, so consolidate it to one. Signed-off-by: Jeremy Kerr <jeremy.kerr@canonical.com>
2010-10-20ARM: make struct machine_desc definition coherent with its commentNicolas Pitre1-1/+2
As mentioned in the comment right at the top, the first four fields are directly accessed by assembly code in head.S. Move nr_irqs so the comment is true again. Signed-off-by: Nicolas Pitre <nicolas.pitre@linaro.org>
2010-10-20Merge branch 'linus' into irq/coreIngo Molnar22-28/+82
Merge reason: update to almost-final-.36 Signed-off-by: Ingo Molnar <mingo@elte.hu>
2010-10-20Merge branch 'devel-stable' into develRussell King374-4397/+18210
2010-10-20Merge branch 'for-rmk' of git://git.pengutronix.de/git/imx/linux-2.6 into ↵Russell King33-190/+1101
devel-stable
2010-10-19Merge branch 'for-rmk' of ↵Russell King95-2067/+3798
git://git.kernel.org/pub/scm/linux/kernel/git/kgene/linux-samsung into devel-stable Conflicts: arch/arm/mach-at91/include/mach/system.h arch/arm/mach-imx/mach-cpuimx27.c AT91 conflict resolution: Acked-by: Anders Larsen <al@alarsen.net> IMX conflict resolution confirmed by Uwe Kleine-König.
2010-10-19Merge branch 'msm-core' of ↵Russell King40-250/+5799
git://codeaurora.org/quic/kernel/dwalker/linux-msm into devel-stable
2010-10-19eukrea_mbimxsd-baseboard: Pass the correct GPIO to gpio_freeFabio Estevam1-1/+1
Pass the correct GPIO to gpio_free Signed-off-by: Fabio Estevam <fabio.estevam@freescale.com> Acked-by: Eric Bénard <eric@eukrea.com> Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
2010-10-19cpuimx27: fix compile when ULPI is selectedEric Bénard1-0/+1
without this patch we get : arch/arm/mach-imx/built-in.o: In function `eukrea_cpuimx27_init': eukrea_mbimx27-baseboard.c:(.init.text+0x44c): undefined reference to `mxc_ulpi_access_ops' Signed-off-by: Eric Bénard <eric@eukrea.com> Signed-off-by: Uwe Kleine-König <u.kleine-koenig@pengutronix.de>
2010-10-19mach-pcm037_eet: fix compile errorsEric Bénard1-1/+2
this patch fix the following errors : arch/arm/mach-mx3/mach-pcm037_eet.c:62: error: implicit declaration of function 'MXC_SPI_CS' arch/arm/mach-mx3/mach-pcm037_eet.c:185: error: implicit declaration of function 'imx35_add_spi_imx0' from the Kconfig pcm037 is i.MX31 based and not i.MX35 so replace imx35_add_spi_imx0 by imx31_add_spi_imx0 Signed-off-by: Eric Bénard <eric@eukrea.com> [ukl: remove unneeded #include <mach/spi.h>] Signed-off-by: Uwe Kleine-König <u.kleine-koenig@pengutronix.de>
2010-10-19Fixing ethernet driver compilation error for i.MX31 ADS boardIan Lartey2-6/+34
This is only a partial revert of "ARM: mx3/mx31ads: fold board header in its only user" [commit ccfa7c269843001077df02d98918c6c9bde91395)] As some of the the board defines are also used in the cs89x0 ethernet driver by the i.MX31 ADS. Signed-off-by: Ian Lartey <ian@opensource.wolfsonmicro.com> Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
2010-10-19cpuimx51: update board supportEric Bénard3-1/+34
add NAND, SDHC Signed-off-by: Eric Bénard <eric@eukrea.com>
2010-10-19mx5: add cpuimx51sd module and its baseboardEric Bénard6-1/+531
Signed-off-by: Eric Bénard <eric@eukrea.com>
2010-10-19iomux-mx51: fix GPIO_1_xx 's IOMUX configurationEric Bénard1-10/+10
this patch really configure the GPIO in GPIO mode. Signed-off-by: Eric Bénard <eric@eukrea.com>
2010-10-19imx-esdhc: update devices registrationEric Bénard11-45/+80
Tested on i.MX25 and i.MX35 and i.MX51 Signed-off-by: Eric Bénard <eric@eukrea.com>
2010-10-19mx51: add resources for SD/MMC on i.MX51Eric Bénard2-0/+113
the attached patch allows SD to work on i.MX51 with Wolfram's drivers Tested on i.MX51. Based on original patch from: Richard Zhu <r65037@freescale.com> Signed-off-by: Eric Bénard <eric@eukrea.com>
2010-10-19iomux-mx51: fix SD1 and SD2's iomux configurationEric Bénard1-12/+27
Based on original patch from: Richard Zhu <r65037@freescale.com> Signed-off-by: Eric Bénard <eric@eukrea.com>
2010-10-19clock-mx51: rename CLOCK1 to CLOCK_CCGR for better readabilityEric Bénard1-2/+2
Signed-off-by: Eric Bénard <eric@eukrea.com>
2010-10-19clock-mx51: factorize clk_set_parent and clk_get_rateEric Bénard1-94/+48
Signed-off-by: Eric Bénard <eric@eukrea.com>
2010-10-19eukrea_mbimxsd: add support for DVI displaysEric Bénard2-2/+68
Signed-off-by: Eric Bénard <eric@eukrea.com>
2010-10-19cpuimx25 & cpuimx35: fix OTG port registration in host modeEric Bénard2-20/+8
the PHY is UTMI so don't create an ULPI viewpoint. Signed-off-by: Eric Bénard <eric@eukrea.com>
2010-10-19i.MX31 and i.MX35 : fix errate TLSbo65953 and ENGcm09472Eric Bénard1-3/+29
Without this exiting WFI can result in cache corruption. Code taken from Freescale's 2.6.27 BSP and tested on i.MX35 Signed-off-by: Eric Bénard <eric@eukrea.com>
2010-10-19mx25: fix compile error in platform-imx-dma.cEric Bénard1-0/+2
this patch fix the following errors : arch/arm/plat-mxc/devices/platform-imx-dma.c:44: error: ‘MX25_SDMA_BASE_ADDR’ undeclared here (not in a function) arch/arm/plat-mxc/devices/platform-imx-dma.c:44: error: ‘MX25_INT_SDMA’ undeclared here (not in a function) Signed-off-by: Eric Bénard <eric@eukrea.com> Acked-by: Uwe Kleine-König <u.kleine-koenig@pengutronix.de>
2010-10-19mx25: fix clock's calculationEric Bénard1-3/+3
* get_rate_arm : when 400MHz clock is selected (cctl & 1<<14), ARM clock is 400MHz (MPLL * 3 / 4) and not 800MHz * get_rate_per : peripherals's clock is derived from AHB and not from IPG (ref manual : figure 5-1) * can2_clk : use the correct ID * without this patch, peripherals getting their clock from PER clocks work fine because of the 2 errors which fix themselves (ARM clock x 2 and per clock actually based on IPG which is AHB/2) but flexcan can't work as it gets its clock from IPG and thus calculates its bitrate using a reference value which is twice what it really is. Signed-off-by: Eric Bénard <eric@eukrea.com>
2010-10-19ARM: imx: add lost 3rd imx-i2c device for mx35Marc Kleine-Budde1-0/+1
During the reorganisation of the imx-i2c devices (in 64de5ec168d9743903e6ec482c3e9f37af49f9c1) the 3rd imx-i2c device for the mx35 got lost. This patch adds the missing device. Signed-off-by: Marc Kleine-Budde <mkl@pengutronix.de> Acked-by: Uwe Kleine-König <u.kleine-koenig@pengutronix.de> Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
2010-10-19ARM: imx: Add iram allocator functionsDinh Nguyen4-0/+119
Add IRAM(Internal RAM) allocation functions using GENERIC_ALLOCATOR. The allocation size is 4KB multiples to guarantee alignment. The idea for these functions is for i.MX platforms to use them to dynamically allocate IRAM usage. Applies on 2.6.36-rc7 Signed-off-by: Dinh Nguyen <Dinh.Nguyen@freescale.com> Reviewed-by: Amit Kucheria <amit.kucheria@canonical.com> Acked-by: Uwe Kleine-König <u.kleine-koenig@pengutronix.de> Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
2010-10-19ARM: S5PV310: Fix build error on GPIO mapKukjin Kim2-2/+1
This patch fixes build error about GPIO address due to conflict of commit 4d914705 and 19a2c065. - commit 4d914705: Fix on GPIO base addresses - commit 19a2c065: Moves initial map for merging S5P64X0 Signed-off-by: Kukjin Kim <kgene.kim@samsung.com>
2010-10-19Merge branch 'hotplug' into develRussell King29-300/+403
Conflicts: arch/arm/kernel/head-common.S
2010-10-19Merge branches 'at91', 'dcache', 'ftrace', 'hwbpt', 'misc', 'mmci', 's3c', ↵Russell King154-945/+5693
'st-ux' and 'unwind' into devel
2010-10-19ARM: 6441/1: ux500: The platform is not just based on early drop silicon ↵Srinidhi Kasagar1-3/+1
version. Update Kconfig text accordingly. Signed-off-by: srinidhi kasagar <srinidhi.kasagar@stericsson.com> Acked-by: Linus Walleij <linus.walleij@stericsson.com> Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
2010-10-18irq_work: Add generic hardirq context callbacksPeter Zijlstra3-16/+5
Provide a mechanism that allows running code in IRQ context. It is most useful for NMI code that needs to interact with the rest of the system -- like wakeup a task to drain buffers. Perf currently has such a mechanism, so extract that and provide it as a generic feature, independent of perf so that others may also benefit. The IRQ context callback is generated through self-IPIs where possible, or on architectures like powerpc the decrementer (the built-in timer facility) is set to generate an interrupt immediately. Architectures that don't have anything like this get to do with a callback from the timer tick. These architectures can call irq_work_run() at the tail of any IRQ handlers that might enqueue such work (like the perf IRQ handler) to avoid undue latencies in processing the work. Signed-off-by: Peter Zijlstra <a.p.zijlstra@chello.nl> Acked-by: Kyle McMartin <kyle@mcmartin.ca> Acked-by: Martin Schwidefsky <schwidefsky@de.ibm.com> [ various fixes ] Signed-off-by: Huang Ying <ying.huang@intel.com> LKML-Reference: <1287036094.7768.291.camel@yhuang-dev> Signed-off-by: Ingo Molnar <mingo@elte.hu>
2010-10-18Merge branch 'linus' into core/lockingIngo Molnar20-26/+80
Merge reason: Update to almost-final-.36 Signed-off-by: Ingo Molnar <mingo@elte.hu>
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