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2021-03-15ARM: dts: colibri-imx6ull: Change drive strength for usdhc2Philippe Schenker1-6/+6
The current setting reflects about 86 Ohms of source-impedance on the SDIO signals where the WiFi board is hooked up. PCB traces are routed with 50 Ohms impedance and there are no serial resistors on those traces. This commit changes the source-impedance to 52 Ohms to better match our hardware design. The impedances given in this commit message refer to 3.3V operation. Signed-off-by: Philippe Schenker <philippe.schenker@toradex.com> Reviewed-by: Fabio Estevam <festevam@gmail.com> Signed-off-by: Shawn Guo <shawnguo@kernel.org>
2021-03-15ARM: dts: imx6ql-pfla02: Move "hog" pins into corresponded pin groupsAlexander Shiyan1-13/+17
Move the "hog" pins to the corresponding pin groups for SPI, ENET, PMIC, LEDs, so that these pins can be used for different purposes when the respective drivers are disabled. Signed-off-by: Alexander Shiyan <shc_work@mail.ru> Signed-off-by: Shawn Guo <shawnguo@kernel.org>
2021-03-15ARM: dts: imx6qdl-phytec-pbab01: Select synchronous mode for AUDMUXAlexander Shiyan1-2/+3
Board uses 4-wire synchronous mode for audio, so add SYN bit for PTCR AUDMUX registers. Signed-off-by: Alexander Shiyan <shc_work@mail.ru> Signed-off-by: Shawn Guo <shawnguo@kernel.org>
2021-03-15ARM: dts: imx6qdl-ts7970: Drop redundant "fsl,mode" optionAlexander Shiyan1-1/+0
The operating mode is used for the AC97 interface only, so lets drop the excess fsl,mode item from SSI node. Signed-off-by: Alexander Shiyan <shc_work@mail.ru> Signed-off-by: Shawn Guo <shawnguo@kernel.org>
2021-03-15ARM: dts: imx53-qsb: Describe the esdhc1 card detect pinFabio Estevam1-0/+2
The micro SD card slot uses GPIO3_13 as card detect pin, so describe it in the devicetree. This was noticed when converting imx53-qsb board to driver model in U-Boot as the micro SD card was not getting detected. Signed-off-by: Fabio Estevam <festevam@gmail.com> Signed-off-by: Shawn Guo <shawnguo@kernel.org>
2021-03-15ARM: dts: ls1021a: Harmonize DWC USB3 DT nodes nameSerge Semin1-1/+1
In accordance with the DWC USB3 bindings the corresponding node name is suppose to comply with the Generic USB HCD DT schema, which requires the USB nodes to have the name acceptable by the regexp: "^usb(@.*)?" . Make sure the "snps,dwc3"-compatible nodes are correctly named. Signed-off-by: Serge Semin <Sergey.Semin@baikalelectronics.ru> Acked-by: Krzysztof Kozlowski <krzk@kernel.org> Signed-off-by: Shawn Guo <shawnguo@kernel.org>
2021-03-15ARM: dts: imx6qdl-wandboard: add scl/sda gpios definitions for i2c bus recoveryDima Azarkin1-2/+22
The i2c bus on imx6qdl-wandboard has intermittent issues where SDA can freeze on low level at the end of transaction so the bus can no longer work. This impacts reading of EDID data leading to incorrect TV resolution and no audio. This scenario is improved by adding scl/sda gpios definitions to implement the i2c bus recovery mechanism. Signed-off-by: Dima Azarkin <azdmg@outlook.com> Reviewed-by: Fabio Estevam <festevam@gmail.com> Signed-off-by: Shawn Guo <shawnguo@kernel.org>
2021-03-15ARM: dts: imx: Mark IIM as syscon on i.MX51/i.MX53Sebastian Reichel2-2/+2
IIM contains system fuses with information like SoC unique ID (serial) on i.MX51 and i.MX53. Add "syscon" compatible allowing simple access. Signed-off-by: Sebastian Reichel <sebastian.reichel@collabora.com> Signed-off-by: Shawn Guo <shawnguo@kernel.org>
2021-03-15ARM: dts: imx6sl-tolino-shine2hd: Add Netronix embedded controllerAndreas Kemnade1-2/+5
For now, the driver detects an incompatible version, but since that can be handled by auto-detection, add the controller to the devicetree now. Only PWM seems to be available, there is no RTC in that controller. Signed-off-by: Andreas Kemnade <andreas@kemnade.info> Reviewed-by: Jonathan Neuschäfer <j.neuschaefer@gmx.net> Signed-off-by: Shawn Guo <shawnguo@kernel.org>
2021-03-15ARM: dts: imx50-kobo-aura: Add Netronix embedded controllerJonathan Neuschäfer1-1/+15
Enable the Netronix EC on the Kobo Aura ebook reader. Several features are still missing: - Frontlight/backlight. The vendor kernel drives the frontlight LED using the PWM output of the EC and an additional boost pin that increases the brightness. - Battery monitoring - Interrupts for RTC alarm and low-battery events Signed-off-by: Jonathan Neuschäfer <j.neuschaefer@gmx.net> Signed-off-by: Shawn Guo <shawnguo@kernel.org>
2021-03-15ARM: imx: Kconfig: Fix typo in helpNobuhiro Iwamatsu1-1/+1
Fix typo from i.MX31 to i.MX35 in i.MX35's help. Signed-off-by: Nobuhiro Iwamatsu <nobuhiro1.iwamatsu@toshiba.co.jp> Reviewed-by: Fabio Estevam <festevam@gmail.com> Signed-off-by: Shawn Guo <shawnguo@kernel.org>
2021-03-15ARM: mach-imx: Fix a spelling in the file pm-imx5.cBhaskar Chowdhury1-1/+1
s/confgiured/configured/ Signed-off-by: Bhaskar Chowdhury <unixbhaskar@gmail.com> Acked-by: Randy Dunlap <rdunlap@infradead.org> Signed-off-by: Shawn Guo <shawnguo@kernel.org>
2021-03-15ARM: imx: avic: Convert to using IRQCHIP_DECLARESaravana Kannan8-63/+15
Using IRQCHIP_DECLARE lets fw_devlink know that it should not wait for these interrupt controllers to be populated as struct devices. Without this change, fw_devlink=on will make the consumers of these interrupt controllers wait for the struct device to be added and thereby block the consumers' probes forever. Converting to IRQCHIP_DECLARE addresses boot issues on imx25 with fw_devlink=on that were reported by Martin. This also removes a lot of boilerplate code. Fixes: e590474768f1 ("driver core: Set fw_devlink=on by default") Reported-by: Martin Kaiser <martin@kaiser.cx> Signed-off-by: Saravana Kannan <saravanak@google.com> Tested-by: Martin Kaiser <martin@kaiser.cx> Reviewed-by: Fabio Estevam <festevam@gmail.com> Signed-off-by: Shawn Guo <shawnguo@kernel.org>
2021-03-14Merge tag 'irq-urgent-2021-03-14' of ↵Linus Torvalds1-0/+1
git://git.kernel.org/pub/scm/linux/kernel/git/tip/tip Pull irq fixes from Thomas Gleixner: "A set of irqchip updates: - Make the GENERIC_IRQ_MULTI_HANDLER configuration correct - Add a missing DT compatible string for the Ingenic driver - Remove the pointless debugfs_file pointer from struct irqdomain" * tag 'irq-urgent-2021-03-14' of git://git.kernel.org/pub/scm/linux/kernel/git/tip/tip: irqchip/ingenic: Add support for the JZ4760 dt-bindings/irq: Add compatible string for the JZ4760B irqchip: Do not blindly select CONFIG_GENERIC_IRQ_MULTI_HANDLER ARM: ep93xx: Select GENERIC_IRQ_MULTI_HANDLER directly irqdomain: Remove debugfs_file from struct irq_domain
2021-03-12Merge tag 'for-linus-5.12b-rc3-tag' of ↵Linus Torvalds1-3/+2
git://git.kernel.org/pub/scm/linux/kernel/git/xen/tip Pull xen fixes from Juergen Gross: "Two fix series and a single cleanup: - a small cleanup patch to remove unneeded symbol exports - a series to cleanup Xen grant handling (avoiding allocations in some cases, and using common defines for "invalid" values) - a series to address a race issue in Xen event channel handling" * tag 'for-linus-5.12b-rc3-tag' of git://git.kernel.org/pub/scm/linux/kernel/git/xen/tip: Xen/gntdev: don't needlessly use kvcalloc() Xen/gnttab: introduce common INVALID_GRANT_{HANDLE,REF} Xen/gntdev: don't needlessly allocate k{,un}map_ops[] Xen: drop exports of {set,clear}_foreign_p2m_mapping() xen/events: avoid handling the same event on two cpus at the same time xen/events: don't unmask an event channel when an eoi is pending xen/events: reset affinity of 2-level event when tearing it down
2021-03-12ARM: shmobile: defconfig: Refresh for v5.12-rc2Geert Uytterhoeven1-1/+0
Refresh the defconfig for Renesas ARM systems: - Drop CONFIG_ENABLE_MUST_CHECK=n (removed in commit 1967939462641d8b ("Compiler Attributes: remove CONFIG_ENABLE_MUST_CHECK")). Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be> Link: https://lore.kernel.org/r/20210310103213.2529983-1-geert+renesas@glider.be
2021-03-12ARM: OMAP2+: Stop building legacy code for dra7 and omap4/5Tony Lindgren5-6/+31
With the recent changes we are now booting am3/4, dra7, and omap4/5 without legacy data using devicetree, simple-pm-bus and genpd. Let's not initialize and build the legacy data unless CONFIG_OMAP_HWMOD is selected based on the SoCs enabled in .config. Signed-off-by: Tony Lindgren <tony@atomide.com>
2021-03-11x86/paravirt: Switch time pvops functions to use static_call()Juergen Gross2-11/+12
The time pvops functions are the only ones left which might be used in 32-bit mode and which return a 64-bit value. Switch them to use the static_call() mechanism instead of pvops, as this allows quite some simplification of the pvops implementation. Signed-off-by: Juergen Gross <jgross@suse.com> Signed-off-by: Borislav Petkov <bp@suse.de> Acked-by: Peter Zijlstra (Intel) <peterz@infradead.org> Link: https://lkml.kernel.org/r/20210311142319.4723-5-jgross@suse.com
2021-03-11ARM: dts: stm32: Add Engicam i.Core STM32MP1 EDIMM2.2 Starter KitJagan Teki2-0/+48
Engicam EDIMM2.2 Starter Kit is an EDIMM 2.2 Form Factor Capacitive Evaluation Board. Genaral features: - LCD 7" C.Touch - microSD slot - Ethernet 1Gb - Wifi/BT - 2x LVDS Full HD interfaces - 3x USB 2.0 - 1x USB 3.0 - HDMI Out - Mini PCIe - MIPI CSI - 2x CAN - Audio Out i.Core STM32MP1 is an EDIMM SoM based on STM32MP157A from Engicam. i.Core STM32MP1 needs to mount on top of this Evaluation board for creating complete i.Core STM32MP1 EDIMM2.2 Starter Kit. Add support for it. Signed-off-by: Jagan Teki <jagan@amarulasolutions.com> Signed-off-by: Alexandre Torgue <alexandre.torgue@foss.st.com>
2021-03-11ARM: dts: stm32: Add Engicam i.Core STM32MP1 C.TOUCH 2.0Jagan Teki2-0/+48
Engicam C.TOUCH 2.0 is an EDIMM compliant general purpose Carrier board. Genaral features: - Ethernet 10/100 - Wifi/BT - USB Type A/OTG - Audio Out - CAN - LVDS panel connector i.Core STM32MP1 is an EDIMM SoM based on STM32MP157A from Engicam. i.Core STM32MP1 needs to mount on top of this Carrier board for creating complete i.Core STM32MP1 C.TOUCH 2.0 board. Add support for it. Signed-off-by: Jagan Teki <jagan@amarulasolutions.com> Signed-off-by: Alexandre Torgue <alexandre.torgue@foss.st.com>
2021-03-11ARM: dts: stm32: Add Engicam i.Core STM32MP1 SoMJagan Teki1-0/+196
i.Core STM32MP1 is an EDIMM SoM based on STM32MP157A from Engicam. General features: - STM32MP157A - Up to 1GB DDR3L - 4GB eMMC - 10/100 Ethernet - USB 2.0 Host/OTG - I2S - MIPI DSI to LVDS - rest of STM32MP157A features i.Core STM32MP1 needs to mount on top of Engicam baseboards for creating complete platform solutions. Add support for it. Signed-off-by: Jagan Teki <jagan@amarulasolutions.com> Signed-off-by: Alexandre Torgue <alexandre.torgue@foss.st.com>
2021-03-11ARM: dts: stm32: Add Engicam MicroGEA STM32MP1 MicroDev 2.0 7" OFJagan Teki2-0/+155
7" OF is a capacitive touch 7" Open Frame panel solutions with - 7" AUO B101AW03 LVDS panel - EDT, FT5526 Touch MicroGEA STM32MP1 is a STM32MP157A based Micro SoM. MicroDev 2.0 is a general purpose miniature carrier board with CAN, LTE and LVDS panel interfaces. MicroGEA STM32MP1 needs to mount on top of MicroDev 2.0 board with pluged 7" OF for creating complete MicroGEA STM32MP1 MicroDev 2.0 7" Open Frame Solution board. Add support for it. Signed-off-by: Matteo Lisi <matteo.lisi@engicam.com> Signed-off-by: Francesco Utel <francesco.utel@engicam.com> Signed-off-by: Mirko Ardinghi <mirko.ardinghi@engicam.com> Signed-off-by: Jagan Teki <jagan@amarulasolutions.com> Signed-off-by: Alexandre Torgue <alexandre.torgue@foss.st.com>
2021-03-11ARM: dts: stm32: Add Engicam MicroGEA STM32MP1 MicroDev 2.0 boardJagan Teki2-0/+56
MicroDev 2.0 is a general purpose miniature carrier board with CAN, LTE and LVDS panel interfaces. Genaral features: - Ethernet 10/100 - USB Type A - Audio Out - microSD - LVDS panel connector - Wifi/BT (option) - UMTS LTE with sim connector (option) MicroGEA STM32MP1 is a STM32MP157A based Micro SoM. MicroGEA STM32MP1 needs to mount on top of this MicroDev 2.0 board for creating complete MicroGEA STM32MP1 MicroDev 2.0 Carrier board. Add support for it. Signed-off-by: Matteo Lisi <matteo.lisi@engicam.com> Signed-off-by: Francesco Utel <francesco.utel@engicam.com> Signed-off-by: Mirko Ardinghi <mirko.ardinghi@engicam.com> Signed-off-by: Jagan Teki <jagan@amarulasolutions.com> Signed-off-by: Alexandre Torgue <alexandre.torgue@foss.st.com>
2021-03-11ARM: dts: stm32: Add Engicam MicroGEA STM32MP1 SoMJagan Teki1-0/+148
MicroGEA STM32MP1 is a STM32MP157A based Micro SoM. General features: - STM32MP157AAC - Up to 1GB DDR3L-800 - 512MB Nand flash - I2S MicroGEA STM32MP1 needs to mount on top of Engicam MicroDev carrier boards for creating complete platform solutions. Add support for it. Signed-off-by: Matteo Lisi <matteo.lisi@engicam.com> Signed-off-by: Francesco Utel <francesco.utel@engicam.com> Signed-off-by: Mirko Ardinghi <mirko.ardinghi@engicam.com> Signed-off-by: Jagan Teki <jagan@amarulasolutions.com> Signed-off-by: Alexandre Torgue <alexandre.torgue@foss.st.com>
2021-03-11ARM: dts: stm32: fix usart 2 & 3 pinconf to wake up with flow controlValentin CARON - foss1-3/+18
Modify usart 2 & 3 pins to allow wake up from low power mode while the hardware flow control is activated. UART RTS pin need to stay configure in idle mode to receive characters in order to wake up. Fixes: 842ed898a757 ("ARM: dts: stm32: add usart2, usart3 and uart7 pins in stm32mp15-pinctrl") Signed-off-by: Valentin Caron <valentin.caron@foss.st.com> Signed-off-by: Alexandre Torgue <alexandre.torgue@foss.st.com>
2021-03-11Xen/gnttab: introduce common INVALID_GRANT_{HANDLE,REF}Jan Beulich1-1/+2
It's not helpful if every driver has to cook its own. Generalize xenbus'es INVALID_GRANT_HANDLE and pcifront's INVALID_GRANT_REF (which shouldn't have expanded to zero to begin with). Use the constants in p2m.c and gntdev.c right away, and update field types where necessary so they would match with the constants' types (albeit without touching struct ioctl_gntdev_grant_ref's ref field, as that's part of the public interface of the kernel and would require introducing a dependency on Xen's grant_table.h public header). Signed-off-by: Jan Beulich <jbeulich@suse.com> Reviewed-by: Juergen Gross <jgross@suse.com> Link: https://lore.kernel.org/r/db7c38a5-0d75-d5d1-19de-e5fe9f0b9c48@suse.com Signed-off-by: Boris Ostrovsky <boris.ostrovsky@oracle.com>
2021-03-11Xen: drop exports of {set,clear}_foreign_p2m_mapping()Jan Beulich1-2/+0
They're only used internally, and the layering violation they contain (x86) or imply (Arm) of calling HYPERVISOR_grant_table_op() strongly advise against any (uncontrolled) use from a module. The functions also never had users except the ones from drivers/xen/grant-table.c forever since their introduction in 3.15. Signed-off-by: Jan Beulich <jbeulich@suse.com> Reviewed-by: Stefano Stabellini <sstabellini@kernel.org> Link: https://lore.kernel.org/r/746a5cd6-1446-eda4-8b23-03c1cac30b8d@suse.com Signed-off-by: Boris Ostrovsky <boris.ostrovsky@oracle.com>
2021-03-10ARM: dts: at91: sam9x60: fix mux-mask to match product's datasheetNicolas Ferre2-8/+9
Fix the whole mux-mask table according to datasheet for the sam9x60 product. Too much functions for pins were disabled leading to misunderstandings when enabling more peripherals or taking this table as an example for another board. Take advantage of this fix to move the mux-mask in the SoC file where it belongs and use lower case letters for hex numbers like everywhere in the file. Signed-off-by: Nicolas Ferre <nicolas.ferre@microchip.com> Fixes: 1e5f532c2737 ("ARM: dts: at91: sam9x60: add device tree for soc and board") Cc: <stable@vger.kernel.org> # 5.6+ Cc: Sandeep Sheriker Mallikarjun <sandeepsheriker.mallikarjun@microchip.com> Reviewed-by: Tudor Ambarus <tudor.ambarus@microchip.com> Link: https://lore.kernel.org/r/20210310152006.15018-1-nicolas.ferre@microchip.com
2021-03-10ARM: dts: at91: sam9x60: fix mux-mask for PA7 so it can be set to A, B and CFederico Pellegrin1-1/+1
According to the datasheet PA7 can be set to either function A, B or C (see table 6-2 of DS60001579D). The previous value would permit just configuring with function C. Signed-off-by: Federico Pellegrin <fede@evolware.org> Fixes: 1e5f532c2737 ("ARM: dts: at91: sam9x60: add device tree for soc and board") Cc: <stable@vger.kernel.org> # 5.6+ Cc: Sandeep Sheriker Mallikarjun <sandeepsheriker.mallikarjun@microchip.com> Signed-off-by: Nicolas Ferre <nicolas.ferre@microchip.com>
2021-03-10ARM: dts: at91-sama5d27_som1: fix phy address to 7Claudiu Beznea1-2/+2
Fix the phy address to 7 for Ethernet PHY on SAMA5D27 SOM1. No connection established if phy address 0 is used. The board uses the 24 pins version of the KSZ8081RNA part, KSZ8081RNA pin 16 REFCLK as PHYAD bit [2] has weak internal pull-down. But at reset, connected to PD09 of the MPU it's connected with an internal pull-up forming PHYAD[2:0] = 7. Signed-off-by: Claudiu Beznea <claudiu.beznea@microchip.com> Fixes: 2f61929eb10a ("ARM: dts: at91: at91-sama5d27_som1: fix PHY ID") Cc: Ludovic Desroches <ludovic.desroches@microchip.com> Signed-off-by: Nicolas Ferre <nicolas.ferre@microchip.com> Cc: <stable@vger.kernel.org> # 4.14+
2021-03-10Merge branches 'omap-for-v5.13/genpd-dra7', 'omap-for-v5.13/genpd-omap4' and ↵Tony Lindgren14-2113/+1
'omap-for-v5.13/genpd-omap5' into omap-for-v5.13/genpd-drop-legacy Merge together branches dropping legacy data to avoid a minor merge conflict.
2021-03-10Merge tags 'genpd-dts-dra7', 'genpd-dts-omap4' and 'genpd-dts-omap5' into ↵Tony Lindgren5-167/+321
omap-for-v5.13/dts-genpd Merge together genpd related dts changes to provide base for dropping the legacy data to prevent merge conflicts and to send dts changes separately.
2021-03-10ARM: OMAP2+: Drop legacy platform data for omap5 hwmodTony Lindgren5-42/+0
We can now probe interconnects with simple-pm-bus and genpd. Signed-off-by: Tony Lindgren <tony@atomide.com>
2021-03-10ARM: OMAP2+: Drop legacy platform data for omap5 l3Tony Lindgren2-115/+0
We can now probe interconnects with simple-pm-bus and genpd. Signed-off-by: Tony Lindgren <tony@atomide.com>
2021-03-10ARM: OMAP2+: Drop legacy platform data for omap5 l4_cfgTony Lindgren1-58/+0
We can now probe interconnects with simple-pm-bus and genpd. Signed-off-by: Tony Lindgren <tony@atomide.com>
2021-03-10ARM: OMAP2+: Drop legacy platform data for omap5 l4_perTony Lindgren1-23/+1
We can now probe interconnects with simple-pm-bus and genpd. Signed-off-by: Tony Lindgren <tony@atomide.com>
2021-03-10ARM: OMAP2+: Drop legacy platform data for omap5 l4_wkupTony Lindgren1-23/+1
We can now probe interconnects with simple-pm-bus and genpd. Signed-off-by: Tony Lindgren <tony@atomide.com>
2021-03-10ARM: OMAP2+: Drop legacy platform data for omap5 sataTony Lindgren1-46/+0
We can now probe devices with ti-sysc interconnect driver and dts data. Let's drop the related platform data and custom ti,hwmods dts property. As we're just dropping data, and the early platform data init is based on the custom ti,hwmods property, we want to drop both the platform data and ti,hwmods property in a single patch. Signed-off-by: Tony Lindgren <tony@atomide.com>
2021-03-10ARM: OMAP2+: Drop legacy platform data for omap5 mpuTony Lindgren1-71/+0
We can now probe devices with ti-sysc interconnect driver and dts data. Let's drop the related platform data and custom ti,hwmods dts property. As we're just dropping data, and the early platform data init is based on the custom ti,hwmods property, we want to drop both the platform data and ti,hwmods property in a single patch. Signed-off-by: Tony Lindgren <tony@atomide.com>
2021-03-10ARM: OMAP2+: Drop legacy platform data for omap5 emifTony Lindgren2-69/+0
We can now probe devices with ti-sysc interconnect driver and dts data. Let's drop the related platform data and custom ti,hwmods dts property. As we're just dropping data, and the early platform data init is based on the custom ti,hwmods property, we want to drop both the platform data and ti,hwmods property in a single patch. Signed-off-by: Tony Lindgren <tony@atomide.com>
2021-03-10ARM: OMAP2+: Drop legacy platform data for omap5 dmmTony Lindgren2-31/+0
We can now probe devices with ti-sysc interconnect driver and dts data. Let's drop the related platform data and custom ti,hwmods dts property. As we're just dropping data, and the early platform data init is based on the custom ti,hwmods property, we want to drop both the platform data and ti,hwmods property in a single patch. Signed-off-by: Tony Lindgren <tony@atomide.com>
2021-03-10ARM: dts: Configure simple-pm-bus for omap5 l3Tony Lindgren1-1/+5
We can now probe interconnects with device tree only configuration using simple-pm-bus and genpd. Signed-off-by: Tony Lindgren <tony@atomide.com>
2021-03-10ARM: dts: Configure simple-pm-bus for omap5 l4_cfgTony Lindgren1-8/+11
We can now probe interconnects with device tree only configuration using simple-pm-bus and genpd. Signed-off-by: Tony Lindgren <tony@atomide.com>
2021-03-10ARM: dts: Configure simple-pm-bus for omap5 l4_perTony Lindgren1-3/+6
We can now probe interconnects with device tree only configuration using simple-pm-bus and genpd. Signed-off-by: Tony Lindgren <tony@atomide.com>
2021-03-10ARM: dts: Configure simple-pm-bus for omap5 l4_wkupTony Lindgren1-4/+7
We can now probe interconnects with device tree only configuration using simple-pm-bus and genpd. Signed-off-by: Tony Lindgren <tony@atomide.com>
2021-03-10ARM: dts: Move omap5 l3-noc to a separate nodeTony Lindgren1-6/+10
In preparation for probing l3 with simple-pm-bus and genpd, we must move l3 noc to a separate node. This is to prevent omap_l3_noc.c driver from claiming the whole l3 instance before simple-pm-bus has a chance to probe. Signed-off-by: Tony Lindgren <tony@atomide.com>
2021-03-10ARM: dts: Move omap5 mmio-sram out of l3 interconnectTony Lindgren1-5/+9
We need mmio-sram early for omap4_sram_init() for IO barrier init, and will be moving l3 interconnect to probe with simple-pm-bus that probes at module_init() time. So let's move mmio-sram out of l3 to prepare for that. Otherwise we will get the following after probing the interconnects with simple-pm-bus: omap4_sram_init:Unable to get sram pool needed to handle errata I688 Signed-off-by: Tony Lindgren <tony@atomide.com>
2021-03-10ARM: dts: Configure interconnect target module for omap5 sataTony Lindgren2-15/+25
We can now probe devices with device tree only configuration using ti-sysc interconnect target module driver. Let's configure the module, but keep the legacy "ti,hwmods" peroperty to avoid new boot time warnings. The legacy property will be removed in later patches together with the legacy platform data. Note that the old sysc register offset is wrong, the real offset is at 0x1100 as listed in TRM for SATA_SYSCONFIG register. Looks like we've been happily using sata on the bootloader configured sysconfig register and nobody noticed. Also the old register range for SATAMAC_wrapper registers is wrong at 7 while it should be 8. But that too seems harmless. There is also an L3 parent interconnect range that we don't seem to be using. That can be added as needed later on. Signed-off-by: Tony Lindgren <tony@atomide.com>
2021-03-10ARM: dts: Configure interconnect target module for omap5 gpmcTony Lindgren1-16/+33
We can now probe devices with device tree only configuration using ti-sysc interconnect target module driver. Let's configure the module, but keep the legacy "ti,hwmods" property to avoid new boot time warnings. The legacy property will be removed in later patches together with the legacy platform data. Signed-off-by: Tony Lindgren <tony@atomide.com>
2021-03-10ARM: dts: Configure interconnect target module for omap5 mpuTony Lindgren1-13/+15
We can now probe devices with device tree only configuration using ti-sysc interconnect target module driver. Signed-off-by: Tony Lindgren <tony@atomide.com>
generated by cgit v1.2.3 (git 2.39.0) at 2025-10-01 23:03:01 +0300