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Some new driver support for the Ux500 devices landed in
v5.12-rc1 so update the defconfig to use them:
- TM2 touchkey, used on the Golden and Janice.
- SPI GPIO, used for the Janice display control.
- NTC thermistor, used for the HREF temperature
sensors.
- V4L2 flash control that gives support for LED
torch to userspaces such as Phosh.
- The LEDs Flash class and RT8515 Flash/torch LED
driver used in all the Samsung mobiles.
- FSA9480 extcon, used by Janice.
- BMC150 accelerometer, used by Janice.
- IIO rescaler, used for thermistors and ALS
on Janice.
- MPU3050 gyroscope driver used by Janice.
- Yamaha YAS530 magnetometer driver used by Janice.
Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
Cc: Stephan Gerhold <stephan@gerhold.net>
Link: https://lore.kernel.org/r/20210301232050.1457397-1-linus.walleij@linaro.org'
Signed-off-by: Arnd Bergmann <arnd@arndb.de>
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git://git.kernel.org/pub/scm/linux/kernel/git/at91/linux into arm/soc
AT91 soc for 5.13:
- Fixing a W=1 warning
* tag 'at91-soc-5.13' of git://git.kernel.org/pub/scm/linux/kernel/git/at91/linux:
ARM: at91: pm: Move prototypes to mutually included header
Link: https://lore.kernel.org/r/20210401174544.32193-1-nicolas.ferre@microchip.com
Signed-off-by: Arnd Bergmann <arnd@arndb.de>
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git://git.kernel.org/pub/scm/linux/kernel/git/shawnguo/linux into arm/soc
i.MX SoC update for 5.13:
- A couple of typo fixes on help text and comment.
* tag 'imx-soc-5.13' of git://git.kernel.org/pub/scm/linux/kernel/git/shawnguo/linux:
ARM: imx: Kconfig: Fix typo in help
ARM: mach-imx: Fix a spelling in the file pm-imx5.c
Link: https://lore.kernel.org/r/20210331041019.31345-2-shawnguo@kernel.org
Signed-off-by: Arnd Bergmann <arnd@arndb.de>
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git://git.kernel.org/pub/scm/linux/kernel/git/tmlind/linux-omap into arm/soc
Drop legacy data for dra7 and omap4/5 for genpd support for v5.13
Similar to what we have already done for am3 and 4, we can now boot dra7,
omap4, and omap5 with devicetree data and genpd without legacy SoC specific
built-in data.
Let's drop the legacy data for these SoCs, and the related "ti,hwmods"
custom devicetree property. As with these changes we now expect to have
complete devicetree data, let's also warn in the case if an old devicetree
data is noticed. And with the warning provided, there should not be any
need to delay dropping the legacy data as it just unnecessarily complicates
things.
The main reasons for dropping the legacy data is to avoid the burden of
maintaining a mixed boot process where both legacy built-in data and
devicetree data are needed. And we can now use standard reset driver,
genpd, and simple-pm-bus features.
These patches are based on the related devicetree changes to add the
missing interconnect target module configuration for these SoCs.
* tag 'omap-for-v5.13/genpd-cleanup-signed' of git://git.kernel.org/pub/scm/linux/kernel/git/tmlind/linux-omap: (87 commits)
bus: ti-sysc: Warn about old dtb for dra7 and omap4/5
ARM: OMAP2+: Stop building legacy code for dra7 and omap4/5
ARM: OMAP2+: Drop legacy platform data for omap5 hwmod
ARM: OMAP2+: Drop legacy platform data for omap5 l3
ARM: OMAP2+: Drop legacy platform data for omap5 l4_cfg
ARM: OMAP2+: Drop legacy platform data for omap5 l4_per
ARM: OMAP2+: Drop legacy platform data for omap5 l4_wkup
ARM: OMAP2+: Drop legacy platform data for omap5 sata
ARM: OMAP2+: Drop legacy platform data for omap5 mpu
ARM: OMAP2+: Drop legacy platform data for omap5 emif
ARM: OMAP2+: Drop legacy platform data for omap5 dmm
ARM: dts: Configure simple-pm-bus for omap5 l3
ARM: dts: Configure simple-pm-bus for omap5 l4_cfg
ARM: dts: Configure simple-pm-bus for omap5 l4_per
ARM: dts: Configure simple-pm-bus for omap5 l4_wkup
ARM: dts: Move omap5 l3-noc to a separate node
ARM: dts: Move omap5 mmio-sram out of l3 interconnect
ARM: dts: Configure interconnect target module for omap5 sata
ARM: dts: Configure interconnect target module for omap5 gpmc
ARM: dts: Configure interconnect target module for omap5 mpu
...
Link: https://lore.kernel.org/r/pull-1617004205-537424@atomide.com-3
Signed-off-by: Arnd Bergmann <arnd@arndb.de>
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The ux500_cpu_die function is not exported so make it static
to avoid the following warning:
arch/arm/mach-ux500/platsmp.c:89:6: warning: symbol 'ux500_cpu_die' was not declared. Should it be static?
Signed-off-by: Ben Dooks <ben.dooks@codethink.co.uk>
Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
Link: https://lore.kernel.org/r/20210323083203.1646842-1-linus.walleij@linaro.org'
Signed-off-by: Arnd Bergmann <arnd@arndb.de>
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git://git.kernel.org/pub/scm/linux/kernel/git/dinguyen/linux into arm/drivers
SoCFPGA updates for v5.13
- Patches from Krzysztof Kozlowski the cleans up and consolidate support for
SoCFPGA platforms
- Rename ARCH_SOCFPGA into ARCH_INTEL_SOCFPGA
- Consolidate ARCH_STRATIX10 into ARCH_INTEL_SOCFPGA
- Consolidate ARCH_AGILEX into ARCH_INTEL_SOCFPGA
- Consolidate ARCH_N5X into ARCH_INTEL_SOCFPGA
* tag 'socfpga_update_for_v5.13' of git://git.kernel.org/pub/scm/linux/kernel/git/dinguyen/linux:
ARM: socfpga: drop ARCH_SOCFPGA
reset: socfpga: use ARCH_INTEL_SOCFPGA also for 32-bit ARM SoCs
i2c: altera: use ARCH_INTEL_SOCFPGA also for 32-bit ARM SoCs
fpga: altera: use ARCH_INTEL_SOCFPGA also for 32-bit ARM SoCs
dmaengine: socfpga: use ARCH_INTEL_SOCFPGA also for 32-bit ARM SoCs
clk: socfpga: use ARCH_INTEL_SOCFPGA also for 32-bit ARM SoCs (and compile test)
clk: socfpga: allow compile testing of Stratix 10 / Agilex clocks
arm64: socfpga: merge Agilex and N5X into ARCH_INTEL_SOCFPGA
EDAC: altera: merge ARCH_SOCFPGA and ARCH_STRATIX10
clk: socfpga: merge ARCH_SOCFPGA and ARCH_STRATIX10
clk: socfpga: build together Stratix 10, Agilex and N5X clock drivers
net: stmmac: merge ARCH_SOCFPGA and ARCH_STRATIX10
mfd: altera: merge ARCH_SOCFPGA and ARCH_STRATIX10
ARM: socfpga: introduce common ARCH_INTEL_SOCFPGA
clk: socfpga: allow building N5X clocks with ARCH_N5X
Link: https://lore.kernel.org/r/20210330110430.558182-1-dinguyen@kernel.org
Signed-off-by: Arnd Bergmann <arnd@arndb.de>
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git://git.kernel.org/pub/scm/linux/kernel/git/matthias.bgg/linux into arm/dt
- fix dtbs_check warnings
- enable SMP for mt6589
* tag 'v5.12-next-dts32' of git://git.kernel.org/pub/scm/linux/kernel/git/matthias.bgg/linux:
arm: mediatek: dts: activate SMP for mt6589
arm: dts: mt2701: harmonize node names and compatibles
arm: dts: mt7623: harmonize node names and compatibles
arm: dts: mt7629: harmonize node names and compatibles
Link: https://lore.kernel.org/r/be262120-6cd9-87a7-ccc3-f5c403cff66b@gmail.com
Signed-off-by: Arnd Bergmann <arnd@arndb.de>
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git://git.kernel.org/pub/scm/linux/kernel/git/tegra/linux into arm/dt
ARM: tegra: Device tree changes for v5.13-rc1
This contains a couple of improvements and fixes for various 32-bit
Tegra-based boards.
* tag 'tegra-for-5.13-arm-dt' of git://git.kernel.org/pub/scm/linux/kernel/git/tegra/linux:
ARM: tegra: acer-a500: Add atmel,wakeup-method property
ARM: tegra: Specify tps65911 as wakeup source
ARM: tegra: Specify memory suspend OPP in device-tree
ARM: tegra: Specify CPU suspend OPP in device-tree
ARM: tegra: ouya: Specify all CPU cores as cooling devices
ARM: tegra: nexus7: Specify all CPU cores as cooling devices
ARM: tegra: acer-a500: Rename avdd to vdda of touchscreen node
ARM: tegra: acer-a500: Specify all CPU cores as cooling devices
ARM: tegra: acer-a500: Reduce thermal throttling hysteresis to 0.2C
ARM: tegra: acer-a500: Enable core voltage scaling
ARM: tegra: paz00: Enable full voltage scaling ranges for CPU and Core domains
ARM: tegra: cardhu: Support CPU thermal throttling
ARM: tegra: cardhu: Support CPU frequency and voltage scaling on all board variants
ARM: tegra: ventana: Support CPU thermal throttling
ARM: tegra: ventana: Support CPU and Core voltage scaling
Link: https://lore.kernel.org/r/20210401172622.3352990-4-thierry.reding@gmail.com
Signed-off-by: Arnd Bergmann <arnd@arndb.de>
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git://git.kernel.org/pub/scm/linux/kernel/git/atorgue/stm32 into arm/dt
STM32 DT updates for v5.13, round 1
Highlights:
----------
MCU part:
-Add stm32h750 SoC support. It is based on stm32h743 and embeds
crypto IPs and 2 ADC.
-Add new art-pi board based on stm32h750. This board embeds:
-8MB QSPI flash.
-16MB SPI flash.
-32MB SDRAM.
-AP6212 combo (wifi/bt/fm).
MPU part:
-Use dedicated PTP clock for Ethernet controller on stm32mp151.
-Enable i2c analog filter on stm32mp151.
-DH:
-Update GPIO names.
-Enable crc1 & crryp1 on DHSOM.
-Engicam: add new boards support:
-MicroGEA SOM which embeds STM32MP157aac, 512 MB Nand Flash
I2S.
-MicroGEA STM32MP1 Microdev 2.0 which embeds MicroGEA SOM,
Ethernet up to 100 Mbps, USB typeA, microSD, UMTS LTE, Wifi/BT
LVDS panel connector.
-MicroGEA STM32MP1 MicroDev 2.0 7" which embeds a MicroGEA STM32MP1
MicroDev 2.0 plus 7" Open Frame panel solution (7" AUO B101AW03 LVDS panel
and EDT DT5526 Touch)
-i.Core STM32MP1 EDIMM SoM based on STM32MP157A.
-C.TOUCH 2.0 n EDIMM compliant general purpose Carrier board with capacitive
touch interface support based on i.Core STM32MP1 EDIMM SoM.
It embeds ETH 10/100, wifi/bt, CAN, USB TypeA/OTG, LVDS pannel connector.
-EDIMM2.2 Starter Kit is an EDIMM 2.2 Form Factor Capacitive Evaluation
Board based on i.Core STM32MP1 EDIMM SoM. IT embeds LCD 7" C.Touch,
wifi/bt,2*LVDS FHD, 3*USB2, 1*USB3 ...
* tag 'stm32-dt-for-v5.13-1' of git://git.kernel.org/pub/scm/linux/kernel/git/atorgue/stm32: (26 commits)
ARM: dts: stm32: Add PTP clock to Ethernet controller
ARM: dts: stm32: Enable crc1 and cryp1 where applicable on DHSOM
ARM: dts: stm32: Update GPIO line names on PicoITX
ARM: dts: stm32: Update GPIO line names on DRC02
ARM: dts: stm32: Fill GPIO line names on AV96
ARM: dts: stm32: Fill GPIO line names on DHCOM SoM
dt-bindings: serial: stm32: Use 'type: object' instead of false for 'additionalProperties'
ARM: stm32: Add a new SoC - STM32H750
ARM: dts: stm32: add support for art-pi board based on stm32h750xbh6
ARM: dts: stm32: fix i2c node typo in stm32h743
ARM: dts: stm32: add new instances for stm32h743 MCU
ARM: dts: stm32: introduce stm32h7-pinctrl.dtsi to support stm32h750
dt-bindings: arm: stm32: Add compatible strings for ART-PI board
Documentation: arm: stm32: Add stm32h750 value line doc
ARM: dts: stm32: enable the analog filter for all I2C nodes in stm32mp151
ARM: dts: stm32: Add Engicam i.Core STM32MP1 EDIMM2.2 Starter Kit
dt-bindings: arm: stm32: Add Engicam i.Core STM32MP1 EDIMM2.2 Starter Kit
ARM: dts: stm32: Add Engicam i.Core STM32MP1 C.TOUCH 2.0
ARM: dts: stm32: Add Engicam i.Core STM32MP1 SoM
dt-bindings: arm: stm32: Add Engicam i.Core STM32MP1 C.TOUCH 2.0
...
Link: https://lore.kernel.org/r/48784f53-943b-0baf-d4a0-fcb7d3849b00@foss.st.com
Signed-off-by: Arnd Bergmann <arnd@arndb.de>
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git://git.kernel.org/pub/scm/linux/kernel/git/linusw/linux-nomadik into arm/dt
Ux500 DTS changes for the v5.13 kernel cycle:
- Fix up the WLAN on Janice
- Fix the touchscreen on TVK R2
- Push down definitions to the UIBs instead of
trying to share too much.
- Bump the AUX1 voltage on the AB8500 so the
touchscreen will work.
- Define the CTTYSP touchscreen on the TVK R3.
* tag 'ux500-dts-v5.13' of git://git.kernel.org/pub/scm/linux/kernel/git/linusw/linux-nomadik:
ARM: dts: ux500: Add Cypress CTTYSP touch to TVK UIB
ARM: dts: ux500: Bump AUX1 voltage
ARM: dts: ux500: Clarify UIB version per board
ARM: dts: ux500: Totally separate TVK R2 and R3
ARM: dts: ux500: Push TC35893 defines to each UIB
ARM: dts: ux500: Fix up TVK R3 sensors
ARM: dts: ux500: Push sensors to TVK R2 board
ARM: dts: ux500: Move Synaptics to right include
ARM: dts: ux500: Fix touchscreen on TVK R2
ARM: dts: ux500: Fix BT+WLAN on Janice
Link: https://lore.kernel.org/r/CACRpkdanRQ6A85d=7vgpzbg-m3-yFcpQ4fuzrxZu3RJ0DrA2bQ@mail.gmail.com
Signed-off-by: Arnd Bergmann <arnd@arndb.de>
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git://git.kernel.org/pub/scm/linux/kernel/git/shawnguo/linux into arm/dt
i.MX device tree change for 5.13:
- New board support: i.MX7D based reMarkable2.
- Clean up imx6ql-pfla02 hog group by moving pins into corresponded
client groups.
- Add Netronix embedded controller for imx50-kobo-aura.
- A series from Sebastian Reichel to improve GE Bx50v3 device trees.
- Support I2C bus recovery for imx6qdl-wandboard by adding SCL/SDA
GPIOs.
- Remove unnecessary #address-cells/#size-cells from imx6qdl-gw boards.
- Various small and random device tree update.
* tag 'imx-dt-5.13' of git://git.kernel.org/pub/scm/linux/kernel/git/shawnguo/linux: (21 commits)
ARM: dts: imx6: pbab01: Set USB OTG port to peripheral
ARM: dts: imx6: pfla02: Fix USB vbus enable pinmuxing
ARM: imx7d-remarkable2: Initial device tree for reMarkable2
ARM: dts: imx7d-mba7: Remove unsupported PCI properties
ARM: dts: imx6qdl-gw*: Remove unnecessary #address-cells/#size-cells
ARM: dts: imx6dl-plybas: Fix gpio-keys W=1 warnings
ARM: dts: imx: bx50v3: Define GPIO line names
ARM: dts: imx: bx50v3: i2c GPIOs are open drain
ARM: dts: imx6q-ba16: improve PHY information
ARM: dts: imx6q-ba16: add USB OTG VBUS enable GPIO
ARM: dts: ls1021a: mark crypto engine dma coherent
ARM: dts: colibri-imx6ull: Change drive strength for usdhc2
ARM: dts: imx6ql-pfla02: Move "hog" pins into corresponded pin groups
ARM: dts: imx6qdl-phytec-pbab01: Select synchronous mode for AUDMUX
ARM: dts: imx6qdl-ts7970: Drop redundant "fsl,mode" option
ARM: dts: imx53-qsb: Describe the esdhc1 card detect pin
ARM: dts: ls1021a: Harmonize DWC USB3 DT nodes name
ARM: dts: imx6qdl-wandboard: add scl/sda gpios definitions for i2c bus recovery
ARM: dts: imx: Mark IIM as syscon on i.MX51/i.MX53
ARM: dts: imx6sl-tolino-shine2hd: Add Netronix embedded controller
...
Link: https://lore.kernel.org/r/20210331041019.31345-4-shawnguo@kernel.org
Signed-off-by: Arnd Bergmann <arnd@arndb.de>
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https://github.com/Broadcom/stblinux into arm/dt
This pull request contains Broadcom ARM-based SoCs Device Tree changes
for 5.13, please pull the following:
- Rafal fixes YAML warnings for the memory nodes of BCM5301X nodes and
adds support for the NVMEM NVRAM node on Linksys and Luxul WLAN
routers. He also fixes up the partitions for the Linksys EA9400 to
use the newly introduced parser compatible and sets the power LED to
its default state.
* tag 'arm-soc/for-5.13/devicetree' of https://github.com/Broadcom/stblinux:
ARM: dts: BCM5301X: Set Linksys EA9500 power LED
ARM: dts: BCM5301X: Fix Linksys EA9500 partitions
ARM: dts: BCM5301X: Describe NVMEM NVRAM on Linksys & Luxul routers
ARM: dts: BCM5301X: fix "reg" formatting in /memory node
Link: https://lore.kernel.org/r/20210330184006.1451315-1-f.fainelli@gmail.com
Signed-off-by: Arnd Bergmann <arnd@arndb.de>
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git://git.kernel.org/pub/scm/linux/kernel/git/tmlind/linux-omap into arm/dt
Devicetree changes for omaps for genpd support for v5.13
In order to move omap4/5 and dra7 to probe with devicetree data and genpd,
we need to add the missing interconnect target module configuration for
the drivers that do not still have it. This is similar to what we have
already done earlier for am3 and 4 earlier.
These patches are very much similar for all the three SoCs here. The dra7
changes were already available for v5.12 merge window, but were considered
too late to add for v5.12. The patches for omap4 and 5 follow the same
pattern, except for PCIe that is available only on dra7.
We do the changes one driver at a time, and still keep the legacy property
for "ti,hwmods" mostly around, except for cases when already not needed.
We will be dropping the custom property and related legacy data in a
follow-up series.
* tag 'omap-for-v5.13/dts-genpd-signed' of git://git.kernel.org/pub/scm/linux/kernel/git/tmlind/linux-omap: (53 commits)
ARM: dts: Configure simple-pm-bus for omap5 l3
ARM: dts: Configure simple-pm-bus for omap5 l4_cfg
ARM: dts: Configure simple-pm-bus for omap5 l4_per
ARM: dts: Configure simple-pm-bus for omap5 l4_wkup
ARM: dts: Move omap5 l3-noc to a separate node
ARM: dts: Move omap5 mmio-sram out of l3 interconnect
ARM: dts: Configure interconnect target module for omap5 sata
ARM: dts: Configure interconnect target module for omap5 gpmc
ARM: dts: Configure interconnect target module for omap5 mpu
ARM: dts: Configure interconnect target module for omap5 emif
ARM: dts: Configure interconnect target module for omap5 dmm
ARM: dts: Prepare for simple-pm-bus for omap4 l3
ARM: dts: Configure simple-pm-bus for omap4 l4_cfg
ARM: dts: Configure simple-pm-bus for omap4 l4_per
ARM: dts: Configure simple-pm-bus for omap4 l4_wkup
ARM: dts: Move omap4 l3-noc to a separate node
ARM: dts: Move omap4 mmio-sram out of l3 interconnect
ARM: dts: Configure interconnect target module for omap4 mpu
ARM: dts: Configure interconnect target module for omap4 debugss
ARM: dts: Configure interconnect target module for omap4 emif
...
Link: https://lore.kernel.org/r/pull-1617004205-537424@atomide.com-2
Signed-off-by: Arnd Bergmann <arnd@arndb.de>
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pwm_request() is deprecated because (among others) it depends on a global
numbering of PWM devices. So register a pwm_lookup to pick the right PWM
device (identified by provider and its local id) and use pwm_get().
Before this patch the PWM #1 was used. This is provided by the
samsung-pwm device which is the only PWM provider on this machine. The
local offset is 1, see also commit c107fe904a10 ("ARM: S3C24XX: Use PWM
lookup table for mach-rx1950") with a similar conversion for PWM #0.
As a follow up specify the period only once and symmetrically use pwm_put()
instead of pwm_free() to drop the reference.
Signed-off-by: Uwe Kleine-König <u.kleine-koenig@pengutronix.de>
Link: https://lore.kernel.org/r/20210326090641.122436-1-u.kleine-koenig@pengutronix.de
Signed-off-by: Krzysztof Kozlowski <krzysztof.kozlowski@canonical.com>
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The default initializer at the start of the array causes a warning
when building with W=1:
In file included from arch/arm/mach-pxa/mainstone.c:47:
arch/arm/mach-pxa/mainstone.h:124:33: error: initialized field overwritten [-Werror=override-init]
124 | #define MAINSTONE_IRQ(x) (MAINSTONE_NR_IRQS + (x))
| ^
arch/arm/mach-pxa/mainstone.h:133:33: note: in expansion of macro 'MAINSTONE_IRQ'
133 | #define MAINSTONE_S0_CD_IRQ MAINSTONE_IRQ(9)
| ^~~~~~~~~~~~~
arch/arm/mach-pxa/mainstone.c:506:15: note: in expansion of macro 'MAINSTONE_S0_CD_IRQ'
506 | [5] = MAINSTONE_S0_CD_IRQ,
| ^~~~~~~~~~~~~~~~~~~
Rework the initializer to list each element explicitly and only once.
Signed-off-by: Arnd Bergmann <arnd@arndb.de>
Link: https://lore.kernel.org/r/20210323130849.2362001-1-arnd@kernel.org'
Signed-off-by: Arnd Bergmann <arnd@arndb.de>
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The clang integrated assembler fails to build one file with
a complex asm instruction:
arch/arm/mach-omap1/ams-delta-fiq-handler.S:249:2: error: invalid instruction, any one of the following would fix this:
mov r10, #(1 << (((NR_IRQS_LEGACY + 12) - NR_IRQS_LEGACY) % 32)) @ set deferred_fiq bit
^
arch/arm/mach-omap1/ams-delta-fiq-handler.S:249:2: note: instruction requires: armv6t2
mov r10, #(1 << (((NR_IRQS_LEGACY + 12) - NR_IRQS_LEGACY) % 32)) @ set deferred_fiq bit
^
arch/arm/mach-omap1/ams-delta-fiq-handler.S:249:2: note: instruction requires: thumb2
mov r10, #(1 << (((NR_IRQS_LEGACY + 12) - NR_IRQS_LEGACY) % 32)) @ set deferred_fiq bit
^
The problem is that 'NR_IRQS_LEGACY' is not defined here. Apparently
gas does not care because we first add and then subtract this number,
leading to the immediate value to be the same regardless of the
specific definition of NR_IRQS_LEGACY.
Neither the way that 'gas' just silently builds this file, nor the
way that clang IAS makes nonsensical suggestions for how to fix it
is great. Fortunately there is an easy fix, which is to #include
the header that contains the definition.
Signed-off-by: Arnd Bergmann <arnd@arndb.de>
Acked-by: Tony Lindgren <tony@atomide.com>
Link: https://lore.kernel.org/r/20210308153430.2530616-1-arnd@kernel.org'
Signed-off-by: Arnd Bergmann <arnd@arndb.de>
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clang warns about an impossible condition when building with 32-bit
phys_addr_t:
arch/arm/mach-keystone/keystone.c:79:16: error: result of comparison of constant 51539607551 with expression of type 'phys_addr_t' (aka 'unsigned int') is always false [-Werror,-Wtautological-constant-out-of-range-compare]
mem_end > KEYSTONE_HIGH_PHYS_END) {
~~~~~~~ ^ ~~~~~~~~~~~~~~~~~~~~~~
arch/arm/mach-keystone/keystone.c:78:16: error: result of comparison of constant 34359738368 with expression of type 'phys_addr_t' (aka 'unsigned int') is always true [-Werror,-Wtautological-constant-out-of-range-compare]
if (mem_start < KEYSTONE_HIGH_PHYS_START ||
~~~~~~~~~ ^ ~~~~~~~~~~~~~~~~~~~~~~~~
Change the temporary variable to a fixed-size u64 to avoid the warning.
Signed-off-by: Arnd Bergmann <arnd@arndb.de>
Reviewed-by: Nathan Chancellor <nathan@kernel.org>
Acked-by: Santosh Shilimkar <ssantosh@kernel.org>
Link: https://lore.kernel.org/r/20210323131814.2751750-1-arnd@kernel.org'
Signed-off-by: Arnd Bergmann <arnd@arndb.de>
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All of the currently known MStar/SigmaStar ARMv7 SoCs have at least
one MPLL and it seems to always be at the same place so add it to
the base dtsi.
Signed-off-by: Daniel Palmer <daniel@0x0f.com>
Link: https://lore.kernel.org/r/20210301123542.2800643-4-daniel@0x0f.com'
Signed-off-by: Arnd Bergmann <arnd@arndb.de>
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All of the currently known MStar/SigmaStar ARMv7 SoCs have an "xtal"
clock input that is usually 24MHz and an "RTC xtal" that is usually 32KHz.
The xtal input has to be connected to something so it's enabled by default.
The MSC313 and MSC313E do not bring the RTC clock input out to the pins
so it's impossible to connect it. The SSC8336 does bring the input
out to the pins but it's not always actually connected to something.
The RTC node needs to always be present because in the future the nodes
for the clock muxes will refer to it even if it's not usable.
The RTC node is disabled by default and should be enabled at the board
level if the RTC input is wired up.
Signed-off-by: Daniel Palmer <daniel@0x0f.com>
Link: https://lore.kernel.org/r/20210301123542.2800643-3-daniel@0x0f.com'
Signed-off-by: Arnd Bergmann <arnd@arndb.de>
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All of the ARCH_MSTARV7 chips have an MPLL as the source for
peripheral clocks so select MSTAR_MSC313_MPLL.
Signed-off-by: Daniel Palmer <daniel@0x0f.com>
Link: https://lore.kernel.org/r/20210301123542.2800643-2-daniel@0x0f.com'
Signed-off-by: Arnd Bergmann <arnd@arndb.de>
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Add the PTP clock to the Ethernet controller. Otherwise, the driver uses the
main clock to derive the PTP frequency which is not necessarily the correct one.
Tested with linuxptp on Olimex STMP1-OLinuXino-LIME2.
Signed-off-by: Kurt Kanzenbach <kurt@linutronix.de>
Signed-off-by: Alexandre Torgue <alexandre.torgue@foss.st.com>
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git://git.kernel.org/pub/scm/linux/kernel/git/shawnguo/linux into arm/fixes
i.MX fixes for 5.12, round 2:
- Fix a system failure on imx6qdl-phytec-pfla02 board when booting from
SD, by adding missing vmmc supply for SD interfaces.
- Fix address typo in i.MX8MM/Q IOMUXC_SD1_DATA0_GPIO2_IO2 definition.
* tag 'imx-fixes-5.12-2' of git://git.kernel.org/pub/scm/linux/kernel/git/shawnguo/linux:
ARM: dts: imx6: pbab01: Set vmmc supply for both SD interfaces
arm64: dts: imx8mm/q: Fix pad control of SD1_DATA0
Link: https://lore.kernel.org/r/20210330090236.GQ22955@dragon
Signed-off-by: Arnd Bergmann <arnd@arndb.de>
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git://git.kernel.org/pub/scm/linux/kernel/git/tmlind/linux-omap into arm/fixes
More fixes for omaps for v5.12-rc cycle
Two fixes for hangs, mmc slot order fix, and a voltage typo fix:
- Remove unused duplicate sha2md5_fck clock node that can race with the
OMAP4_SHA2MD5_CLKCTRL clock node for disable for unused clocks
- Add aliases for omap4/5 mmc to put the slots back into the right
order again
- Fix typo for bionic voltage controllers that accidentally use mpu
for all instances instead of mpu, core and iva
- Fix random hangs for droid4 caused by missing fix from TI Android
kernel tree to do a dummy smc call on cpuidle wakeup path
* tag 'omap-for-v5.12/fixes-rc4-signed' of git://git.kernel.org/pub/scm/linux/kernel/git/tmlind/linux-omap:
ARM: OMAP4: PM: update ROM return address for OSWR and OFF
ARM: OMAP4: Fix PMIC voltage domains for bionic
ARM: dts: Fix moving mmc devices with aliases for omap4 & 5
ARM: dts: Drop duplicate sha2md5_fck to fix clk_disable race
Link: https://lore.kernel.org/r/pull-1616584662-702939@atomide.com
Signed-off-by: Arnd Bergmann <arnd@arndb.de>
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https://github.com/Broadcom/stblinux into arm/fixes
This pull request contains Broadcom ARM-based SoC changes for 5.12,
please pull the following:
- Florian reverts the adding of the second level interrupt controller
for HDMI BSC interrupts since they collide with the main I2C
controller (i2c-bcm2835).
* tag 'arm-soc/for-5.12/devicetree-part2' of https://github.com/Broadcom/stblinux:
Revert "ARM: dts: bcm2711: Add the BSC interrupt controller"
Signed-off-by: Arnd Bergmann <arnd@arndb.de>
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Enable the CRC accelerator on all STM32MP15xx DHSOM based systems
and CRYP accelerator on all STM32MP15x[CF] DHSOM based systems.
Signed-off-by: Marek Vasut <marex@denx.de>
Cc: Alexandre Torgue <alexandre.torgue@st.com>
Cc: Maxime Coquelin <mcoquelin.stm32@gmail.com>
Cc: Patrice Chotard <patrice.chotard@st.com>
Cc: Patrick Delaunay <patrick.delaunay@st.com>
Cc: linux-stm32@st-md-mailman.stormreply.com
To: linux-arm-kernel@lists.infradead.org
Signed-off-by: Alexandre Torgue <alexandre.torgue@foss.st.com>
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Use more specific custom GPIO line names which denote exactly where
the GPIO came from, i.e. the base board. Also, update the new blank
GPIO line names set up by stm32mp15xx-dhcom-som.dtsi back to their
original values.
Signed-off-by: Marek Vasut <marex@denx.de>
Cc: Alexandre Torgue <alexandre.torgue@foss.st.com>
Cc: Patrice Chotard <patrice.chotard@foss.st.com>
Cc: Patrick Delaunay <patrick.delaunay@foss.st.com>
Cc: linux-stm32@st-md-mailman.stormreply.com
To: linux-arm-kernel@lists.infradead.org
Signed-off-by: Alexandre Torgue <alexandre.torgue@foss.st.com>
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Use more specific custom GPIO line names which denote exactly where
the GPIO came from, i.e. the base board. Also, update the new blank
GPIO line names set up by stm32mp15xx-dhcom-som.dtsi back to their
original values.
Signed-off-by: Marek Vasut <marex@denx.de>
Cc: Alexandre Torgue <alexandre.torgue@foss.st.com>
Cc: Patrice Chotard <patrice.chotard@foss.st.com>
Cc: Patrick Delaunay <patrick.delaunay@foss.st.com>
Cc: linux-stm32@st-md-mailman.stormreply.com
To: linux-arm-kernel@lists.infradead.org
Signed-off-by: Alexandre Torgue <alexandre.torgue@foss.st.com>
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Fill in the custom GPIO line names used by DH.
Signed-off-by: Marek Vasut <marex@denx.de>
Cc: Alexandre Torgue <alexandre.torgue@foss.st.com>
Cc: Patrice Chotard <patrice.chotard@foss.st.com>
Cc: Patrick Delaunay <patrick.delaunay@foss.st.com>
Cc: linux-stm32@st-md-mailman.stormreply.com
To: linux-arm-kernel@lists.infradead.org
Signed-off-by: Alexandre Torgue <alexandre.torgue@foss.st.com>
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Fill in the custom GPIO line names used by DH on the DHCOM SoM.
The GPIO line names are in accordance to DHCOM Design Guide R04
available at [1], section 3.9 GPIO.
[1] https://wiki.dh-electronics.com/images/5/52/DOC_DHCOM-Design-Guide_R04_2018-06-28.pdf
Signed-off-by: Marek Vasut <marex@denx.de>
Cc: Alexandre Torgue <alexandre.torgue@foss.st.com>
Cc: Patrice Chotard <patrice.chotard@foss.st.com>
Cc: Patrick Delaunay <patrick.delaunay@foss.st.com>
Cc: linux-stm32@st-md-mailman.stormreply.com
To: linux-arm-kernel@lists.infradead.org
Signed-off-by: Alexandre Torgue <alexandre.torgue@foss.st.com>
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The STM32H750 is a Cortex-M7 MCU running at 480MHz
and containing 128KBytes internal flash, 1MiB SRAM.
Signed-off-by: dillon min <dillon.minfei@gmail.com>
Signed-off-by: Alexandre Torgue <alexandre.torgue@foss.st.com>
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This patchset has following changes:
- introduce stm32h750.dtsi to support stm32h750 value line
- add pin groups for usart3/uart4/spi1/sdmmc2
- add stm32h750i-art-pi.dtb (arch/arm/boot/dts/Makefile)
- add stm32h750-art-pi.dts to support art-pi board
art-pi board component:
- 8MiB qspi flash
- 16MiB spi flash
- 32MiB sdram
- ap6212 wifi&bt&fm
the detail board information can be found at:
https://art-pi.gitee.io/website/
Signed-off-by: dillon min <dillon.minfei@gmail.com>
Signed-off-by: Alexandre Torgue <alexandre.torgue@foss.st.com>
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Replace upper case by lower case in i2c nodes name.
Signed-off-by: dillon min <dillon.minfei@gmail.com>
Signed-off-by: Alexandre Torgue <alexandre.torgue@foss.st.com>
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Some instances are missing in current support of stm32h743 MCU. This commit
adds usart3/uart4 and sdmmc2 support.
Signed-off-by: dillon min <dillon.minfei@gmail.com>
Signed-off-by: Alexandre Torgue <alexandre.torgue@foss.st.com>
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This patch is intend to add support stm32h750 value line,
just add stm32h7-pinctrl.dtsi for extending, with following changes:
- rename stm32h743-pinctrl.dtsi to stm32h7-pinctrl.dtsi
- move 'pin-controller' from stm32h7-pinctrl.dtsi to stm32h743.dtsi, to
fix make dtbs_check warrnings
arch/arm/boot/dts/stm32h750i-art-pi.dt.yaml: soc: 'i2c@40005C00',
'i2c@58001C00' do not match any of the regexes:
'@(0|[1-9a-f][0-9a-f]*)$', '^[^@]+$', 'pinctrl-[0-9]+'
Signed-off-by: dillon min <dillon.minfei@gmail.com>
Signed-off-by: Alexandre Torgue <alexandre.torgue@foss.st.com>
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On the N2100, instead of just marking the r8169 chips as having
broken_parity_status, disable parity error reporting for them entirely.
This was the only relevant place that set broken_parity_status, so we no
longer need to check for it in the r8169 error interrupt handler.
[bhelgaas: squash into one patch, commit log]
Link: https://lore.kernel.org/r/20210330174318.1289680-4-helgaas@kernel.org
Signed-off-by: Heiner Kallweit <hkallweit1@gmail.com>
Signed-off-by: Bjorn Helgaas <bhelgaas@google.com>
Reviewed-by: Krzysztof Wilczyński <kw@linux.com>
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Although the SMCCC specification provides some limited functionality for
describing the presence of hypervisor and firmware services, this is
generally applicable only to functions designated as "Arm Architecture
Service Functions" and no portable discovery mechanism is provided for
standard hypervisor services, despite having a designated range of
function identifiers reserved by the specification.
In an attempt to avoid the need for additional firmware changes every
time a new function is added, introduce a UID to identify the service
provider as being compatible with KVM. Once this has been established,
additional services can be discovered via a feature bitmap.
Reviewed-by: Steven Price <steven.price@arm.com>
Signed-off-by: Will Deacon <will@kernel.org>
Signed-off-by: Jianyong Wu <jianyong.wu@arm.com>
[maz: move code to its own file, plug it into PSCI]
Signed-off-by: Marc Zyngier <maz@kernel.org>
Link: https://lore.kernel.org/r/20201209060932.212364-2-jianyong.wu@arm.com
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Fix uninitialized sr_inst.
Fixes: fbfa463be8dc ("ARM: OMAP2+: Fix smartreflex init regression after dropping legacy data")
Reported-by: kernel test robot <lkp@intel.com>
Signed-off-by: Tony Lindgren <tony@atomide.com>
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The opening comment mark '/**' is used for highlighting the beginning of
kernel-doc comments.
The header for arch/arm/mach-omap1/timer.c follows this syntax, but the
content inside does not comply with kernel-doc.
This line was probably not meant for kernel-doc parsing, but is parsed
due to the presence of kernel-doc like comment syntax(i.e, '/**'), which
causes unexpected warning from kernel-doc:
"warning: expecting prototype for OMAP1 Dual(). Prototype was for OMAP1610_GPTIMER1_BASE() instead"
Provide a simple fix by replacing this occurrence with general comment
format, i.e. '/*', to prevent kernel-doc from parsing it.
Signed-off-by: Aditya Srivastava <yashsri421@gmail.com>
Acked-by: Aaro Koskinen <aaro.koskinen@iki.fi>
Acked-by: Randy Dunlap <rdunlap@infradead.org>
Signed-off-by: Tony Lindgren <tony@atomide.com>
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The opening comment mark '/**' is used for highlighting the beginning of
kernel-doc comments.
The header for arch/arm/mach-omap2/omap_twl.c follows this syntax, but the
content inside does not comply with kernel-doc.
This line was probably not meant for kernel-doc parsing, but is parsed
due to the presence of kernel-doc like comment syntax(i.e, '/**'), which
causes unexpected warning from kernel-doc:
"warning: wrong kernel-doc identifier on line:
* OMAP and TWL PMIC specific initializations."
Provide a simple fix by replacing this occurrence with general comment
format, i.e. '/*', to prevent kernel-doc from parsing it.
Signed-off-by: Aditya Srivastava <yashsri421@gmail.com>
Acked-by: Randy Dunlap <rdunlap@infradead.org>
Signed-off-by: Tony Lindgren <tony@atomide.com>
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spinlock can be initialized automatically with DEFINE_SPINLOCK()
rather than explicitly calling spin_lock_init().
Reported-by: Hulk Robot <hulkci@huawei.com>
Signed-off-by: Lifu Chen <chenlifu@huawei.com>
Signed-off-by: Tony Lindgren <tony@atomide.com>
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Based on linux-gpio discussion [1], it is best practice to make the
gpio-line-names unique. Generic names like "[ethernet]" are replaced
with the name of the unique signal on the AM3358 SoC ball corresponding
to the gpio line. "[NC]" is also renamed to the standard "NC" name to
represent "not connected".
[1] https://lore.kernel.org/linux-gpio/20201216195357.GA2583366@x1/
Signed-off-by: Drew Fustini <drew@beagleboard.org>
Signed-off-by: Tony Lindgren <tony@atomide.com>
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This simple patch activates SMP for mt6589 by adding the missing
"enable-method" property. After applying this patch kernel log
indicates all cores are brought up:
[ 0.070122] CPU0: thread -1, cpu 0, socket 0, mpidr 80000000
[ 0.071652] Setting up static identity map for 0x80100000 - 0x80100054
[ 0.072711] rcu: Hierarchical SRCU implementation.
[ 0.073853] smp: Bringing up secondary CPUs ...
[ 0.133675] CPU1: thread -1, cpu 1, socket 0, mpidr 80000001
[ 0.193675] CPU2: thread -1, cpu 2, socket 0, mpidr 80000002
[ 0.253675] CPU3: thread -1, cpu 3, socket 0, mpidr 80000003
[ 0.253818] smp: Brought up 1 node, 4 CPUs
[ 0.256930] SMP: Total of 4 processors activated (7982.28 BogoMIPS).
[ 0.257855] CPU: All CPU(s) started in SVC mode.
Before this change CPU cores 1-3 didn't start and the following lines
were in kernel log:
[ 0.070126] CPU0: thread -1, cpu 0, socket 0, mpidr 80000000
[ 0.071640] Setting up static identity map for 0x80100000 - 0x80100054
[ 0.072706] rcu: Hierarchical SRCU implementation.
[ 0.073850] smp: Bringing up secondary CPUs ...
[ 0.076052] smp: Brought up 1 node, 1 CPU
[ 0.076678] SMP: Total of 1 processors activated (2000.48 BogoMIPS).
[ 0.077603] CPU: All CPU(s) started in SVC mode.
Signed-off-by: Boris Lysov <arzamas-16@mail.ee>
Link: https://lore.kernel.org/r/20210314023735.052d2d35@pc
Signed-off-by: Matthias Brugger <matthias.bgg@gmail.com>
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The TVK1281618 R3 UIB has a Cypress CTTYSP touchscreen.
Add it to the device tree file.
Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
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The voltage default on the AB8500 VAUX1 regulator is way
too low and does not correspond to the setting in the
vendor tree. This should be 2.8-3.3 V not 2.5-2.9 V or
things like the HREFP520 touchscreen will not work.
Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
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Setting the vmmc supplies is crucial since otherwise the supplying
regulators get disabled and the SD interfaces are no longer powered
which leads to system failures if the system is booted from that SD
interface.
Fixes: 1e44d3f880d5 ("ARM i.MX6Q: dts: Enable I2C1 with EEPROM and PMIC on Phytec phyFLEX-i.MX6 Ouad module")
Signed-off-by: Stefan Riedmueller <s.riedmueller@phytec.de>
Reviewed-by: Fabio Estevam <festevam@gmail.com>
Signed-off-by: Shawn Guo <shawnguo@kernel.org>
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Due to a hardware bug preventing the correct detection if the ID pin
the USB OTG port cannot be used in otg mode. It can either be set to
host or peripheral. Set it to peripheral so vbus is disabled by default.
Signed-off-by: Stefan Riedmueller <s.riedmueller@phytec.de>
Reviewed-by: Fabio Estevam <festevam@gmail.com>
Signed-off-by: Shawn Guo <shawnguo@kernel.org>
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The pinmuxing for the enable pin of the usbh1 node is wrong. It needs to
be muxed as GPIO. While at it, move the pinctrl to the vbus regulator
since it is actually the regulator enable pin.
Signed-off-by: Stefan Riedmueller <s.riedmueller@phytec.de>
Reviewed-by: Fabio Estevam <festevam@gmail.com>
Signed-off-by: Shawn Guo <shawnguo@kernel.org>
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Set Linux default trigger to default on, just like it's normally done
for power LEDs.
Signed-off-by: Rafał Miłecki <rafal@milecki.pl>
Signed-off-by: Florian Fainelli <f.fainelli@gmail.com>
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Partitions are basically fixed indeed but firmware ones don't have
hardcoded function ("firmware" vs "failsafe"). Actual function depends
on bootloader configuration. Use a proper binding for that.
While at it fix numbers formatting to avoid:
arch/arm/boot/dts/bcm47094-linksys-panamera.dt.yaml: partitions: 'partition@1F00000' does not match any of the regexes: '^partition@[0-9a-f]+$', 'pinctrl-[0-9]+'
From schema: Documentation/devicetree/bindings/mtd/partitions/linksys,ns-partitions.yaml
Signed-off-by: Rafał Miłecki <rafal@milecki.pl>
Signed-off-by: Florian Fainelli <f.fainelli@gmail.com>
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Signed-off-by: Ingo Molnar <mingo@kernel.org>
|