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2025-04-24arm64: dts: renesas: r8a779g3: Add Retronix R-Car V4H Sparrow Hawk board supportMarek Vasut3-0/+713
Add Retronix R-Car V4H Sparrow Hawk board based on Renesas R-Car V4H ES3.0 (R8A779G3) SoC. This is a single-board computer with single gigabit ethernet, DSI-to-eDP bridge, DSI and two CSI2 interfaces, audio codec, two CANFD ports, micro SD card slot, USB PD supply, USB 3.0 ports, M.2 Key-M slot for NVMe SSD, debug UART and JTAG. Tested-by: Kuninori Morimoto <kuninori.morimoto.gx@renesas.com> Tested-by: Niklas Söderlund <niklas.soderlund+renesas@ragnatech.se> Signed-off-by: Marek Vasut <marek.vasut+renesas@mailbox.org> Reviewed-by: Geert Uytterhoeven <geert+renesas@glider.be> Link: https://lore.kernel.org/20250420173829.200553-4-marek.vasut+renesas@mailbox.org Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
2025-04-24arm64: dts: mediatek: Add MT8186 Ponyta ChromebooksJianeng Ceng4-0/+91
MT8186 ponyta, known as huaqin custom label, is a MT8186 based laptop. It is based on the "corsola" design. It includes LTE, touchpad combinations. Reviewed-by: Matthias Brugger <matthias.bgg@gmail.com> Reviewed-by: AngeloGioacchino Del Regno <angelogioacchino.delregno@collabora.com> Signed-off-by: Jianeng Ceng <cengjianeng@huaqin.corp-partner.google.com> Link: https://lore.kernel.org/r/20250424010850.994288-3-cengjianeng@huaqin.corp-partner.google.com Signed-off-by: AngeloGioacchino Del Regno <angelogioacchino.delregno@collabora.com>
2025-04-24arm64: dts: mediatek: mt8186-corsola: make SDIO card removableAxe Yang1-1/+0
Under specific conditions, the SDIO function driver needs to remove/add SDIO card to perform a reset. Remove the non-removable property to support this scenario. Signed-off-by: Axe Yang <axe.yang@mediatek.com> Reviewed-by: Matthias Brugger <matthias.bgg@gmail.com> Link: https://lore.kernel.org/r/20250424013603.32351-1-axe.yang@mediatek.com Signed-off-by: AngeloGioacchino Del Regno <angelogioacchino.delregno@collabora.com>
2025-04-23arm64: dts: mediatek: mt8395-nio-12l: Enable Audio DSP and sound cardJulien Massot1-2/+56
Add memory regions for the Audio DSP (ADSP) and Audio Front-End (AFE), and enable both components in the device tree. Also, define the required pin configuration and add a sound card node configured to use the ADSP. This enables audio output through the 3.5mm headphone jack available on the board. Signed-off-by: Julien Massot <julien.massot@collabora.com> Link: https://lore.kernel.org/r/20250423-mt8395-audio-sof-v2-1-5e6dc7fba0fc@collabora.com Signed-off-by: AngeloGioacchino Del Regno <angelogioacchino.delregno@collabora.com>
2025-04-23arm64: dts: mediatek: mt8390-genio-common: Add Display on DSI0AngeloGioacchino Del Regno1-8/+137
Configure the DSI0 display pipeline and add regulator, pinctrl and display node to enable the Startek KD070FHFID078 panel found on the MediaTek Genio 510 and Genio 700 EVKs. Link: https://lore.kernel.org/r/20250220110948.45596-3-angelogioacchino.delregno@collabora.com Signed-off-by: AngeloGioacchino Del Regno <angelogioacchino.delregno@collabora.com>
2025-04-23arm64: dts: mediatek: mt8395-genio-1200-evk: Add display on DSI0Louis-Alexis Eyraud1-7/+118
This board has a Startek KD070FHFID078 MIPI-DSI panel on the DSI0 connector, so add and configure the pipeline connecting VDOSYS0 components to DSI0, with the needed pinctrl and display nodes in devicetree. Signed-off-by: Louis-Alexis Eyraud <louisalexis.eyraud@collabora.com> Link: https://lore.kernel.org/r/20250224-mt8395-genio-1200-evk-enable-dsi-panel-v1-1-74f31cf48a43@collabora.com Signed-off-by: AngeloGioacchino Del Regno <angelogioacchino.delregno@collabora.com>
2025-04-23arm64: dts: freescale: imx8mm-verdin: Add EEPROM compatible fallbackFrancesco Dolcini1-3/+3
According to the AT24 EEPROM bindings the compatible string should contain first the actual manufacturer, and second the corresponding atmel model. Add the atmel compatible fallback accordingly. Signed-off-by: Francesco Dolcini <francesco.dolcini@toradex.com> Signed-off-by: Shawn Guo <shawnguo@kernel.org>
2025-04-23arm64: dts: freescale: imx8mp-verdin: Add EEPROM compatible fallbackFrancesco Dolcini1-3/+3
According to the AT24 EEPROM bindings the compatible string should contain first the actual manufacturer, and second the corresponding atmel model. Add the atmel compatible fallback accordingly. Signed-off-by: Francesco Dolcini <francesco.dolcini@toradex.com> Signed-off-by: Shawn Guo <shawnguo@kernel.org>
2025-04-23arm64: dts: mt8183: Add port node to mt8183.dtsiPin-yen Lin2-7/+7
Add the port node to fix the binding schema check. Also update mt8183-kukui to reference the new port node. Fixes: 88ec840270e6 ("arm64: dts: mt8183: Add dsi node") Fixes: 27eaf34df364 ("arm64: dts: mt8183: config dsi node") Signed-off-by: Pin-yen Lin <treapking@chromium.org> Link: https://lore.kernel.org/r/20250423040354.2847447-1-treapking@chromium.org Signed-off-by: AngeloGioacchino Del Regno <angelogioacchino.delregno@collabora.com>
2025-04-23arm64: dts: imx: Drop redundant CPU "clock-latency"Rob Herring (Arm)4-16/+0
The "clock-latency" property is part of the deprecated opp-v1 binding and is redundant if the opp-v2 table has equal or larger values in any "clock-latency-ns". The OPP tables have values of 150000, so it can be removed. Signed-off-by: Rob Herring (Arm) <robh@kernel.org> Signed-off-by: Shawn Guo <shawnguo@kernel.org>
2025-04-23arm64: dts: imx8qm-mek: consolidate reserved-memoryFrank Li1-18/+16
Move dsp_vdev* to under existed reserved-memory node to consolidate all reserved-memory together. Signed-off-by: Frank Li <Frank.Li@nxp.com> Reviewed-by: Daniel Baluta <daniel.baluta@nxp.com> Signed-off-by: Shawn Guo <shawnguo@kernel.org>
2025-04-23crypto: arm64/sm4 - Use API partial block handlingHerbert Xu1-67/+31
Use the Crypto API partial block handling. Signed-off-by: Herbert Xu <herbert@gondor.apana.org.au>
2025-04-23crypto: arm64/aes - Use API partial block handlingHerbert Xu1-81/+41
Use the Crypto API partial block handling. Also remove the unnecessary SIMD fallback path. Signed-off-by: Herbert Xu <herbert@gondor.apana.org.au>
2025-04-23crypto: arm64/sm3-neon - Use API partial block handlingHerbert Xu1-40/+8
Use the Crypto API partial block handling. Also remove the unnecessary SIMD fallback path. Signed-off-by: Herbert Xu <herbert@gondor.apana.org.au>
2025-04-23crypto: arm64/sm3-ce - Use API partial block handlingHerbert Xu1-40/+8
Use the Crypto API partial block handling. Also remove the unnecessary SIMD fallback path. Signed-off-by: Herbert Xu <herbert@gondor.apana.org.au>
2025-04-23crypto: arm/sha512 - Use API partial block handlingHerbert Xu1-17/+11
Use the Crypto API partial block handling. Signed-off-by: Herbert Xu <herbert@gondor.apana.org.au>
2025-04-23crypto: arm64/sha512-ce - Use API partial block handlingHerbert Xu1-37/+12
Use the Crypto API partial block handling. Also remove the unnecessary SIMD fallback path. Signed-off-by: Herbert Xu <herbert@gondor.apana.org.au>
2025-04-23crypto: arm64/sha3-ce - Use API partial block handlingHerbert Xu1-63/+48
Use the Crypto API partial block handling. Also remove the unnecessary SIMD fallback path. Signed-off-by: Herbert Xu <herbert@gondor.apana.org.au>
2025-04-23crypto: arm64/sha256 - Use API partial block handlingHerbert Xu1-60/+37
Use the Crypto API partial block handling. Also remove the unnecessary SIMD fallback path. Signed-off-by: Herbert Xu <herbert@gondor.apana.org.au>
2025-04-23crypto: arm64/sha256-ce - Use API partial block handlingHerbert Xu1-72/+18
Use the Crypto API partial block handling. Also remove the unnecessary SIMD fallback path. Signed-off-by: Herbert Xu <herbert@gondor.apana.org.au>
2025-04-23crypto: arm64/sha1 - Use API partial block handlingHerbert Xu1-50/+18
Use the Crypto API partial block handling. Also remove the unnecessary SIMD fallback path. Signed-off-by: Herbert Xu <herbert@gondor.apana.org.au>
2025-04-23crypto: arm64/ghash - Use API partial block handlingHerbert Xu1-87/+56
Use the Crypto API partial block handling. Also remove the unnecessary SIMD fallback path. Signed-off-by: Herbert Xu <herbert@gondor.apana.org.au>
2025-04-22arm64: dts: add support for S7D based Amlogic BM202Xianwei Zhao3-0/+141
Amlogic S7D is an advanced application processor designed for hybrid OTT/IP Set Top Box and high-end media box applications. Add basic support for the S7D based Amlogic BM202 board, Reusing S7 basic components: CPU, GIC, IRQ, Timer and UART. These are capable of booting up into the serial console. Signed-off-by: Xianwei Zhao <xianwei.zhao@amlogic.com> Link: https://lore.kernel.org/r/20250317-s6-s7-basic-v1-7-d653384e41f3@amlogic.com Signed-off-by: Neil Armstrong <neil.armstrong@linaro.org>
2025-04-22arm64: dts: add support for S7 based Amlogic BP201Xianwei Zhao3-0/+141
Amlogic S7 is an advanced application processor designed for hybrid OTT/IP Set Top Box and high-end media box applications. Add basic support for the S7 based Amlogic BP201 board, which describes the following components: CPU, GIC, IRQ, Timer and UART. These are capable of booting up into the serial console. Signed-off-by: Xianwei Zhao <xianwei.zhao@amlogic.com> Link: https://lore.kernel.org/r/20250317-s6-s7-basic-v1-6-d653384e41f3@amlogic.com Signed-off-by: Neil Armstrong <neil.armstrong@linaro.org>
2025-04-22arm64: dts: add support for S6 based Amlogic BL209Xianwei Zhao3-0/+140
Amlogic S6 is an advanced application processor designed for hybrid OTT/IP Set Top Box and high-end media box applications. Add basic support for the S6 based Amlogic BL209 board, which describes the following components: CPU, GIC, IRQ, Timer and UART. These are capable of booting up into the serial console. Signed-off-by: Xianwei Zhao <xianwei.zhao@amlogic.com> Link: https://lore.kernel.org/r/20250317-s6-s7-basic-v1-5-d653384e41f3@amlogic.com Signed-off-by: Neil Armstrong <neil.armstrong@linaro.org>
2025-04-22arm64: dts: mediatek: mt8390-genio-common: Add firmware-name for scp0Nícolas F. R. A. Prado1-0/+1
Add the firmware-name property for SCP core0 so the firmware can be loaded from its canonical location in the linux-firmware repository. Reviewed-by: AngeloGioacchino Del Regno <angelogioacchino.delregno@collabora.com> Signed-off-by: Nícolas F. R. A. Prado <nfraprado@collabora.com> Link: https://lore.kernel.org/r/20250421-scp-dual-core-mt8390-v2-5-c84117a959a9@collabora.com Signed-off-by: AngeloGioacchino Del Regno <angelogioacchino.delregno@collabora.com>
2025-04-22arm64: dts: mediatek: mt8188: Describe SCP as a cluster with two coresNícolas F. R. A. Prado3-11/+37
The SCP is currently described in the Devicetree as a single-core processor, but really it is a cluster with two cores. Describe the full cluster but enable only core0 on the current mt8188 platforms since that's the only one usable with the upstream firmware. Co-developed-by: Tinghan Shen <tinghan.shen@mediatek.com> Signed-off-by: Tinghan Shen <tinghan.shen@mediatek.com> Co-developed-by: Jason Chen <jason-ch.chen@mediatek.corp-partner.google.com> Signed-off-by: Jason Chen <jason-ch.chen@mediatek.corp-partner.google.com> Signed-off-by: Nícolas F. R. A. Prado <nfraprado@collabora.com> Link: https://lore.kernel.org/r/20250421-scp-dual-core-mt8390-v2-4-c84117a959a9@collabora.com Signed-off-by: AngeloGioacchino Del Regno <angelogioacchino.delregno@collabora.com>
2025-04-22arm64: dts: amlogic: S4: Add clk-measure controller nodeChuan Liu1-0/+5
Add the clk-measure controller node for S4 SoC family. Reviewed-by: Neil Armstrong <neil.armstrong@linaro.org> Signed-off-by: Chuan Liu <chuan.liu@amlogic.com> Link: https://lore.kernel.org/r/20250415-clk-measure-v3-7-9b8551dd33b4@amlogic.com Signed-off-by: Neil Armstrong <neil.armstrong@linaro.org>
2025-04-22arm64: dts: amlogic: C3: Add clk-measure controller nodeChuan Liu1-0/+5
Add the clk-measure controller node for C3 SoC family. Reviewed-by: Neil Armstrong <neil.armstrong@linaro.org> Signed-off-by: Chuan Liu <chuan.liu@amlogic.com> Link: https://lore.kernel.org/r/20250415-clk-measure-v3-6-9b8551dd33b4@amlogic.com Signed-off-by: Neil Armstrong <neil.armstrong@linaro.org>
2025-04-22arm64: dts: rockchip: Add rk3576 pcie nodesKever Yang1-0/+108
rk3576 has two pcie controllers, both are pcie2x1 work with naneng-combphy. Signed-off-by: Kever Yang <kever.yang@rock-chips.com> Tested-by: Shawn Lin <Shawn.lin@rock-chips.com> Reviewed-by: Nicolas Frattaroli <nicolas.frattaroli@collabora.com> Tested-by: Nicolas Frattaroli <nicolas.frattaroli@collabora.com> Link: https://lore.kernel.org/r/20250414145110.11275-3-kever.yang@rock-chips.com Signed-off-by: Heiko Stuebner <heiko@sntech.de>
2025-04-22arm64: dts: rockchip: Enable HDMI audio outputs for Cool Pi CM5 EVBAndy Yan1-0/+16
Enable audio outputs for two HDMI ports on Cool Pi CM5 EVB Signed-off-by: Andy Yan <andyshrk@163.com> Link: https://lore.kernel.org/r/20250419121326.388298-3-andyshrk@163.com Signed-off-by: Heiko Stuebner <heiko@sntech.de>
2025-04-22arm64: dts: rockchip: Enable HDMI1 on Cool Pi CM5 EVBAndy Yan1-0/+40
Enable the second HDMI output port on Cool Pi CM5 EVB Signed-off-by: Andy Yan <andyshrk@163.com> Link: https://lore.kernel.org/r/20250419121326.388298-2-andyshrk@163.com Signed-off-by: Heiko Stuebner <heiko@sntech.de>
2025-04-22arm64: dts: rockchip: Rename hdmi-con to hdmi0-con for Cool Pi CM5 EVBAndy Yan1-3/+3
There are two hdmi connector on Cool Pi CM5 EVB, the current supported is hdmi0, assign corresponding index to it. It will be convenient for us to add support for another one. Signed-off-by: Andy Yan <andyshrk@163.com> Link: https://lore.kernel.org/r/20250419121326.388298-1-andyshrk@163.com Signed-off-by: Heiko Stuebner <heiko@sntech.de>
2025-04-22arm64: dts: rockchip: Enable eDP0 display on RK3588S EVB1 boardDamon Ding1-0/+55
Add the necessary DT changes to enable eDP0 on RK3588S EVB1 board: - Set pinctrl of pwm12 for backlight - Enable edp0/hdptxphy0/vp2 - Assign the parent of DCLK_VOP2_SRC to PLL_V0PLL - Add aux-bus/panel nodes For RK3588, the PLL_V0PLL is specifically designed for the VOP2. This means the clock rate of PLL_V0PLL can be adjusted according to the dclk rate of relevant VP. It is typically assigned as the dclk source of a specific VP when the clock of relevant display mode is unusual, such as the eDP panel 'lg,lp079qx1-sp0v' paired with RK3588S EVB1, which has a clock rate of 202.02MHz. Additionally, the 'force-hpd' is set for edp0 because the HPD pin on the panel side is not connected to the eDP HPD pin on the SoC side according to the RK3588S EVB1 hardware design. Signed-off-by: Damon Ding <damon.ding@rock-chips.com> Link: https://lore.kernel.org/r/20250310104114.2608063-14-damon.ding@rock-chips.com Signed-off-by: Heiko Stuebner <heiko@sntech.de>
2025-04-22arm64: dts: rockchip: Add eDP0 node for RK3588Damon Ding1-0/+28
Add support for the eDP0 output on RK3588 SoC. Signed-off-by: Damon Ding <damon.ding@rock-chips.com> Link: https://lore.kernel.org/r/20250310104114.2608063-13-damon.ding@rock-chips.com Signed-off-by: Heiko Stuebner <heiko@sntech.de>
2025-04-22arm64: dts: renesas: rzg3e-smarc-som: Enable Mali-G52Tommaso Merciai1-0/+15
Enable the Mali-G52 (GPU) node on the RZ/G3E SMARC SoM board. Signed-off-by: Tommaso Merciai <tommaso.merciai.xr@bp.renesas.com> Reviewed-by: Geert Uytterhoeven <geert+renesas@glider.be> Link: https://lore.kernel.org/20250402131142.1270701-5-tommaso.merciai.xr@bp.renesas.com Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
2025-04-22arm64: dts: renesas: r9a09g047: Add Mali-G52 GPU nodeTommaso Merciai1-0/+49
Add the Mali-G52 GPU node to the SoC DTSI. Signed-off-by: Tommaso Merciai <tommaso.merciai.xr@bp.renesas.com> Reviewed-by: Geert Uytterhoeven <geert+renesas@glider.be> Link: https://lore.kernel.org/20250402131142.1270701-4-tommaso.merciai.xr@bp.renesas.com Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
2025-04-22arm64: dts: renesas: rzg3e-smarc-som: Add RAA215300 pmic supportJohn Madieu1-0/+25
Enable RAA215300 PMIC and built-in RTC support on the RZ/G3E SoM module. Also add related clock and interrupt signals. Signed-off-by: John Madieu <john.madieu.xa@bp.renesas.com> Reviewed-by: Geert Uytterhoeven <geert+renesas@glider.be> Link: https://lore.kernel.org/20250329121258.172099-3-john.madieu.xa@bp.renesas.com Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
2025-04-22arm64: dts: renesas: rzg3e-smarc-som: Add I2C2 device pincontrolJohn Madieu1-0/+13
Add a device node for I2C2 pincontrol. Also enable the I2C2 device node with 1MHz clock frequency as it is connected to the RAA215300 PMIC on the RZ/G3E SoM. Signed-off-by: John Madieu <john.madieu.xa@bp.renesas.com> Reviewed-by: Geert Uytterhoeven <geert+renesas@glider.be> Link: https://lore.kernel.org/20250329121258.172099-2-john.madieu.xa@bp.renesas.com Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
2025-04-22arm64: dts: exynos: Add DT node for all UART portsFaraz Ata1-0/+493
Universal Serial Interface (USI) supports three serial protocol like uart, i2c and spi. ExynosAutov920 has 18 instances of USI. Add all the USI DT node and subsequent uart nodes for all the instances. Reviewed-by: Alim Akhtar <alim.akhtar@samsung.com> Signed-off-by: Faraz Ata <faraz.ata@samsung.com> Link: https://lore.kernel.org/r/20250417113511.759268-1-faraz.ata@samsung.com Signed-off-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org>
2025-04-22arm64: dts: amlogic: Drop redundant CPU "clock-latency"Rob Herring (Arm)23-92/+6
The "clock-latency" property is part of the deprecated opp-v1 binding and is redundant if the opp-v2 table has equal or larger values in any "clock-latency-ns". Add any missing "clock-latency-ns" properties and remove "clock-latency". Signed-off-by: Rob Herring (Arm) <robh@kernel.org> Reviewed-by: Neil Armstrong <neil.armstrong@linaro.org> Link: https://lore.kernel.org/r/20250410-dt-cpu-schema-v2-11-63d7dc9ddd0a@kernel.org Signed-off-by: Neil Armstrong <neil.armstrong@linaro.org>
2025-04-22arm64: dts: amlogic: gxlx-s905l-p271: add saradc compatibleChristian Hewitt1-0/+4
Add the saradac node using the meson-gxlx-saradc compatible to ensure MPLL clocks are poked and audio output is enabled on the p271 (S905L) board. Signed-off-by: Christian Hewitt <christianshewitt@gmail.com> Reviewed-by: Martin Blumenstingl <martin.blumenstingl@googlemail.com> Link: https://lore.kernel.org/r/20250330143254.3159519-1-christianshewitt@gmail.com Signed-off-by: Neil Armstrong <neil.armstrong@linaro.org>
2025-04-22arm64: dts: amlogic: a1: enable UART RX and TX pull up by defaultMartin Blumenstingl1-0/+1
Some boards have noise on the UART RX line when the UART pins are not connected to another device (such as an USB UART adapter). This can be addressed by using a pull up resistor. Not all boards may provide such a pull up resistor on the PCB so enable the SoC's pull-up on the UART RX and TX pads by default. This matches the default (from u-boot or SoC hardware) state for the pinmux configuration on these pads. Signed-off-by: Martin Blumenstingl <martin.blumenstingl@googlemail.com> Reviewed-by: Neil Armstrong <neil.armstrong@linaro.org> Link: https://lore.kernel.org/r/20250329185855.854186-8-martin.blumenstingl@googlemail.com Signed-off-by: Neil Armstrong <neil.armstrong@linaro.org>
2025-04-22arm64: dts: amlogic: axg: enable UART RX and TX pull up by defaultMartin Blumenstingl1-6/+6
Some boards have noise on the UART RX line when the UART pins are not connected to another device (such as an USB UART adapter). This can be addressed by using a pull up resistor. Not all boards may provide such a pull up resistor on the PCB so enable the SoC's pull-up on the UART RX and TX pads by default. This matches the default (from u-boot or SoC hardware) state for the pinmux configuration on these pads. Signed-off-by: Martin Blumenstingl <martin.blumenstingl@googlemail.com> Reviewed-by: Neil Armstrong <neil.armstrong@linaro.org> Link: https://lore.kernel.org/r/20250329185855.854186-7-martin.blumenstingl@googlemail.com Signed-off-by: Neil Armstrong <neil.armstrong@linaro.org>
2025-04-22arm64: dts: amlogic: g12: enable UART RX and TX pull up by defaultMartin Blumenstingl1-5/+5
Some boards have noise on the UART RX line when the UART pins are not connected to another device (such as an USB UART adapter). This can be addressed by using a pull up resistor. Not all boards may provide such a pull up resistor on the PCB so enable the SoC's pull-up on the UART RX and TX pads by default. This matches the default (from u-boot or SoC hardware) state for the pinmux configuration on these pads. Signed-off-by: Martin Blumenstingl <martin.blumenstingl@googlemail.com> Reviewed-by: Neil Armstrong <neil.armstrong@linaro.org> Link: https://lore.kernel.org/r/20250329185855.854186-6-martin.blumenstingl@googlemail.com Signed-off-by: Neil Armstrong <neil.armstrong@linaro.org>
2025-04-22arm64: dts: amlogic: gxl: enable UART RX and TX pull up by defaultMartin Blumenstingl1-6/+6
Some boards have noise on the UART RX line when the UART pins are not connected to another device (such as an USB UART adapter). This can be addressed by using a pull up resistor. Not all boards may provide such a pull up resistor on the PCB so enable the SoC's pull-up on the UART RX and TX pads by default. This matches the default (from u-boot or SoC hardware) state for the pinmux configuration on these pads. Signed-off-by: Martin Blumenstingl <martin.blumenstingl@googlemail.com> Reviewed-by: Neil Armstrong <neil.armstrong@linaro.org> Link: https://lore.kernel.org/r/20250329185855.854186-5-martin.blumenstingl@googlemail.com Signed-off-by: Neil Armstrong <neil.armstrong@linaro.org>
2025-04-22arm64: dts: amlogic: gxbb: enable UART RX and TX pull up by defaultMartin Blumenstingl1-5/+5
Some boards have noise on the UART RX line when the UART pins are not connected to another device (such as an USB UART adapter). This can be addressed by using a pull up resistor. Not all boards may provide such a pull up resistor on the PCB so enable the SoC's pull-up on the UART RX and TX pads by default. This matches the default (from u-boot or SoC hardware) state for the pinmux configuration on these pads. Signed-off-by: Martin Blumenstingl <martin.blumenstingl@googlemail.com> Reviewed-by: Neil Armstrong <neil.armstrong@linaro.org> Link: https://lore.kernel.org/r/20250329185855.854186-4-martin.blumenstingl@googlemail.com Signed-off-by: Neil Armstrong <neil.armstrong@linaro.org>
2025-04-22arm64: dts: amlogic: a4: add pinctrl nodeXianwei Zhao1-0/+125
Add pinctrl device to support Amlogic A4 and add uart pinconf. Signed-off-by: Xianwei Zhao <xianwei.zhao@amlogic.com> Reviewed-by: Neil Armstrong <neil.armstrong@linaro.org> Link: https://lore.kernel.org/r/20250326-pinctrl-node-a4-v1-1-8c30639480f6@amlogic.com Signed-off-by: Neil Armstrong <neil.armstrong@linaro.org>
2025-04-22arm64: dts: amlogic: g12: fix reference to unknown/untested PWM clockMartin Blumenstingl1-3/+3
Device-tree expects absent clocks to be specified as <0> (instead of using <>). This fixes using the FCLK4/FCLK3 clocks as they are now seen at their correct index (while before they were recognized, but at the correct index - resulting in the hardware using a different clock than what the kernel sees). Fixes: e6884f2e4129 ("arm64: dts: amlogic: g12: switch to the new PWM controller binding") Signed-off-by: Martin Blumenstingl <martin.blumenstingl@googlemail.com> Reviewed-by: Neil Armstrong <neil.armstrong@linaro.org> Link: https://lore.kernel.org/r/20250420164801.330505-5-martin.blumenstingl@googlemail.com Signed-off-by: Neil Armstrong <neil.armstrong@linaro.org>
2025-04-22arm64: dts: amlogic: gx: fix reference to unknown/untested PWM clockMartin Blumenstingl2-6/+6
Device-tree expects absent clocks to be specified as <0> (instead of using <>). This fixes using the FCLK4/FCLK3 clocks as they are now seen at their correct index (while before they were recognized, but at the correct index - resulting in the hardware using a different clock than what the kernel sees). Fixes: a526eeef9a81 ("arm64: dts: amlogic: gx: switch to the new PWM controller binding") Signed-off-by: Martin Blumenstingl <martin.blumenstingl@googlemail.com> Reviewed-by: Neil Armstrong <neil.armstrong@linaro.org> Link: https://lore.kernel.org/r/20250420164801.330505-4-martin.blumenstingl@googlemail.com Signed-off-by: Neil Armstrong <neil.armstrong@linaro.org>
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