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2021-01-30arm64: dts: zii-ultra: fix i2c pin configurationLucas Stach1-8/+8
Reduce slew rate and set drive strength to 105 Ohm. The previous settings had some issues with signal ringing, due to the slew rate being too fast. Signed-off-by: Lucas Stach <l.stach@pengutronix.de> Signed-off-by: Shawn Guo <shawnguo@kernel.org>
2021-01-30arm64: dts: zii-ultra: add sound supportLucas Stach3-0/+219
This adds all the necessary nodes to get audio support on both the RMB3 and Zest boards. Signed-off-by: Lucas Stach <l.stach@pengutronix.de> Signed-off-by: Shawn Guo <shawnguo@kernel.org>
2021-01-30arm64: dts: ls1046a: fix dcfg address rangeZyta Szpak1-1/+1
Dcfg was overlapping with clockgen address space which resulted in failure in memory allocation for dcfg. According regs description dcfg size should not be bigger than 4KB. Signed-off-by: Zyta Szpak <zr@semihalf.com> Fixes: 8126d88162a5 ("arm64: dts: add QorIQ LS1046A SoC support") Signed-off-by: Shawn Guo <shawnguo@kernel.org>
2021-01-30arm64: dts: ls1028a: Enable flexcan support for LS1028A-RDB/QDSKuldeep Singh2-0/+24
LS1028A-RDB/QDS provides support for flexcan. Add the properties. Signed-off-by: Kuldeep Singh <kuldeep.singh@nxp.com> Signed-off-by: Shawn Guo <shawnguo@kernel.org>
2021-01-30arm64: dts: ls1028a: Update flexcan propertiesKuldeep Singh1-6/+10
LS1028A supports two flexcan controllers similar to LX2160A. There's already a compatible entry defined i.e "fsl,lx2160ar1-flexcan" which can be further reused for LS1028A. Please note, "fsl,ls1028ar1-flexcan" compatible entry doesn't exists and can be safely removed. LS1028A has a single peripheral clock (i.e platform clock) source connected to both "ipg" and "per" and therefore, remove "sysclk" as clock source from device-tree. Signed-off-by: Kuldeep Singh <kuldeep.singh@nxp.com> Signed-off-by: Shawn Guo <shawnguo@kernel.org>
2021-01-30arm64: dts: lx2160a: Add flexcan supportKuldeep Singh3-0/+48
LX2160A supports two flexcan controllers. Add the support. Enable support further for LX2160A-RDB/QDS. Signed-off-by: Kuldeep Singh <kuldeep.singh@nxp.com> Signed-off-by: Shawn Guo <shawnguo@kernel.org>
2021-01-30Merge tag 'tegra-for-5.12-arm64-dt' of ↵Arnd Bergmann15-657/+2779
git://git.kernel.org/pub/scm/linux/kernel/git/tegra/linux into arm/dt arm64: tegra: Device tree changes for v5.12-rc1 Fixes an issue with HDA codec detection by properly wiring up the power-domain for the HDA controller. This also fixes one of the USB-C ports on Jetson AGX Xavier and enables support for audio on various Tegra210, Tegra186 and Tegra194 boards. The Jetson Nano and Jetson TX1 also gain QSPI support. * tag 'tegra-for-5.12-arm64-dt' of git://git.kernel.org/pub/scm/linux/kernel/git/tegra/linux: arm64: tegra: Audio graph sound card for Jetson AGX Xavier arm64: tegra: Audio graph sound card for Jetson TX2 Revert "arm64: tegra: Disable the ACONNECT for Jetson TX2" arm64: tegra: Add RT5658 device entry arm64: tegra: Add support for Jetson Xavier NX with eMMC arm64: tegra: Prepare for supporting the Jetson Xavier NX with eMMC arm64: tegra: Enable QSPI on Jetson Xavier NX arm64: tegra: Add QSPI nodes on Tegra194 arm64: tegra: Enable QSPI on Jetson Nano arm64: tegra: Audio graph sound card for Jetson Nano and TX1 arm64: tegra: Audio graph header for Tegra210 arm64: tegra: Order nodes alphabetically on Tegra210 arm64: tegra: Enable Jetson-Xavier J512 USB host arm64: tegra: Add XUSB pad controller's "nvidia,pmc" property on Tegra210 arm64: tegra: Add power-domain for Tegra210 HDA dt-bindings: clock: tegra: Add clock ID TEGRA210_CLK_QSPI_PM Link: https://lore.kernel.org/r/20210129193254.3610492-5-thierry.reding@gmail.com Signed-off-by: Arnd Bergmann <arnd@arndb.de>
2021-01-30Merge tag 'tegra-for-5.12-arm64-defconfig' of ↵Arnd Bergmann1-0/+2
git://git.kernel.org/pub/scm/linux/kernel/git/tegra/linux into arm/defconfig arm64: tegra: Default configuration changes for v5.12-rc1 Enables the Tegra SoC thermal driver that is used on various Tegra132 and Tegra210 platforms, as well as the Tegra audio graph driver that can be used to enable audio support on Tegra210, Tegra186 and Tegra194. * tag 'tegra-for-5.12-arm64-defconfig' of git://git.kernel.org/pub/scm/linux/kernel/git/tegra/linux: arm64: defconfig: Enable Tegra audio graph card driver arm64: defconfig: Enable Tegra SoC Thermal driver Link: https://lore.kernel.org/r/20210129193254.3610492-6-thierry.reding@gmail.com Signed-off-by: Arnd Bergmann <arnd@arndb.de>
2021-01-30Merge tag 'arm64-fixes' of ↵Linus Torvalds1-2/+4
git://git.kernel.org/pub/scm/linux/kernel/git/arm64/linux Pull arm64 fixes from Catalin Marinas: - Fix the virt_addr_valid() returning true for < PAGE_OFFSET addresses. - Do not blindly trust the DMA masks from ACPI/IORT. * tag 'arm64-fixes' of git://git.kernel.org/pub/scm/linux/kernel/git/arm64/linux: ACPI/IORT: Do not blindly trust DMA masks from firmware arm64: Fix kernel address detection of __is_lm_address()
2021-01-29arm64: tegra: Audio graph sound card for Jetson AGX XavierSameer Pujar2-0/+576
Enable support for audio-graph based sound card on Jetson AGX Xavier. Following I/O interfaces are enabled. * I2S1, I2S2, I2S4 and I2S6 * DMIC3 Signed-off-by: Sameer Pujar <spujar@nvidia.com> Signed-off-by: Thierry Reding <treding@nvidia.com>
2021-01-29arm64: tegra: Audio graph sound card for Jetson TX2Sameer Pujar2-0/+752
Enable support for audio-graph based sound card on Jetson TX2. Based on the board design following I/O modules are enabled. * All I2S instances (I2S1 ... I2S6) * All DSPK instances (DSPK1, DSPK2) * DMIC1, DMIC2 and DMIC3 Signed-off-by: Sameer Pujar <spujar@nvidia.com> Signed-off-by: Thierry Reding <treding@nvidia.com>
2021-01-29Revert "arm64: tegra: Disable the ACONNECT for Jetson TX2"Sameer Pujar1-0/+12
This reverts commit fb319496935b ("arm64: tegra: Disable the ACONNECT for Jetson TX2"). Signed-off-by: Sameer Pujar <spujar@nvidia.com> Signed-off-by: Thierry Reding <treding@nvidia.com>
2021-01-29arm64: tegra: Add RT5658 device entrySameer Pujar1-0/+15
Jetson AGX Xavier has an on-board audio codec whicn is connected to Tegra I2S1 interface. Hence add corresponding device node for the audio codec. Signed-off-by: Sameer Pujar <spujar@nvidia.com> Reviewed-by: Jon Hunter <jonathanh@nvidia.com> Signed-off-by: Thierry Reding <treding@nvidia.com>
2021-01-29arm64: dts: mediatek: mt8183-evb: add PWM supportFabien Parent1-0/+12
Enable the pwm driver and set the pinctrl for PWM A line. Signed-off-by: Fabien Parent <fparent@baylibre.com> Link: https://lore.kernel.org/r/20201209120322.137610-2-fparent@baylibre.com Signed-off-by: Matthias Brugger <matthias.bgg@gmail.com>
2021-01-29arm64: dts: mediatek: mt8183: add pwm nodeFabien Parent1-0/+14
MT8183 SoC has 4 PWMs. Add the pwm node in order to support them. Signed-off-by: Fabien Parent <fparent@baylibre.com> Link: https://lore.kernel.org/r/20201209120322.137610-1-fparent@baylibre.com Signed-off-by: Matthias Brugger <matthias.bgg@gmail.com>
2021-01-29arm64: dts: armada: add pwm offsets for ap/cp gpiosBaruch Siach2-0/+13
The 'marvell,pwm-offset' property of both GPIO blocks (per CP component) point to the same counter registers offset. The driver will decide how to use counters A/B. This is different from the convention of pwm on earlier Armada series (370/38x). On those systems the assignment of A/B counters to GPIO blocks is coded in both DT and the driver. The actual behaviour of the current driver on Armada 8K/7K is the same as earlier systems. Add also clock properties for base pwm frequency reference. Signed-off-by: Baruch Siach <baruch@tkos.co.il> Signed-off-by: Gregory CLEMENT <gregory.clement@bootlin.com>
2021-01-29arm64: dts: marvell: armada-37xx: Add SATA comphy into main armada-37xx.dtsi ↵Pali Rohár2-2/+2
file SATA on A3720 SOC can use only comphy2, so move this definition from board specific DTS file armada-3720-espressobin.dtsi into main A3720 SOC file armada-37xx.dtsi. Signed-off-by: Pali Rohár <pali@kernel.org> Signed-off-by: Gregory CLEMENT <gregory.clement@bootlin.com>
2021-01-29arm64: dts: cn913x-db: enable MMC HS400Marcin Wojtas1-0/+2
This patch adds necessary flags in the device tree which enable HS400 mode on AP807 MMC controller on the CN913x-DB board. Signed-off-by: Marcin Wojtas <mw@semihalf.com> Signed-off-by: Konstantin Porotchkin <kostap@marvell.com> Signed-off-by: Gregory CLEMENT <gregory.clement@bootlin.com>
2021-01-29arm64: dts: change AP807 SDHCI compatibility stringKonstantin Porotchkin1-0/+5
This patch adds new compatible string to AP807 DTSI to avoid its SDHCI controller to run in "slow mode" with disabled UHS. Signed-off-by: Marcin Wojtas <mw@semihalf.com> Signed-off-by: Konstantin Porotchkin <kostap@marvell.com> Signed-off-by: Gregory CLEMENT <gregory.clement@bootlin.com>
2021-01-29arm64: dts: armada-3720-turris-mox: rename u-boot mtd partition to a53-firmwareMarek Behún1-1/+1
The partition called "u-boot" in reality contains TF-A and U-Boot, and TF-A is before U-Boot. Rename this parition to "a53-firmware" to avoid confusion for users, since they cannot simply build U-Boot from U-Boot repository and flash the resulting image there. Instead they have to build the firmware with the sources from the mox-boot-builder repository [1] and flash the a53-firmware.bin binary there. [1] https://gitlab.nic.cz/turris/mox-boot-builder Signed-off-by: Marek Behún <kabel@kernel.org> Fixes: 7109d817db2e ("arm64: dts: marvell: add DTS for Turris Mox") Cc: Gregory CLEMENT <gregory.clement@bootlin.com> Cc: linux-arm-kernel@lists.infradead.org Signed-off-by: Gregory CLEMENT <gregory.clement@bootlin.com>
2021-01-29arm64: dts: fsl-ls1012a-frdm: add spi-uart devicePawel Dembicki1-0/+21
This patch adds spi-uart controller to LS1012A-FRDM board dts. Device is equipped in SC16IS740 from NXP. Signed-off-by: Pawel Dembicki <paweldembicki@gmail.com> Signed-off-by: Shawn Guo <shawnguo@kernel.org>
2021-01-29arm64: dts: fsl-ls1012a-rdb: add i2c devicesPawel Dembicki1-0/+45
LS1012A-RDB equipped in some i2c devices: - 3x GPIO Expander: PCAL9555A (NXP) - Gyro: FXAS21002 (NXP) - Accelerometer: FXOS8700 (NXP) - Current & Power Monitor: INA220 (TI) This patch add listed devices to dts. Signed-off-by: Pawel Dembicki <paweldembicki@gmail.com> Signed-off-by: Shawn Guo <shawnguo@kernel.org>
2021-01-29Merge tag 'renesas-arm-dt-for-v5.12-tag2' of ↵Arnd Bergmann10-1/+774
git://git.kernel.org/pub/scm/linux/kernel/git/geert/renesas-devel into arm/dt Renesas ARM DT updates for v5.12 (take two) - Increase support (SPI, I2C, Ethernet, Serial, MMC) for the R-Car V3U SoC on the Renesas Falcon board, - Disable SD functions for plain eMMC, - A minor fix. * tag 'renesas-arm-dt-for-v5.12-tag2' of git://git.kernel.org/pub/scm/linux/kernel/git/geert/renesas-devel: arm64: dts: renesas: beacon: Fix EEPROM compatible value arm64: dts: renesas: falcon: Enable MMC arm64: dts: renesas: r8a779a0: Add MMC node arm64: dts: renesas: r8a779a0: Add HSCIF support arm64: dts: renesas: falcon: Complete SCIF0 nodes arm64: dts: renesas: r8a779a0: Add & update SCIF nodes arm64: dts: renesas: falcon: Add Ethernet-AVB0 support arm64: dts: renesas: r8a779a0: Add Ethernet-AVB support arm64: dts: renesas: falcon: Add I2C0,1,6 support arm64: dts: renesas: r8a779a0: Add I2C nodes arm64: dts: renesas: Disable SD functions for plain eMMC arm64: dts: renesas: r8a779a0: Add MSIOF device nodes Link: https://lore.kernel.org/r/20210129090815.2552425-2-geert+renesas@glider.be Signed-off-by: Arnd Bergmann <arnd@arndb.de>
2021-01-29Merge tag 'hisi-arm64-dt-for-5.12v2' of ↵Arnd Bergmann8-34/+714
git://github.com/hisilicon/linux-hisi into arm/dt ARM64: DT: Hisilicon ARM64 DT updates for 5.12 - Further cleanups of the hisilicon DTS to align with the dtschema - Add or update the I2C, pinctrl and reset nodes for Hikey970 * tag 'hisi-arm64-dt-for-5.12v2' of git://github.com/hisilicon/linux-hisi: arm64: dts: hisilicon: hi3670.dtsi: add I2C settings arm64: dts: hisilicon: hikey970-pinctrl.dtsi: add missing pinctrl settings arm64: dts: hisilicon: hi3670.dtsi: add iomcu_rst arm64: dts: hisilicon: delete unused property smmu-cb-memtype arm64: dts: hisilicon: avoid irrelevant nodes being mistakenly identified as PHY nodes arm64: dts: hisilicon: normalize the node name of the localbus arm64: dts: hisilicon: normalize the node name of the module thermal arm64: dts: hisilicon: place clock-names "bus" before "core" arm64: dts: hisilicon: separate each group of data in the property "ranges" Link: https://lore.kernel.org/r/6013D1C7.90902@hisilicon.com Signed-off-by: Arnd Bergmann <arnd@arndb.de>
2021-01-29arm64: dts: imx8mn-beacon-som: Enable QSPI on SOMAdam Ford1-0/+28
There is a QSPI chip connected to the FlexSPI bus. Enable it. Signed-off-by: Adam Ford <aford173@gmail.com> Reviewed-by: Krzysztof Kozlowski <krzk@kernel.org> Signed-off-by: Shawn Guo <shawnguo@kernel.org>
2021-01-29arm64: dts: imx8mn: Add fspi nodeAdam Ford1-0/+13
The i.MX8M Nano has the same Flexspi controller used in the i.MX8M Mini. Add the node and disable it by default. Signed-off-by: Adam Ford <aford173@gmail.com> Signed-off-by: Shawn Guo <shawnguo@kernel.org>
2021-01-29arm64: dts: hisilicon: hi3670.dtsi: add I2C settingsMauro Carvalho Chehab1-0/+71
The I2C buses are not declared at the device tree. As this will be needed by further patches, add them, keeping all in disabled state. Per-board settings can override it. Signed-off-by: Mauro Carvalho Chehab <mchehab+huawei@kernel.org> Signed-off-by: Wei Xu <xuwei5@hisilicon.com>
2021-01-29arm64: dts: hisilicon: hikey970-pinctrl.dtsi: add missing pinctrl settingsMauro Carvalho Chehab1-11/+621
There are several pinctrl settings that are missing at this DT file. Also, the entries are out of order. Add the missing bits, as they'll be required by the DRM driver - and probably by other drivers not upstreamed yet. Reorder the entres, adding the missing bits. Signed-off-by: Mauro Carvalho Chehab <mchehab+huawei@kernel.org> Signed-off-by: Wei Xu <xuwei5@hisilicon.com>
2021-01-29arm64: dts: hisilicon: hi3670.dtsi: add iomcu_rstMauro Carvalho Chehab1-0/+6
This is required in order to support USB. Signed-off-by: Mauro Carvalho Chehab <mchehab+huawei@kernel.org> Signed-off-by: Wei Xu <xuwei5@hisilicon.com>
2021-01-29arm64: dts: hisilicon: delete unused property smmu-cb-memtypeZhen Lei2-6/+0
The "smmu-cb-memtype" is a private property developed by the Hisilicon driver in the early stage and is not used now. So delete it. Otherwise, below YAML check warnings are reported: arch/arm64/boot/dts/hisilicon/hip06-d03.dt.yaml: iommu@a0040000: \ 'smmu-cb-memtype' does not match any of the regexes: 'pinctrl-[0-9]+' arch/arm64/boot/dts/hisilicon/hip07-d05.dt.yaml: iommu@a0040000: \ 'smmu-cb-memtype' does not match any of the regexes: 'pinctrl-[0-9]+' Signed-off-by: Zhen Lei <thunder.leizhen@huawei.com> Signed-off-by: Wei Xu <xuwei5@hisilicon.com>
2021-01-29arm64: dts: hisilicon: avoid irrelevant nodes being mistakenly identified as ↵Zhen Lei1-2/+2
PHY nodes Currently, the names of several nodes incorrectly match common PHY provider schema. And the phy-provider.yaml requires them must have property "#phy-cells". As a result, false positives similar to the following are reported: usb2-phy@120: '#phy-cells' is a required property Change their names slightly so that they do not match pattern: "^(|usb-|usb2-|usb3-|pci-|pcie-|sata-)phy(@[0-9a-f,]+)*$". Signed-off-by: Zhen Lei <thunder.leizhen@huawei.com> Signed-off-by: Wei Xu <xuwei5@hisilicon.com>
2021-01-29arm64: dts: hisilicon: normalize the node name of the localbusZhen Lei1-1/+1
Change the node name of the localbus to match '^([a-z][a-z0-9\\-]+-bus|bus|soc|axi|ahb|apb)(@[0-9a-f]+)?$'. This error is detected by simple-bus.yaml. Signed-off-by: Zhen Lei <thunder.leizhen@huawei.com> Signed-off-by: Wei Xu <xuwei5@hisilicon.com>
2021-01-29arm64: dts: hisilicon: normalize the node name of the module thermalZhen Lei2-6/+6
1. Change the node name of the thermal zone to match '^[a-zA-Z][a-zA-Z0-9\\-]{1,12}-thermal$', add suffix "-thermal". 2. Change the node name of the trip point to match '^[a-zA-Z][a-zA-Z0-9\\-_]{0,63}$', delete character "@". Signed-off-by: Zhen Lei <thunder.leizhen@huawei.com> Signed-off-by: Wei Xu <xuwei5@hisilicon.com>
2021-01-29arm64: dts: hisilicon: place clock-names "bus" before "core"Zhen Lei1-1/+1
Look at the clock-names schema defined in arm,mali-utgard.yaml: clock-names: items: - const: bus - const: core The "bus" needs to be placed before the "core". Signed-off-by: Zhen Lei <thunder.leizhen@huawei.com> Signed-off-by: Wei Xu <xuwei5@hisilicon.com>
2021-01-29arm64: dts: hisilicon: separate each group of data in the property "ranges"Zhen Lei3-7/+6
Do not write the "ranges" of multiple groups of data into a uint32 array, use <> to separate them. Otherwise, the errors similar to the following will be reported: soc: pcie@a0090000:ranges: [[33554432, 0, 2986344448, 0, 2986344448, 0, \ 100597760, 16777216, 0, 0, 0, 3086942208, 0, 65536]] is not valid under \ any of the given schemas (Possible causes of the failure): soc: pcie@a0090000:ranges: [[33554432, 0, 2986344448, 0, 2986344448, 0, \ 100597760, 16777216, 0, 0, 0, 3086942208, 0, 65536]] is not of type 'boolean' soc: pcie@a0090000:ranges:0: [33554432, 0, 2986344448, 0, 2986344448, 0, \ 100597760, 16777216, 0, 0, 0, 3086942208, 0, 65536] is too long Signed-off-by: Zhen Lei <thunder.leizhen@huawei.com> Signed-off-by: Wei Xu <xuwei5@hisilicon.com>
2021-01-29arm64: dts: Add Librem5 EvergreenMartin Kepplinger2-0/+36
Add librem5-r4 with specifics to that revision like the near-level, battery and charger properties. For schematics and more information, see https://developer.puri.sm/Librem5/Hardware_Reference/Evergreen.html Signed-off-by: Martin Kepplinger <martin.kepplinger@puri.sm> Reviewed-by: Krzysztof Kozlowski <krzk@kernel.org> Signed-off-by: Shawn Guo <shawnguo@kernel.org>
2021-01-29arm64: dts: imx8mq-librem5: set regulators boot-onMartin Kepplinger1-0/+13
Expect all those regulators to be turned on initially. Signed-off-by: Martin Kepplinger <martin.kepplinger@puri.sm> Signed-off-by: Shawn Guo <shawnguo@kernel.org>
2021-01-29arm64: dts: imx8mq-librem5: enable the LCD panelMartin Kepplinger1-2/+51
This enables the Librem5's ft8006p based LCD panel driven by the imx8mq's Northwest Logic DSI IP core and mxsfb display controller. Signed-off-by: Martin Kepplinger <martin.kepplinger@puri.sm> Signed-off-by: Shawn Guo <shawnguo@kernel.org>
2021-01-29arm64: dts: imx8mq-librem5: Add LCD_1V8 regulatorGuido Günther1-0/+15
It's a supply for to touch and LCD. Signed-off-by: Guido Günther <agx@sigxcpu.org> Signed-off-by: Martin Kepplinger <martin.kepplinger@puri.sm> Signed-off-by: Shawn Guo <shawnguo@kernel.org>
2021-01-29arm64: dts: imx8mq-librem5: Add usb-c chip as supplier for the chargerGuido Günther1-0/+1
The tps65982 feeds the bq25895 charge controller on the Librem 5. Signed-off-by: Guido Günther <agx@sigxcpu.org> Signed-off-by: Martin Kepplinger <martin.kepplinger@puri.sm> Signed-off-by: Shawn Guo <shawnguo@kernel.org>
2021-01-29arm64: dts: imx8mq-librem5: Don't mark buck3 as always onGuido Günther1-1/+0
With the pmic driver fixed we can now shut off the regulator in the gpc. Signed-off-by: Guido Günther <agx@sigxcpu.org> Signed-off-by: Martin Kepplinger <martin.kepplinger@puri.sm> Signed-off-by: Shawn Guo <shawnguo@kernel.org>
2021-01-29arm64: dts: imx8mq-librem5: Mark charger IRQ as High-ZGuido Günther1-1/+1
This is consistent with other IRQs and makes keeps currents low. Signed-off-by: Guido Günther <agx@sigxcpu.org> Signed-off-by: Martin Kepplinger <martin.kepplinger@puri.sm> Reviewed-by: Krzysztof Kozlowski <krzk@kernel.org> Signed-off-by: Shawn Guo <shawnguo@kernel.org>
2021-01-29arm64: defconfig: Enable vibra-pwmGuido Günther1-0/+1
The haptic motor for the Librem 5 uses this. Signed-off-by: Guido Günther <agx@sigxcpu.org> Signed-off-by: Martin Kepplinger <martin.kepplinger@puri.sm> Reviewed-by: Krzysztof Kozlowski <krzk@kernel.org> Signed-off-by: Shawn Guo <shawnguo@kernel.org>
2021-01-29arm64: dts: renesas: beacon: Fix EEPROM compatible valueGeert Uytterhoeven1-1/+1
"make dtbs_check" fails with: arch/arm64/boot/dts/renesas/r8a774b1-beacon-rzg2n-kit.dt.yaml: eeprom@50: compatible: 'oneOf' conditional failed, one must be fixed: 'microchip,at24c64' does not match '^(atmel|catalyst|microchip|nxp|ramtron|renesas|rohm|st),(24(c|cs|lc|mac)[0-9]+|spd)$' Fix this by dropping the bogus "at" prefix. Fixes: a1d8a344f1ca0709 ("arm64: dts: renesas: Introduce r8a774a1-beacon-rzg2m-kit") Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be> Link: https://lore.kernel.org/r/20210128110136.2293490-1-geert+renesas@glider.be
2021-01-29arm64: dts: lx2160a-cex7: increase at8035 PHY gigabit Tw parameterRussell King1-0/+1
Increase the SmartEEE Tw parameter for Atheros PHYs to stop gigabit links from sporadically dropping. Testing on this platform shows that a value of 24 results in a stable link, whereas 23 or below has the occasional drop. Tested with a Netgear GS116 unmanaged switch link partner with Cat 5e cabling. Signed-off-by: Russell King <rmk+kernel@armlinux.org.uk> Signed-off-by: Shawn Guo <shawnguo@kernel.org>
2021-01-29arm64: dts: imx8mq: use_dt_domains for pci nodePeng Fan1-0/+2
We are using Jailhouse Hypervsior which has virtual pci node that use dt domains. so also use dt domains for pci node, this will avoid conflict with Jailhouse Hypervisor to trigger the following error: pr_err("Inconsistent \"linux,pci-domain\" property in DT\n"); Reviewed-by: Richard Zhu <hongxing.zhu@nxp.com> Signed-off-by: Peng Fan <peng.fan@nxp.com> Signed-off-by: Shawn Guo <shawnguo@kernel.org>
2021-01-29Merge git://git.kernel.org/pub/scm/linux/kernel/git/netdev/netJakub Kicinski11-60/+85
drivers/net/can/dev.c b552766c872f ("can: dev: prevent potential information leak in can_fill_info()") 3e77f70e7345 ("can: dev: move driver related infrastructure into separate subdir") 0a042c6ec991 ("can: dev: move netlink related code into seperate file") Code move. drivers/net/ethernet/mellanox/mlx5/core/en_ethtool.c 57ac4a31c483 ("net/mlx5e: Correctly handle changing the number of queues when the interface is down") 214baf22870c ("net/mlx5e: Support HTB offload") Adjacent code changes net/switchdev/switchdev.c 20776b465c0c ("net: switchdev: don't set port_obj_info->handled true when -EOPNOTSUPP") ffb68fc58e96 ("net: switchdev: remove the transaction structure from port object notifiers") bae33f2b5afe ("net: switchdev: remove the transaction structure from port attributes") Transaction parameter gets dropped otherwise keep the fix. Signed-off-by: Jakub Kicinski <kuba@kernel.org>
2021-01-28KVM: arm64: Move __hyp_set_vectors out of .hyp.textQuentin Perret1-0/+2
The .hyp.text section is supposed to be reserved for the nVHE EL2 code. However, there is currently one occurrence of EL1 executing code located in .hyp.text when calling __hyp_{re}set_vectors(), which happen to sit next to the EL2 stub vectors. While not a problem yet, such patterns will cause issues when removing the host kernel from the TCB, so a cleaner split would be preferable. Fix this by delimiting the end of the .hyp.text section in hyp-stub.S. Acked-by: Marc Zyngier <maz@kernel.org> Signed-off-by: Quentin Perret <qperret@google.com> Link: https://lore.kernel.org/r/20210128173850.2478161-1-qperret@google.com Signed-off-by: Will Deacon <will@kernel.org>
2021-01-28Merge tag 'kvmarm-fixes-5.11-3' of ↵Paolo Bonzini1-9/+11
git://git.kernel.org/pub/scm/linux/kernel/git/kvmarm/kvmarm into HEAD KVM/arm64 fixes for 5.11, take #3 - Avoid clobbering extra registers on initialisation
2021-01-28Merge tag 'arm-soc-fixes-v5.11-2' of ↵Linus Torvalds5-6/+9
git://git.kernel.org/pub/scm/linux/kernel/git/soc/soc Pull ARM SoC fixes from Arnd Bergmann: "These are the current arm-soc bug fixes for linux-5.11. I already merged a larger set that just came in during the past three days but has not had much exposure in linux-next, but this is the subset I merged last week. Most of these are for the NXP i.MX platform (descriptions from their pull request): - Fix pcf2127 reset for imx7d-flex-concentrator board. - Fix i.MX6 suspend with Thumb-2 kernel. - Fix ethernet-phy address issue on imx6qdl-sr-som board. - Fix GPIO3 `gpio-ranges` on i.MX8MP. - Select SOC_BUS for IMX_SCU driver to fix build issue. - Fix backlight pwm on imx6qdl-kontron-samx6i which is lost from #pwm-cells conversion. - Fix duplicated bus node name for i.MX8MN SoC. - Fix reset register offset on LS1028A SoC. - Rename MMC node aliases for imx6q-tbs2910 to keep the MMC device index consistent with previous kernel version. - Selecting ARM_GIC_V3 on non-CP15 processors to fix one build failure with i.MX8M SoC driver. - Fix typos with status property on imx6qdl-kontron-samx6i board. - Fix duplicated regulator-name on imx6qdl-gw52xx board. Aside from i.MX, the bugfixes are all over the place: - Coccinelle found a refcount imbalance on integrator - defconfig fix for TI K3 - A boot regression fix for ST ux500 - A code preemption fix for the optee driver - USB DMA regression on Broadcom Stingray - A bogus boot time warning fix for at91 code" * tag 'arm-soc-fixes-v5.11-2' of git://git.kernel.org/pub/scm/linux/kernel/git/soc/soc: MAINTAINERS: Include bcm2835 subsequents into search arm64: dts: broadcom: Fix USB DMA address translation for Stingray drivers: soc: atmel: add null entry at the end of at91_soc_allowed_list[] drivers: soc: atmel: Avoid calling at91_soc_init on non AT91 SoCs tee: optee: replace might_sleep with cond_resched firmware: imx: select SOC_BUS to fix firmware build arm64: dts: imx8mp: Correct the gpio ranges of gpio3 ARM: dts: imx6qdl-sr-som: fix some cubox-i platforms ARM: imx: build suspend-imx6.S with arm instruction set ARM: dts: imx7d-flex-concentrator: fix pcf2127 reset ARM: dts: ux500: Reserve memory carveouts arm64: defconfig: Drop unused K3 SoC specific options bus: arm-integrator-lm: Add of_node_put() before return statement ARM: dts: imx6qdl-gw52xx: fix duplicate regulator naming ARM: dts: imx6qdl-kontron-samx6i: fix i2c_lcd/cam default status ARM: imx: fix imx8m dependencies ARM: dts: tbs2910: rename MMC node aliases arm64: dts: ls1028a: fix the offset of the reset register arm64: dts: imx8mn: Fix duplicate node name ARM: dts: imx6qdl-kontron-samx6i: fix pwms for lcd-backlight
generated by cgit v1.2.3 (git 2.39.0) at 2025-09-28 02:39:12 +0300