starfive-tech/linux.git - StarFive Tech Linux Kernel for VisionFive (JH7110) boards (mirror)

Age	Commit message (Expand)	Author	Files	Lines
2015-03-30	arm64: Extract feature parsing code from cpu_errata.c	Marc Zyngier	1	-0/+1
2015-01-23	arm64: Track system support for mixed endian EL0	Suzuki K. Poulose	1	-0/+22
2015-01-15	arm64: kernel: add support for cpu cache information	Sudeep Holla	1	-12/+0
2015-01-07	arm64: sanity checks: add missing AArch32 registers	Mark Rutland	1	-0/+10
2014-11-25	arm64: sanity checks: add ID_AA64DFR{0,1}_EL1	Mark Rutland	1	-0/+11
2014-11-25	arm64: sanity checks: add missing newline to print	Mark Rutland	1	-1/+1
2014-11-25	arm64: sanity checks: ignore ID_MMFR0.AuxReg	Mark Rutland	1	-1/+6
2014-11-25	arm64: detect silicon revisions and set cap bits accordingly	Andre Przywara	1	-0/+3
2014-09-08	arm64: don't flag non-aliasing VIPT I-caches as aliasing	Ard Biesheuvel	1	-2/+12
2014-09-08	arm64: add helper functions to read I-cache attributes	Ard Biesheuvel	1	-0/+14
2014-08-18	arm64: fix typo in I-cache policy detection	Ard Biesheuvel	1	-1/+1
2014-08-01	arm64: add newline to I-cache policy string	Mark Rutland	1	-1/+1
2014-07-18	arm64: add runtime system sanity checks	Mark Rutland	1	-0/+93
2014-07-18	arm64: cachetype: report weakest cache policy	Mark Rutland	1	-0/+26
2014-07-18	arm64: cpuinfo: record cpu system register values	Mark Rutland	1	-0/+73