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starfive-tech/linux.git
JH7100_VisionFive_OH_dev
JH7110_VisionFive2_510_devel
JH7110_VisionFive2_6.1.y_devel
JH7110_VisionFive2_6.6.y_devel
JH7110_VisionFive2_devel
JH7110_VisionFive2_upstream
beaglev-5.13.y
beaglev_fedora_devel
buildroot-upstream
esmil_starlight
fedora-vic-7100_5.10.6
master
openwrt-6.1.y
rt-ethercat-release
rt-linux-6.6.y-release
rt-linux-release
rtthread_AMP
starfive-5.13
starfive-5.15-dubhe
starfive-6.1-dubhe
starfive-6.1.65-dubhe
starfive-6.6.10-dubhe
starfive-6.6.31-dubhe
starfive-6.6.48-dubhe
starlight-5.14.y
visionfive
visionfive-5.13.y-devel
visionfive-5.15.y
visionfive-5.15.y-devel
visionfive-5.15.y_fedora_devel
visionfive-5.16.y
visionfive-5.17.y
visionfive-5.18.y
visionfive-5.19.y
visionfive-6.4.y
visionfive_fedora_devel
StarFive Tech Linux Kernel for VisionFive (JH7110) boards (mirror)
Andrey V.Kosteltsev
summary
refs
log
tree
commit
diff
log msg
author
committer
range
path:
root
/
arch
/
arm64
/
include
/
asm
/
mmu_context.h
Age
Commit message (
Expand
)
Author
Files
Lines
2016-02-25
arm64: Ensure the secondary CPUs have safe ASIDBits size
Suzuki K Poulose
1
-0
/
+2
2016-02-16
arm64: mm: add code to safely replace TTBR1_EL1
Mark Rutland
1
-0
/
+19
2016-02-16
arm64: add function to install the idmap
Mark Rutland
1
-2
/
+14
2016-02-16
arm64: unify idmap removal
Mark Rutland
1
-0
/
+25
2016-02-16
arm64: mm: place empty_zero_page in bss
Mark Rutland
1
-1
/
+1
2015-11-18
arm64: use non-global mappings for UEFI runtime regions
Ard Biesheuvel
1
-1
/
+1
2015-10-07
arm64: switch_mm: simplify mm and CPU checks
Will Deacon
1
-2
/
+4
2015-10-07
arm64: mm: rewrite ASID allocator and MM context-switching code
Will Deacon
1
-65
/
+11
2015-10-07
arm64: mm: remove unused cpu_set_idmap_tcr_t0sz function
Will Deacon
1
-23
/
+12
2015-04-16
Merge tag 'arm64-upstream' of git://git.kernel.org/pub/scm/linux/kernel/git/a...
Linus Torvalds
1
-0
/
+43
2015-03-23
arm64: Use the reserved TTBR0 if context switching to the init_mm
Catalin Marinas
1
-0
/
+9
2015-03-23
arm64: mm: increase VA range of identity map
Ard Biesheuvel
1
-0
/
+43
2013-06-07
arm64: mm: don't bother invalidating the icache in switch_mm
Will Deacon
1
-6
/
+0
2013-02-11
arm64: mm: update CONTEXTIDR register to contain PID of current process
Will Deacon
1
-0
/
+15
2012-09-17
arm64: Process management
Catalin Marinas
1
-0
/
+152