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2025-03-13arm64: dts: qcom: sm8750-qrd: Enable ADSPKrzysztof Kozlowski1-0/+7
Enable ADSP on QRD8750 board. Reviewed-by: Melody Olvera <quic_molvera@quicinc.com> Reviewed-by: Konrad Dybcio <konrad.dybcio@oss.qualcomm.com> Signed-off-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org> Link: https://lore.kernel.org/r/20250312-sm8750-audio-v3-4-40fbb3e53f95@linaro.org Signed-off-by: Bjorn Andersson <andersson@kernel.org>
2025-03-13arm64: dts: qcom: sm8750-mtp: Enable ADSPKrzysztof Kozlowski1-0/+7
Enable ADSP on MTP8750 board. Reviewed-by: Melody Olvera <quic_molvera@quicinc.com> Reviewed-by: Konrad Dybcio <konrad.dybcio@oss.qualcomm.com> Signed-off-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org> Link: https://lore.kernel.org/r/20250312-sm8750-audio-v3-3-40fbb3e53f95@linaro.org Signed-off-by: Bjorn Andersson <andersson@kernel.org>
2025-03-13arm64: dts: qcom: sm8750: Add LPASS macro codecs and pinctrlKrzysztof Kozlowski1-0/+202
Add LPASS macro codecs and LPASS TLMM pin controller on Qualcomm SM8750 for proper sound support. These are fully compatible with earlier SM8550. Reviewed-by: Konrad Dybcio <konrad.dybcio@oss.qualcomm.com> Signed-off-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org> Link: https://lore.kernel.org/r/20250312-sm8750-audio-v3-2-40fbb3e53f95@linaro.org Signed-off-by: Bjorn Andersson <andersson@kernel.org>
2025-03-13arm64: dts: qcom: sm8750: Add IPCC, SMP2P, AOSS and ADSPKrzysztof Kozlowski1-0/+140
Add nodes for IPCC mailbox, SMP2P for ADSP, AOSS and the ADSP remoteproc PAS loader (compatible with SM8550). Reviewed-by: Melody Olvera <quic_molvera@quicinc.com> Signed-off-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org> Link: https://lore.kernel.org/r/20250312-sm8750-audio-v3-1-40fbb3e53f95@linaro.org Signed-off-by: Bjorn Andersson <andersson@kernel.org>
2025-03-13arm64: dts: qcom: ipq5424: Enable MMCVaradarajan Narayanan2-0/+9
Enable MMC and relevant pinctrl entries. Signed-off-by: Varadarajan Narayanan <quic_varada@quicinc.com> Link: https://lore.kernel.org/r/20250304113400.2806670-1-quic_varada@quicinc.com Signed-off-by: Bjorn Andersson <andersson@kernel.org>
2025-03-13arm64: dts: qcom: sm8750: Add ICE nodesGaurav Kashyap1-0/+8
Add the SM8750 nodes for the UFS Inline Crypto Engine (ICE). Signed-off-by: Gaurav Kashyap <quic_gaurkash@quicinc.com> Signed-off-by: Melody Olvera <quic_molvera@quicinc.com> Reviewed-by: Konrad Dybcio <konrad.dybcio@oss.qualcomm.com> Link: https://lore.kernel.org/r/20250113-sm8750_crypto_master-v1-6-d8e265729848@quicinc.com Signed-off-by: Bjorn Andersson <andersson@kernel.org>
2025-03-13arm64: dts: qcom: sm8750: Add TRNG nodesGaurav Kashyap1-0/+5
Add the SM8750 nodes for the True Random Number Generator (TRNG). Signed-off-by: Gaurav Kashyap <quic_gaurkash@quicinc.com> Signed-off-by: Melody Olvera <quic_molvera@quicinc.com> Link: https://lore.kernel.org/r/20250113-sm8750_crypto_master-v1-4-d8e265729848@quicinc.com Signed-off-by: Bjorn Andersson <andersson@kernel.org>
2025-03-13arm64: dts: qcom: sm8750: Add QCrypto nodesGaurav Kashyap1-0/+30
Add the QCE and Crypto BAM DMA nodes. Signed-off-by: Gaurav Kashyap <quic_gaurkash@quicinc.com> Signed-off-by: Melody Olvera <quic_molvera@quicinc.com> Link: https://lore.kernel.org/r/20250113-sm8750_crypto_master-v1-2-d8e265729848@quicinc.com Signed-off-by: Bjorn Andersson <andersson@kernel.org>
2025-03-13arm64: dts: qcom: Use recommended MBN firmware pathKrzysztof Kozlowski5-17/+17
All Qualcomm firmwares uploaded to linux-firmware are in MBN format, instead of split MDT. Firmware for boards here is not yet in linux-firmware, but if it gets accepted it will be MBN, not MDT. Change might affect users of DTS which rely on manually placed firmware files, not coming from linux-firmware package. Signed-off-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org> Reviewed-by: Konrad Dybcio <konrad.dybcio@oss.qualcomm.com> Link: https://lore.kernel.org/r/20250108120530.156928-1-krzysztof.kozlowski@linaro.org [bjorn: Updated subject] Signed-off-by: Bjorn Andersson <andersson@kernel.org>
2025-03-12arm64: dts: st: add stm32mp215f-dk board supportAmelie Delaunay2-0/+50
Add STM32MP215F Discovery Kit board support. It embeds a STM32MP235FAN SoC, with 2GB of LPDDR4, 1*USB2 peripheral bus powered typeC, 1*ETH, wifi/BT combo, LCD 18bit connector, CSI camera connector, ... Signed-off-by: Amelie Delaunay <amelie.delaunay@foss.st.com> Reviewed-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org> Link: https://lore.kernel.org/r/20250225-b4-stm32mp2_new_dts-v2-10-1a628c1580c7@foss.st.com Signed-off-by: Alexandre Torgue <alexandre.torgue@foss.st.com>
2025-03-12arm64: dts: st: introduce stm32mp21 SoCs familyAlexandre Torgue5-0/+162
STM32MP21 family is composed of 3 SoCs defined as following: -STM32MP211: common part composed of 1*Cortex-A35, common peripherals like SDMMC, UART, SPI, I2C, parallel display, 1*ETH ... -STM32MP213: STM32MP211 + a second ETH, CAN-FD. -STM32MP215: STM32MP213 + Display and CSI2. A second diversity layer exists for security features/ A35 frequency: -STM32MP21xY, "Y" gives information: -Y = A means A35@1.2GHz + no cryp IP and no secure boot. -Y = C means A35@1.2GHz + cryp IP and secure boot. -Y = D means A35@1.5GHz + no cryp IP and no secure boot. -Y = F means A35@1.5GHz + cryp IP and secure boot. Signed-off-by: Alexandre Torgue <alexandre.torgue@foss.st.com> Signed-off-by: Amelie Delaunay <amelie.delaunay@foss.st.com> Link: https://lore.kernel.org/r/20250225-b4-stm32mp2_new_dts-v2-8-1a628c1580c7@foss.st.com Signed-off-by: Alexandre Torgue <alexandre.torgue@foss.st.com>
2025-03-12arm64: dts: st: add stm32mp235f-dk board supportAmelie Delaunay2-0/+114
Add STM32MP235F Discovery Kit board support. It embeds a STM32MP235FAK SoC, with 4GB of LPDDR4, 2*USB typeA, 1*USB3 typeC, 1*ETH, wifi/BT combo, DSI HDMI, LVDS connector ... Signed-off-by: Amelie Delaunay <amelie.delaunay@foss.st.com> Link: https://lore.kernel.org/r/20250225-b4-stm32mp2_new_dts-v2-7-1a628c1580c7@foss.st.com Signed-off-by: Alexandre Torgue <alexandre.torgue@foss.st.com>
2025-03-12arm64: dts: st: introduce stm32mp23 SoCs familyAlexandre Torgue5-0/+1340
STM32MP23 family is composed of 3 SoCs defined as following: -STM32MP231: common part composed of 1*Cortex-A35, common peripherals like SDMMC, UART, SPI, I2C, parallel display, 1*ETH ... -STM32MP233: STM32MP231 + 1*Cortex-A35 (dual CPU), a second ETH, CAN-FD. -STM32MP235: STM32MP233 + GPU/AI and video encode/decode, DSI and LDVS display. A second diversity layer exists for security features/ A35 frequency: -STM32MP23xY, "Y" gives information: -Y = A means A35@1.2GHz + no cryp IP and no secure boot. -Y = C means A35@1.2GHz + cryp IP and secure boot. -Y = D means A35@1.5GHz + no cryp IP and no secure boot. -Y = F means A35@1.5GHz + cryp IP and secure boot. Signed-off-by: Alexandre Torgue <alexandre.torgue@foss.st.com> Signed-off-by: Amelie Delaunay <amelie.delaunay@foss.st.com> Link: https://lore.kernel.org/r/20250225-b4-stm32mp2_new_dts-v2-5-1a628c1580c7@foss.st.com Signed-off-by: Alexandre Torgue <alexandre.torgue@foss.st.com>
2025-03-12arm64: dts: st: add stm32mp257f-dk board supportAlexandre Torgue2-1/+116
Add STM32MP257F Discovery board support. It embeds a STM32MP257FAL SoC, with 4GB of LPDDR4, 2*USB typeA, 1*USB3 typeC, 1*ETH, wifi/BT combo, DSI HDMI, LVDS connector ... Signed-off-by: Alexandre Torgue <alexandre.torgue@foss.st.com> Signed-off-by: Amelie Delaunay <amelie.delaunay@foss.st.com> Link: https://lore.kernel.org/r/20250225-b4-stm32mp2_new_dts-v2-2-1a628c1580c7@foss.st.com Signed-off-by: Alexandre Torgue <alexandre.torgue@foss.st.com>
2025-03-12arm64: dts: rockchip: Add AP6275P wireless support to ArmSoM Sige7Jianfeng Liu1-0/+16
ArmSoM Sige7 uses the PCI-e AP6275P Wi-Fi 6 module. The pcie@0 node can be used as Bridge1, so the wifi@0 node is used as a device under the bridge 1 similar with Khadas Edge 2. Signed-off-by: Jianfeng Liu <liujianfeng1994@gmail.com> Link: https://lore.kernel.org/r/20250311142825.2727171-1-liujianfeng1994@gmail.com Signed-off-by: Heiko Stuebner <heiko@sntech.de>
2025-03-12arm64: dts: rockchip: Enable HDMI audio outputs for Orange Pi 5 PlusJimmy Hon1-0/+16
HDMI audio is available on the Orange Pi 5 Plus HDMI TX ports. Enable it for both ports. Signed-off-by: Jimmy Hon <honyuenkwun@gmail.com> Link: https://lore.kernel.org/r/20250227235623.1624-5-honyuenkwun@gmail.com Signed-off-by: Heiko Stuebner <heiko@sntech.de>
2025-03-12arm64: dts: rockchip: Enable HDMI1 on Orange Pi 5 PlusJimmy Hon1-0/+38
Enable the second HDMI output port on the Orange Pi 5 Plus Signed-off-by: Jimmy Hon <honyuenkwun@gmail.com> Reviewed-by: Ondrej Jirman <megi@xff.cz> Link: https://lore.kernel.org/r/20250227235623.1624-4-honyuenkwun@gmail.com Signed-off-by: Heiko Stuebner <heiko@sntech.de>
2025-03-12arm64: dts: rockchip: Enable HDMI audio outputs for Orange Pi 5 MaxJimmy Hon1-0/+16
HDMI audio is available on the Orange Pi 5 Max HDMI TX ports. Enable it for both ports. Signed-off-by: Jimmy Hon <honyuenkwun@gmail.com> Link: https://lore.kernel.org/r/20250227235623.1624-3-honyuenkwun@gmail.com Signed-off-by: Heiko Stuebner <heiko@sntech.de>
2025-03-12arm64: dts: rockchip: Enable HDMI0 audio output for Orange Pi 5/5BJimmy Hon1-0/+8
HDMI audio is available on the Orange Pi 5 HDMI0 TX port. Signed-off-by: Jimmy Hon <honyuenkwun@gmail.com> Link: https://lore.kernel.org/r/20250227235623.1624-2-honyuenkwun@gmail.com Signed-off-by: Heiko Stuebner <heiko@sntech.de>
2025-03-11arm64: dts: imx8qm-apalis: Remove compatible from SoM dtsiFrancesco Dolcini2-4/+0
The SoM cannot be used standalone, this compatible is invalid and it is always overwritten when this .dtsi file is included, remove it therefore. Signed-off-by: Francesco Dolcini <francesco.dolcini@toradex.com> Signed-off-by: Shawn Guo <shawnguo@kernel.org>
2025-03-11arm64: dts: imx8mp: change AUDIO_AXI_CLK_ROOT freq. to 800MHzLaurentiu Mihalcea1-1/+1
AUDIO_AXI_CLK_ROOT can't run at currently requested 600MHz w/ its parent SYS_PLL1 configured at 800MHz. Configure it to run at 800MHz as some applications running on the DSP expect the core to run at this frequency anyways. This change also affects the AUDIOMIX NoC. Fixes: b739681b3f8b ("arm64: dts: imx8mp: Fix SDMA2/3 clocks") Signed-off-by: Laurentiu Mihalcea <laurentiu.mihalcea@nxp.com> Reviewed-by: Iuliana Prodan <iuliana.prodan@nxp.com> Reviewed-by: Peng Fan <peng.fan@nxp.com> Signed-off-by: Shawn Guo <shawnguo@kernel.org>
2025-03-11arm64: dts: imx8mp: add AUDIO_AXI_CLK_ROOT to AUDIOMIX blockLaurentiu Mihalcea1-2/+3
Needed because the DSP and OCRAM_A components from AUDIOMIX are clocked by AUDIO_AXI_CLK_ROOT instead of AUDIO_AHB_CLK_ROOT. Fixes: b86c3afabb4f ("arm64: dts: imx8mp: Add SAI, SDMA, AudioMIX") Signed-off-by: Laurentiu Mihalcea <laurentiu.mihalcea@nxp.com> Reviewed-by: Iuliana Prodan <iuliana.prodan@nxp.com> Reviewed-by: Peng Fan <peng.fan@nxp.com> Signed-off-by: Shawn Guo <shawnguo@kernel.org>
2025-03-11arm64: dts: imx93: add ddr edac supportFrank Li1-0/+8
Add ddr edac support for imx93. Signed-off-by: Frank Li <Frank.Li@nxp.com> Signed-off-by: Shawn Guo <shawnguo@kernel.org>
2025-03-11arm64: dts: imx95: add ref clock for pcie nodesFrank Li1-4/+21
Add "ref" clock for i.MX95's pcie and fix below CHECK_DTBS warnings: arch/arm64/boot/dts/freescale/imx95-19x19-evk.dtb: pcie@4c300000: clock-names: ['pcie', 'pcie_bus', 'pcie_phy', 'pcie_aux'] is too short from schema $id: http://devicetree.org/schemas/pci/fsl,imx6q-pcie.yaml Signed-off-by: Frank Li <Frank.Li@nxp.com> Signed-off-by: Shawn Guo <shawnguo@kernel.org>
2025-03-11arm64: dts: mba8xx: Remove invalid property disable-gpioAlexander Stein1-1/+0
disable-gpio is an (old) downstream kernel property, which slipped into DT. Remove it. Fixes: c01a26b8897a ("arm64: dts: mba8xx: Add PCIe support") Signed-off-by: Alexander Stein <alexander.stein@ew.tq-group.com> Reviewed-by: Frank Li <Frank.Li@nxp.com> Signed-off-by: Shawn Guo <shawnguo@kernel.org>
2025-03-11arm64: dts: imx8qm-ss-hsio: Wire up DMA IRQ for PCIeAlexander Stein1-2/+3
IRQ mapping is already present. Add the missing DMA interrupt. This is similar to commit 9d9c56025e429 ("arm64: dts: imx8-ss-hsio: Wire up DMA IRQ for PCIe") Signed-off-by: Alexander Stein <alexander.stein@ew.tq-group.com> Reviewed-by: Frank Li <Frank.Li@nxp.com> Signed-off-by: Shawn Guo <shawnguo@kernel.org>
2025-03-11arm64: dts: im8mq-librem5: move dwc3 usb port under portsFrank Li2-22/+28
Move port@0 and port@1 under ports to fix below DTB_CHECK warnings. arch/arm64/boot/dts/freescale/imx8mq-librem5-devkit.dtb: usb@38100000: port@0:reg:0:0: 0 is less than the minimum of 1 from schema $id: http://devicetree.org/schemas/usb/snps,dwc3.yaml# arch/arm64/boot/dts/freescale/imx8mq-librem5-devkit.dtb: usb@38100000: Unevaluated properties are not allowed ('#address-cells', '#size-cells', 'dr_mode', 'phy-names', 'phys', 'port@0', 'port@1', 'snps,parkmode-disable-ss-quirk' were unexpected) from schema $id: http://devicetree.org/schemas/usb/snps,dwc3.yaml# Signed-off-by: Frank Li <Frank.Li@nxp.com> Acked-by: Rob Herring (Arm) <robh@kernel.org> Signed-off-by: Shawn Guo <shawnguo@kernel.org>
2025-03-11arm64: dts: mba8mx: change sound card model nameMarkus Niebel1-1/+1
The card name for ALSA is generated from the model name string and is limited to 16 characters. Use a shorter name to prevent cutting the name. Since nearly all starter kit mainboards for i.MX based SoM by TQ-Systems use the same codec with the same routing on board it is a good idea to use the same model name for the sound card. This allows sharing a default asound.conf in BSP over all the kits. Signed-off-by: Markus Niebel <Markus.Niebel@ew.tq-group.com> Signed-off-by: Alexander Stein <alexander.stein@ew.tq-group.com> Signed-off-by: Shawn Guo <shawnguo@kernel.org>
2025-03-11arm64: dts: imx8mp-tqma8mpql-mba8mpxl: change sound card model nameMarkus Niebel1-1/+1
The card name for ALSA is generated from the model name string and is limited to 16 characters. Use a shorter name to prevent cutting the name. Since nearly all starter kit mainboards for i.MX based SoM by TQ-Systems use the same codec with the same routing on board it is a good idea to use the same model name for the sound card. This allows sharing a default asound.conf in BSP over all the kits. Signed-off-by: Markus Niebel <Markus.Niebel@ew.tq-group.com> Signed-off-by: Alexander Stein <alexander.stein@ew.tq-group.com> Signed-off-by: Shawn Guo <shawnguo@kernel.org>
2025-03-11arm64: dts: s32g: add FlexCAN[0..3] support for s32g2 and s32g3Ciprian Marian Costea4-0/+228
Add FlexCAN[0..3] for S32G2 and S32G3 SoCs. Signed-off-by: Ciprian Marian Costea <ciprianmarian.costea@oss.nxp.com> Signed-off-by: Shawn Guo <shawnguo@kernel.org>
2025-03-11arm64: dts: imx95: Add imx95-15x15-evk supportFrank Li2-0/+1131
Add imx95-15x15-evk support. Signed-off-by: Frank Li <Frank.Li@nxp.com> Signed-off-by: Shawn Guo <shawnguo@kernel.org>
2025-03-11arm64: dts: imx95: Add i3c1 and i3c2Frank Li1-0/+26
Add i3c1 and i3c2 support. Signed-off-by: Frank Li <Frank.Li@nxp.com> Reviewed-by: Daniel Baluta <daniel.baluta@nxp.com> Signed-off-by: Shawn Guo <shawnguo@kernel.org>
2025-03-11arm64: dts: imx95: Add #io-channel-cells = <1> for adc nodeFrank Li1-0/+1
Add #io-channel-cells = <1> for adc node. Signed-off-by: Frank Li <Frank.Li@nxp.com> Signed-off-by: Shawn Guo <shawnguo@kernel.org>
2025-03-11arm64: dts: imx8mp-skov: support new 7" panel boardAhmad Fatoum2-0/+82
This board is very similar to the already upstream imx8mp-skov-revb-mi1010ait-1cp1.dts with the difference that it uses a different 7" LVDS panel. Signed-off-by: Ahmad Fatoum <a.fatoum@pengutronix.de> Signed-off-by: Shawn Guo <shawnguo@kernel.org>
2025-03-11arm64: dts: imx8mp-skov: add revC BD500 boardAhmad Fatoum2-0/+92
The BD500 replaces the touch display with 3 bicolor LEDs and a push button on top of a Skov i.MX8-CPU revision C. Signed-off-by: Oleksij Rempel <o.rempel@pengutronix.de> Signed-off-by: Ahmad Fatoum <a.fatoum@pengutronix.de> Signed-off-by: Shawn Guo <shawnguo@kernel.org>
2025-03-11arm64: dts: imx8mp-skov: describe I2C bus recovery for all controllersAhmad Fatoum1-4/+44
I2C bus recovery can be used to recover when SCL/SDA are stuck low. To be able to use it, add the necessary GPIO and pinctrl entries. Signed-off-by: Ahmad Fatoum <a.fatoum@pengutronix.de> Signed-off-by: Shawn Guo <shawnguo@kernel.org>
2025-03-11arm64: dts: imx8mp-skov: move I2C2 pin control group into DTSIAhmad Fatoum2-11/+12
I2C2 is exposed on a pin header on the base board, so its pinmux is always the same if it's enabled. Therefore, move the definition to the common DTSI, so board DTs only need to override the status to enable it. Signed-off-by: Ahmad Fatoum <a.fatoum@pengutronix.de> Signed-off-by: Shawn Guo <shawnguo@kernel.org>
2025-03-11arm64: dts: imx8mp-skov: add basic board as fallbackOleksij Rempel2-0/+11
All Skov i.MX8MP boards share the same baseboard (modulo revisions) and are booted with the same bootloader image, which samples some strapping pins at startup and determines which kernel device tree to use. For use as bootloader device tree and as fallback, when no matching device tree has been found, add a basic variant that doesn't configure any variant-specific peripherals like displays. Signed-off-by: Oleksij Rempel <o.rempel@pengutronix.de> Signed-off-by: Ahmad Fatoum <a.fatoum@pengutronix.de> Signed-off-by: Shawn Guo <shawnguo@kernel.org>
2025-03-11arm64: dts: freescale: imx8mp-skov: operate SoC in nominal modeAhmad Fatoum1-2/+3
To reduce heat generation, the Skov i.MX8MP boards should run in nominal drive mode with a VDD_SOC voltage of 850 mV. At this operating point, not all frequencies that are achievable with overdrive mode are possible, so import imx8mp-nominal.dtsi to clock down the clocks. Signed-off-by: Ahmad Fatoum <a.fatoum@pengutronix.de> Reviewed-by: Peng Fan <peng.fan@nxp.com> Signed-off-by: Shawn Guo <shawnguo@kernel.org>
2025-03-11arm64: dts: freescale: imx8mp-skov: configure LDB clock automaticallyAhmad Fatoum1-14/+5
The comment in the DT mentions that "currently it is not possible to let display clocks configure automatically, so we need to set them manually". Since commit ff06ea04e4cf ("clk: imx: clk-imx8mp: Allow media_disp pixel clock reconfigure parent rate"), this is no longer the case. Make use of this new functionality by dropping the now unneeded assigned-clock-rates in &media_blk_ctrl. Signed-off-by: Ahmad Fatoum <a.fatoum@pengutronix.de> Acked-by: Peng Fan <peng.fan@nxp.com> Signed-off-by: Shawn Guo <shawnguo@kernel.org>
2025-03-11arm64: dts: imx8mp: add fsl,nominal-mode property into nominal.dtsiAhmad Fatoum1-0/+1
The imx8mp-nominal.dtsi is meant to be included into boards that want to override the default overdrive clock settings with settings suitable for running in nominal drive mode at its lower required voltage. Specifying fsl,operating-mode = "nominal" informs drivers of this fact, so they can sanity check runtime clock reconfiguration to observe the limits imposed by nominal mode. Signed-off-by: Ahmad Fatoum <a.fatoum@pengutronix.de> Reviewed-by: Peng Fan <peng.fan@nxp.com> Signed-off-by: Shawn Guo <shawnguo@kernel.org>
2025-03-11arm64: dts: imx8mp: Add optional nominal drive mode DTSIAhmad Fatoum1-0/+63
Unlike the i.MX8MM and i.MX8MN SoCs added earlier, the device tree for the i.MX8MP configures some clocks at frequencies that are only validated for overdrive mode, i.e. when VDD_SOC is 950 mV. Boards may want to run their SoC at the lower voltage of 850 mV though to reduce heat generation and power usage. For this to work, clock rates need to adhere to the limits of the nominal drive mode. Add an optional DTSI file which can be included by various boards to run in this mode. Reviewed-by: Peng Fan <peng.fan@nxp.com> Signed-off-by: Ahmad Fatoum <a.fatoum@pengutronix.de> Signed-off-by: Shawn Guo <shawnguo@kernel.org>
2025-03-11arm64: dts: imx8mp: configure GPU and NPU clocks to overdrive rateLucas Stach1-8/+8
A lot of other clocks on the i.MX8MP, including the DRAM set up by the bootloader are already running at overdrive clock rates. While this is a deviation from the configuration of other i.MX8M* family SoCs, overdrive is the default for most i.MX8MP boards and only some special purpose boards will choose to run the SoC at nominal drive rates. Up the GPU and NPU clock rates to their overdrive level to be consistent with other clocks set up in the dtsi. Signed-off-by: Lucas Stach <l.stach@pengutronix.de> Signed-off-by: Shawn Guo <shawnguo@kernel.org>
2025-03-11arm64: dts: freescale: ten64: add usb hub definitionMathew McBride1-0/+44
A device tree binding for the Microchip USB5744 hub controller was added in commit 02be19e914b8 ("dt-bindings: usb: Add support for Microchip usb5744 hub controller"). U-Boot will consume this binding in order to perform the necessary actions to enable the USB hub ports over I2C. (We previously used our own out-of-tree driver for this task) The Ten64 board does not have any switchable supplies for the voltage rails utilized by the USB5744, so a pair of dummy supplies have been added to facilitate operation with U-Boot's hub driver. Signed-off-by: Mathew McBride <matt@traverse.com.au> Signed-off-by: Shawn Guo <shawnguo@kernel.org>
2025-03-08arm64: dts: rockchip: slow down emmc freq for rock 5 itxJianfeng Liu1-2/+1
The current max-frequency 200000000 of emmc is not stable. When doing heavy write there will be I/O Error. After setting max-frequency to 150000000 the emmc is stable under write. Also remove property mmc-hs200-1_8v because we are already running at HS400 mode. Tested with fio command: fio -filename=./test_randread -direct=1 -iodepth 1 -thread \ -rw=randwrite -ioengine=psync -bs=16k -size=1G -numjobs=10 \ -runtime=600 -group_reporting -name=mytest Signed-off-by: Jianfeng Liu <liujianfeng1994@gmail.com> Link: https://lore.kernel.org/r/20250228143341.70244-1-liujianfeng1994@gmail.com Signed-off-by: Heiko Stuebner <heiko@sntech.de>
2025-03-08arm64: dts: rockchip: Add SPI NOR device on the ROCK 4DDetlev Casanova1-0/+16
The SPI NOR chip is connected on the FSPI0 core, so enable the sfc0 node and add the flash device to it. The SPI NOR won't work at higher speed than 50 MHz, specify the limit. Signed-off-by: Detlev Casanova <detlev.casanova@collabora.com> Link: https://lore.kernel.org/r/20250228145304.581349-3-detlev.casanova@collabora.com Signed-off-by: Heiko Stuebner <heiko@sntech.de>
2025-03-08arm64: dts: rockchip: Add SFC nodes for rk3576Detlev Casanova1-0/+22
The rk3576 SoC has 2 SFC cores that provide FSPI functions. Signed-off-by: Detlev Casanova <detlev.casanova@collabora.com> Link: https://lore.kernel.org/r/20250228145304.581349-2-detlev.casanova@collabora.com Signed-off-by: Heiko Stuebner <heiko@sntech.de>
2025-03-08arm64: dts: rockchip: Add maskrom button to Radxa E20CJonas Karlman1-0/+48
Radxa E20C has two buttons, one SARADC maskrom button and one GPIO user button. Add support for the maskrom button using a adc-keys node, also add the regulators used by SARADC controller. Signed-off-by: Jonas Karlman <jonas@kwiboo.se> Link: https://lore.kernel.org/r/20250304201642.831218-5-jonas@kwiboo.se Signed-off-by: Heiko Stuebner <heiko@sntech.de>
2025-03-08arm64: dts: rockchip: Add SARADC node for RK3528Jonas Karlman1-0/+13
Add a device tree node for the SARADC controller used by RK3528. Signed-off-by: Jonas Karlman <jonas@kwiboo.se> Link: https://lore.kernel.org/r/20250304201642.831218-4-jonas@kwiboo.se Signed-off-by: Heiko Stuebner <heiko@sntech.de>
2025-03-08arm64: dts: rockchip: Add user button to Radxa E20CJonas Karlman1-0/+20
Radxa E20C has two buttons, one SARADC maskrom button and one GPIO user button. Add support for the user button using a gpio-keys node. Signed-off-by: Jonas Karlman <jonas@kwiboo.se> Link: https://lore.kernel.org/r/20250304201642.831218-3-jonas@kwiboo.se Signed-off-by: Heiko Stuebner <heiko@sntech.de>
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