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2024-10-06arm64: dts: qcom: sc8180x: Affirm IDR0.CCTW on apps_smmuKonrad Dybcio1-1/+1
On RPMh-based SoCs, the APPS SMMU advertizes support for cache-coherent pagetable walk via the IDR0 register. This however is not respected by the arm-smmu driver unless dma-coherent is set. Mark the node as dma-coherent to ensure this (and other) implementations take this coherency into account. Signed-off-by: Konrad Dybcio <quic_kdybcio@quicinc.com> Tested-by: Steev Klimaszewski <steev@kali.org> # Thinkpad X13s (sc8280xp) Tested-by: Neil Armstrong <neil.armstrong@linaro.org> # on sdm845-rb3 Link: https://lore.kernel.org/r/20240919-topic-apps_smmu_coherent-v1-3-5b3a8662403d@quicinc.com Signed-off-by: Bjorn Andersson <andersson@kernel.org>
2024-10-06arm64: dts: qcom: sc7180: Affirm IDR0.CCTW on apps_smmuKonrad Dybcio1-0/+1
On RPMh-based SoCs, the APPS SMMU advertizes support for cache-coherent pagetable walk via the IDR0 register. This however is not respected by the arm-smmu driver unless dma-coherent is set. Mark the node as dma-coherent to ensure this (and other) implementations take this coherency into account. Signed-off-by: Konrad Dybcio <quic_kdybcio@quicinc.com> Tested-by: Douglas Anderson <dianders@chromium.org> Tested-by: Steev Klimaszewski <steev@kali.org> # Thinkpad X13s (sc8280xp) Tested-by: Neil Armstrong <neil.armstrong@linaro.org> # on sdm845-rb3 Link: https://lore.kernel.org/r/20240919-topic-apps_smmu_coherent-v1-2-5b3a8662403d@quicinc.com Signed-off-by: Bjorn Andersson <andersson@kernel.org>
2024-10-06arm64: dts: qcom: qdu1000: Affirm IDR0.CCTW on apps_smmuKonrad Dybcio1-0/+1
On RPMh-based SoCs, the APPS SMMU advertizes support for cache-coherent pagetable walk via the IDR0 register. This however is not respected by the arm-smmu driver unless dma-coherent is set. Mark the node as dma-coherent to ensure this (and other) implementations take this coherency into account. Signed-off-by: Konrad Dybcio <quic_kdybcio@quicinc.com> Tested-by: Steev Klimaszewski <steev@kali.org> # Thinkpad X13s (sc8280xp) Tested-by: Neil Armstrong <neil.armstrong@linaro.org> # on sdm845-rb3 Link: https://lore.kernel.org/r/20240919-topic-apps_smmu_coherent-v1-1-5b3a8662403d@quicinc.com Signed-off-by: Bjorn Andersson <andersson@kernel.org>
2024-10-06arm64: dts: qcom: qcs6490-rb3gen2: Add SD Card nodeSachin Gupta1-0/+33
Add SD Card node for Qualcomm qcs6490-rb3gen2 Board. Signed-off-by: Sachin Gupta <quic_sachgupt@quicinc.com> Reviewed-by: Dmitry Baryshkov <dmitry.baryshkov@linaro.org> Link: https://lore.kernel.org/r/20240919084826.1117-1-quic_sachgupt@quicinc.com Signed-off-by: Bjorn Andersson <andersson@kernel.org>
2024-10-06arm64: dts: qcom: sm8650-qrd: remove status property from dispcc device tree ↵Vladimir Zapolskiy1-4/+0
node After a change enabling display clock controller for all Qualcomm SM8650 powered board by default there is no more need to set a status property of dispcc on SM8650-QRD board. Signed-off-by: Vladimir Zapolskiy <vladimir.zapolskiy@linaro.org> Reviewed-by: Neil Armstrong <neil.armstrong@linaro.org> Link: https://lore.kernel.org/r/20240924100602.3813725-10-vladimir.zapolskiy@linaro.org Signed-off-by: Bjorn Andersson <andersson@kernel.org>
2024-10-06arm64: dts: qcom: sm8650-mtp: remove status property from dispcc device tree ↵Vladimir Zapolskiy1-4/+0
node After a change enabling display clock controller for all Qualcomm SM8650 powered board by default there is no more need to set a status property of dispcc on SM8650-MTP board. Signed-off-by: Vladimir Zapolskiy <vladimir.zapolskiy@linaro.org> Reviewed-by: Neil Armstrong <neil.armstrong@linaro.org> Link: https://lore.kernel.org/r/20240924100602.3813725-9-vladimir.zapolskiy@linaro.org Signed-off-by: Bjorn Andersson <andersson@kernel.org>
2024-10-06arm64: dts: qcom: sm8650-hdk: remove status property from dispcc device tree ↵Vladimir Zapolskiy1-4/+0
node After a change enabling display clock controller for all Qualcomm SM8650 powered board by default there is no more need to set a status property of dispcc on SM8650-HDK board. Signed-off-by: Vladimir Zapolskiy <vladimir.zapolskiy@linaro.org> Reviewed-by: Neil Armstrong <neil.armstrong@linaro.org> Link: https://lore.kernel.org/r/20240924100602.3813725-8-vladimir.zapolskiy@linaro.org Signed-off-by: Bjorn Andersson <andersson@kernel.org>
2024-10-06arm64: dts: qcom: sm8650: don't disable dispcc by defaultVladimir Zapolskiy1-2/+0
Enable display clock controller for all Qualcomm SM8650 powered boards by default. Signed-off-by: Vladimir Zapolskiy <vladimir.zapolskiy@linaro.org> Reviewed-by: Neil Armstrong <neil.armstrong@linaro.org> Link: https://lore.kernel.org/r/20240924100602.3813725-7-vladimir.zapolskiy@linaro.org Signed-off-by: Bjorn Andersson <andersson@kernel.org>
2024-10-06arm64: dts: qcom: sm8450-hdk: remove status property from dispcc device tree ↵Vladimir Zapolskiy1-4/+0
node After a change enabling display clock controller for all Qualcomm SM8450 powered board by default there is no more need to set a status property of dispcc on SM8450-HDK board. Signed-off-by: Vladimir Zapolskiy <vladimir.zapolskiy@linaro.org> Link: https://lore.kernel.org/r/20240924100602.3813725-6-vladimir.zapolskiy@linaro.org Signed-off-by: Bjorn Andersson <andersson@kernel.org>
2024-10-06arm64: dts: qcom: sm8450: don't disable dispcc by defaultVladimir Zapolskiy1-1/+0
Enable display clock controller for all Qualcomm SM8450 powered boards by default. Signed-off-by: Vladimir Zapolskiy <vladimir.zapolskiy@linaro.org> Link: https://lore.kernel.org/r/20240924100602.3813725-5-vladimir.zapolskiy@linaro.org Signed-off-by: Bjorn Andersson <andersson@kernel.org>
2024-10-06arm64: dts: qcom: sm8450-sony-xperia-nagara: disable dispcc on derived boardsVladimir Zapolskiy1-0/+4
A platform display clock controller is expected to be enabled by default for all boards, however in particular cases preset display clock setting is expected. To avoid any probable regression before enabling display clock controller for all SM8450 platforms disable it for SM8450 powered Sony Xperia phones. Signed-off-by: Vladimir Zapolskiy <vladimir.zapolskiy@linaro.org> Link: https://lore.kernel.org/r/20240924100602.3813725-4-vladimir.zapolskiy@linaro.org Signed-off-by: Bjorn Andersson <andersson@kernel.org>
2024-10-06arm64: dts: qcom: sm8450-qrd: explicitly disable dispcc on the boardVladimir Zapolskiy1-0/+4
A platform display clock controller is expected to be enabled by default for all boards, however in particular cases preset display clock setting is expected. To avoid any probable regression before enabling display clock controller for all SM8450 platforms disable it for SM8450-QRD board only. Signed-off-by: Vladimir Zapolskiy <vladimir.zapolskiy@linaro.org> Link: https://lore.kernel.org/r/20240924100602.3813725-3-vladimir.zapolskiy@linaro.org Signed-off-by: Bjorn Andersson <andersson@kernel.org>
2024-10-06arm64: dts: qcom: sm8350-hdk: remove a blank overwrite of dispcc node statusVladimir Zapolskiy1-4/+0
According to the description of dispcc device tree node from sm8350.dtsi there is no need to set a status property value to enable the display clock controller. Signed-off-by: Vladimir Zapolskiy <vladimir.zapolskiy@linaro.org> Link: https://lore.kernel.org/r/20240924100602.3813725-2-vladimir.zapolskiy@linaro.org Signed-off-by: Bjorn Andersson <andersson@kernel.org>
2024-10-06arm64: dts: qcom: msm8998: add HDMI nodesArnaud Vrac1-1/+99
Add HDMI controller and PHY nodes, ported from vendor code. Signed-off-by: Arnaud Vrac <avrac@freebox.fr> Reviewed-by: Dmitry Baryshkov <dmitry.baryshkov@linaro.org> Reviewed-by: Konrad Dybcio <konrad.dybcio@linaro.org> Signed-off-by: Marc Gonzalez <mgonzalez@freebox.fr> Link: https://lore.kernel.org/r/20240724-hdmi-tx-v7-6-e44a20553464@freebox.fr [bjorn: Updated commit message] Signed-off-by: Bjorn Andersson <andersson@kernel.org>
2024-10-03arm64: dts: qcom: msm8998: add HDMI GPIOsMarc Gonzalez1-0/+28
MSM8998 GPIO pin controller reference design defines: - CEC: pin 31 - DDC: pin 32,33 - HPD: pin 34 Downstream vendor code for reference: https://git.codelinaro.org/clo/la/kernel/msm-4.4/-/blob/caf_migration/kernel.lnx.4.4.r38-rel/arch/arm/boot/dts/qcom/msm8998-pinctrl.dtsi#L2324-2400 mdss_hdmi_{cec,ddc,hpd}_{active,suspend} Reviewed-by: Dmitry Baryshkov <dmitry.baryshkov@linaro.org> Signed-off-by: Marc Gonzalez <mgonzalez@freebox.fr> Link: https://lore.kernel.org/r/20240724-hdmi-tx-v7-5-e44a20553464@freebox.fr Signed-off-by: Bjorn Andersson <andersson@kernel.org>
2024-10-01arm64: dts: qcom: qcm6490-rb3gen2: enable WiFiDmitry Baryshkov1-0/+3
Enable WiFi device and specify the calibration variant name on the RB3gen2 device. Signed-off-by: Dmitry Baryshkov <dmitry.baryshkov@linaro.org> Link: https://lore.kernel.org/r/20240907-rb3g2-fixes-v1-4-eb9da98e9f80@linaro.org Signed-off-by: Bjorn Andersson <andersson@kernel.org>
2024-10-01arm64: dts: qcom: qcm6490-idp: enable WiFiDmitry Baryshkov1-0/+3
Enable WiFi device and specify the calibration variant name on the QCM6490 IDP device. Signed-off-by: Dmitry Baryshkov <dmitry.baryshkov@linaro.org> Link: https://lore.kernel.org/r/20240907-rb3g2-fixes-v1-3-eb9da98e9f80@linaro.org Signed-off-by: Bjorn Andersson <andersson@kernel.org>
2024-10-01arm64: dts: qcom: sc7280: don't enable GPU on unsupported devicesDmitry Baryshkov4-0/+22
On SC7280 and derivative platforms GPU by default requires a signed binary, a660_zap.mbn. Disable GPU by default and enable it only when the binary is actually available (QCM6490-IDP, RB3gen2). ChromeOS devices do not use TrustZone, so GPU can be enabled by default in sc7280-chrome-common.dtsi. FairPhone5 and SHIFTphone8 DTS already enable GPU (even though it wasn't required beforehand). Signed-off-by: Dmitry Baryshkov <dmitry.baryshkov@linaro.org> Reviewed-by: Konrad Dybcio <konradybcio@kernel.org> Link: https://lore.kernel.org/r/20240907-rb3g2-fixes-v1-2-eb9da98e9f80@linaro.org Signed-off-by: Bjorn Andersson <andersson@kernel.org>
2024-10-01arm64: dts: qcom: qcs6390-rb3gen2: use modem.mbn for modem DSPDmitry Baryshkov1-1/+1
Newer boards should always use squashed MBN firmware instead of split MDT+bNN. Use qcom/qcs6490/modem.mbn as the firmware for the modem on RB3gen2. Fixes: ac6d35b9b74c ("arm64: dts: qcom: qcs6490-rb3gen2: Enable various remoteprocs") Signed-off-by: Dmitry Baryshkov <dmitry.baryshkov@linaro.org> Reviewed-by: Konrad Dybcio <konradybcio@kernel.org> Link: https://lore.kernel.org/r/20240907-rb3g2-fixes-v1-1-eb9da98e9f80@linaro.org Signed-off-by: Bjorn Andersson <andersson@kernel.org>
2024-09-17Merge tag 'soc-dt-6.12' of git://git.kernel.org/pub/scm/linux/kernel/git/soc/socLinus Torvalds75-225/+6332
Pull SoC devicetree updates from Arnd Bergmann: "New SoC support for Broadcom bcm2712 (Raspberry Pi 5) and Renesas R9A09G057 (RZ/V2H(P)) and Qualcomm Snapdragon 414 (MSM8929), all three of these are variants of already supported chips, in particular the last one is almost identical to MSM8939. Lots of updates to Mediatek, ASpeed, Rockchips, Amlogic, Qualcomm, STM32, NXP i.MX, Sophgo, TI K3, Renesas, Microchip at91, NVIDIA Tegra, and T-HEAD. The added Qualcomm platform support once again dominates the changes, with seven phones and three laptops getting added in addition to many new features on existing machines. The Snapdragon X1E support specifically keeps improving. The other new machines are: - eight new machines using various 64-bit Rockchips SoCs, both on the consumer/gaming side and developer boards - three industrial boards with 64-bit i.MX, which is a very low number for them. - four more servers using a 32-bit Speed BMC - three boards using STM32MP1 SoCs - one new machine each using allwinner, amlogic, broadcom and renesas chips" * tag 'soc-dt-6.12' of git://git.kernel.org/pub/scm/linux/kernel/git/soc/soc: (672 commits) arm64: dts: allwinner: h5: NanoPi NEO Plus2: Use regulators for pio arm64: dts: mediatek: add audio support for mt8365-evk arm64: dts: mediatek: add afe support for mt8365 SoC arm64: dts: mediatek: mt8186-corsola: Disable DPI display interface arm64: dts: mediatek: mt8186: Add svs node arm64: dts: mediatek: mt8186: Add power domain for DPI arm64: dts: mediatek: mt8195: Correct clock order for dp_intf* arm64: dts: mt8183: add dpi node to mt8183 arm64: dts: allwinner: h5: NanoPi Neo Plus2: Fix regulators arm64: dts: rockchip: add CAN0 and CAN1 interfaces to mecsbc board arm64: dts: rockchip: add CAN-FD controller nodes to rk3568 arm64: dts: nuvoton: ma35d1: Add uart pinctrl settings arm64: dts: nuvoton: ma35d1: Add pinctrl and gpio nodes arm64: dts: nuvoton: Add syscon to the system-management node ARM: dts: Fix undocumented LM75 compatible nodes arm64: dts: toshiba: Fix pl011 and pl022 clocks ARM: dts: stm32: Use SAI to generate bit and frame clock on STM32MP15xx DHCOM PDK2 ARM: dts: stm32: Switch bitclock/frame-master to flag on STM32MP15xx DHCOM PDK2 ARM: dts: stm32: Sort properties in audio endpoints on STM32MP15xx DHCOM PDK2 ARM: dts: stm32: Add MECIO1 and MECT1S board variants ...
2024-09-04arm64: dts: qcom: msm8939: revert use of APCS mbox for RPMFabien Parent1-1/+1
Commit 22e4e43484c4 ("arm64: dts: qcom: msm8939: Use mboxes properties for APCS") broke the boot on msm8939 platforms. The issue comes from the SMD driver failing to request the mbox channel because of circular dependencies: 1. rpm -> apcs1_mbox -> rpmcc (RPM_SMD_XO_CLK_SRC) -> rpm. 2. rpm -> apcs1_mbox -> gcc -> rpmcc (RPM_SMD_XO_CLK_SRC) -> rpm 3. rpm -> apcs1_mbox -> apcs2 -> gcc -> rpmcc (RPM_SMD_XO_CLK_SRC) -> rpm To fix this issue let's switch back to using the deprecated qcom,ipc property for the RPM node. Fixes: 22e4e43484c4 ("arm64: dts: qcom: msm8939: Use mboxes properties for APCS") Signed-off-by: Fabien Parent <fabien.parent@linaro.org> Link: https://lore.kernel.org/r/20240904-msm8939-rpm-apcs-fix-v1-1-b608e7e48fe1@linaro.org Signed-off-by: Bjorn Andersson <andersson@kernel.org>
2024-08-31arm64: dts: qcom: x1e80100: Fix PHY for DP2Abel Vesa1-5/+5
The actual PHY used by MDSS DP2 is the USB SS2 QMP one. So switch to it instead. This is needed to get external DP support on boards like CRD where the 3rd Type-C USB port (right-hand side) is connected to DP2. Fixes: 1940c25eaa63 ("arm64: dts: qcom: x1e80100: Add display nodes") Signed-off-by: Abel Vesa <abel.vesa@linaro.org> Reviewed-by: Konrad Dybcio <konradybcio@kernel.org> Link: https://lore.kernel.org/r/20240829-x1e80100-dts-dp2-use-qmpphy-ss2-v1-1-9ba3dca61ccc@linaro.org Signed-off-by: Bjorn Andersson <andersson@kernel.org>
2024-08-31arm64: dts: qcom: qcm6490-idp: Add SD Card nodeSachin Gupta1-0/+33
Add SD Card node for Qualcomm qcm6490-idp Board. Signed-off-by: Sachin Gupta <quic_sachgupt@quicinc.com> Reviewed-by: Dmitry Baryshkov <dmitry.baryshkov@linaro.org> Reviewed-by: Caleb Connolly <caleb.connolly@linaro.org> Link: https://lore.kernel.org/r/20240829114748.9661-1-quic_sachgupt@quicinc.com Signed-off-by: Bjorn Andersson <andersson@kernel.org>
2024-08-31arm64: dts: qcom: x1e80100: Add orientation-switch to all USB+DP QMP PHYsAbel Vesa1-0/+6
All three USB SS combo QMP PHYs need to power off, deinit, then init and power on again on every plug in event. This is done by forwarding the orientation from the retimer/mux to the PHY. All is needed is the orientation-switch property in each such PHY devicetree node. So add them. Fixes: 4af46b7bd66f ("arm64: dts: qcom: x1e80100: Add USB nodes") Signed-off-by: Abel Vesa <abel.vesa@linaro.org> Reviewed-by: Konrad Dybcio <konradybcio@kernel.org> Link: https://lore.kernel.org/r/20240829-x1e80100-combo-qmpphys-add-orientation-switch-v1-1-5c61ea1794da@linaro.org Signed-off-by: Bjorn Andersson <andersson@kernel.org>
2024-08-31arm64: dts: qcom: Add X1E78100 ThinkPad T14s Gen 6Konrad Dybcio2-0/+808
Add support for the aforementioned laptop. That includes: - input methods, incl. lid switch (keyboard needs the pdc wakeup-parent removal hack..) - NVMe, WiFi - USB-C ports - GPU, display - DSPs Notably, the USB-A ports on the side are depenedent on the USB multiport controller making it upstream. At least one of the eDP panels used (non-touchscreen) identifies as BOE 0x0b66. See below for the hardware description from the OEM. Link: https://www.lenovo.com/us/en/p/laptops/thinkpad/thinkpadt/lenovo-thinkpad-t14s-gen-6-(14-inch-snapdragon)/len101t0099 Signed-off-by: Konrad Dybcio <konrad.dybcio@linaro.org> Link: https://lore.kernel.org/r/20240828-topic-t14s_upstream-v2-2-49faea18de84@quicinc.com Signed-off-by: Bjorn Andersson <andersson@kernel.org>
2024-08-31Revert "arm64: dts: qcom: msm8939-longcheer-l9100: Add rear flash"André Apitzsch1-26/+0
Patch "arm64: dts: qcom: msm8939-longcheer-l9100: Add rear flash" has been applied twice. This reverts the older version of the patch. Revert the commit f98bdb21cfc9 ("arm64: dts: qcom: msm8939-longcheer-l9100: Add rear flash") Fixes: f98bdb21cfc9 ("arm64: dts: qcom: msm8939-longcheer-l9100: Add rear flash") Signed-off-by: André Apitzsch <git@apitzsch.eu> Link: https://lore.kernel.org/r/20240830-revert_flash-v1-1-ad7057ea7e6e@apitzsch.eu Signed-off-by: Bjorn Andersson <andersson@kernel.org>
2024-08-26arm64: dts: qcom: Add support for X1-based Surface Laptop 7 devicesKonrad Dybcio4-0/+863
Add support for Surface Laptop 7 machines, based on X1E80100. The feature status is mostly on par with other X Elite machines, notably lacking: - USB-A and probably USB-over-Surface-connector (pending NXP retimer support) - SD card reader (Realtek RTS5261 connected over PCIe) - Touchscreen and touchpad support (hid-over-SPI [1]) - Audio (a quick look suggests the setup is very close to the one in X1E CRD) The two Surface Laptop 7 SKUs (13.8" and 15") only have very minor differences, amounting close to none on the software side. Even the MBN firmware files and ACPI tables are shared between the two machines. With that in mind, support is added for both, although only the larger one was physically tested. Display differences will be taken care of through fused-in EDID and other matters should be solved within the EC and boot firmware. [1] https://www.microsoft.com/en-us/download/details.aspx?id=103325 Signed-off-by: Konrad Dybcio <quic_kdybcio@quicinc.com> Link: https://lore.kernel.org/r/20240826-topic-sl7-v2-5-c32ebae78789@quicinc.com Signed-off-by: Bjorn Andersson <andersson@kernel.org>
2024-08-26arm64: dts: qcom: x1e80100: Add UART2Konrad Dybcio1-5/+65
GENI SE2 within QUP0 is used as UART on some devices, describe it. While at it, rewrite the adjacent UART21 pins node to make it more easily modifiable. Signed-off-by: Konrad Dybcio <quic_kdybcio@quicinc.com> Link: https://lore.kernel.org/r/20240826-topic-sl7-v2-4-c32ebae78789@quicinc.com Signed-off-by: Bjorn Andersson <andersson@kernel.org>
2024-08-26arm64: dts: qcom: x1e80100-pmics: Add PMC8380C PWMKonrad Dybcio1-0/+8
The PMC8380C (PM8550) has a PWM block, describe it. Signed-off-by: Konrad Dybcio <quic_kdybcio@quicinc.com> Link: https://lore.kernel.org/r/20240826-topic-sl7-v2-3-c32ebae78789@quicinc.com Signed-off-by: Bjorn Andersson <andersson@kernel.org>
2024-08-21arm64: dts: qcom: sm8150-mtp: drop incorrect amd,imageonKrzysztof Kozlowski1-5/+0
The SM8150 MTP board does not have magically different GPU than the SM8150, so it cannot use amd,imageon compatible, also pointed by dtbs_check: sm8150-mtp.dtb: gpu@2c00000: compatible: 'oneOf' conditional failed, one must be fixed: ['qcom,adreno-640.1', 'qcom,adreno', 'amd,imageon'] is too long 'qcom,adreno-640.1' does not match '^qcom,adreno-[0-9a-f]{8}$' 'qcom,adreno-640.1' does not match '^amd,imageon-200\\.[0-1]$' 'amd,imageon' was expected The incorrect amd,imageon compatible was added in commit f30ac26def18 ("arm64: dts: qcom: add sm8150 GPU nodes") to the SM8150 and later moved to the SM8150 MTP board in commit 1642ab96efa4 ("arm64: dts: qcom: sm8150: Don't start Adreno in headless mode") with an intention to allow headless mode. This should be solved via proper driver quirks, not fake compatibles. Signed-off-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org> Link: https://lore.kernel.org/r/20240821140116.436441-1-krzysztof.kozlowski@linaro.org Signed-off-by: Bjorn Andersson <andersson@kernel.org>
2024-08-21arm64: qcom: sa8775p: Add ADSP and CDSP0 fastrpc nodesLing Xu1-0/+218
Add ADSP and CDSP0 fastrpc nodes. Signed-off-by: Ling Xu <quic_lxu5@quicinc.com> Reviewed-by: Bartosz Golaszewski <bartosz.golaszewski@linaro.org> Link: https://lore.kernel.org/r/20240819045052.2405511-1-quic_lxu5@quicinc.com Signed-off-by: Bjorn Andersson <andersson@kernel.org>
2024-08-21arm64: dts: qcom: x1e80100: Add USB Multiport controllerKonrad Dybcio1-0/+170
X1E80100 has a multiport controller with 2 HS (eUSB) and 2 SS PHYs attached to it. It's commonly used for USB-A ports and internally routed devices. Configure it to support such functionality. Signed-off-by: Konrad Dybcio <konrad.dybcio@linaro.org> Link: https://lore.kernel.org/r/20240820-topic-h_mp-v2-2-d88518066372@quicinc.com Signed-off-by: Bjorn Andersson <andersson@kernel.org>
2024-08-16arm64: dts: qcom: sa8775p: fix the fastrpc labelBartosz Golaszewski1-1/+1
The fastrpc driver uses the label to determine the domain ID and create the device nodes. It should be "cdsp1" as this is the engine we use here. Fixes: df54dcb34ff2 ("arm64: dts: qcom: sa8775p: add ADSP, CDSP and GPDSP nodes") Reported-by: Ekansh Gupta <quic_ekangupt@quicinc.com> Signed-off-by: Bartosz Golaszewski <bartosz.golaszewski@linaro.org> Reviewed-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org> Link: https://lore.kernel.org/r/20240816102345.16481-2-brgl@bgdev.pl Signed-off-by: Bjorn Andersson <andersson@kernel.org>
2024-08-16arm64: dts: qcom: ipq5332: Add icc provider ability to gccVaradarajan Narayanan1-2/+5
IPQ SoCs dont involve RPM in managing NoC related clocks and there is no NoC scaling. Linux itself handles these clocks. However, these should not be exposed as just clocks and align with other Qualcomm SoCs that handle these clocks from a interconnect provider. Hence include icc provider capability to the gcc node so that peripherals can use the interconnect facility to enable these clocks. Change USB to use the icc-clk framework for the iface clock. Reviewed-by: Konrad Dybcio <konrad.dybcio@linaro.org> Signed-off-by: Varadarajan Narayanan <quic_varada@quicinc.com> Link: https://lore.kernel.org/r/20240730054817.1915652-6-quic_varada@quicinc.com Signed-off-by: Bjorn Andersson <andersson@kernel.org>
2024-08-16arm64: dts: qcom: sm8250: move lpass codec macros to use clks directlySrinivas Kandagatla1-27/+4
Move lpass codecs va and wsa macros to use the clks directly from AFE clock controller instead of going via gfm mux like other codec macros and SoCs. This makes it more align with the other SoCs and codec macros in this SoC which take AFE clocks directly. This will also avoid an extra clk mux layer, provides consistency and avoids the buggy mux driver which will be removed. This should also fix RB5 audio. Remove the gfm mux drivers for both audiocc and aoncc. Signed-off-by: Srinivas Kandagatla <srinivas.kandagatla@linaro.org> Link: https://lore.kernel.org/r/20240815170542.20754-1-srinivas.kandagatla@linaro.org Signed-off-by: Bjorn Andersson <andersson@kernel.org>
2024-08-16arm64: dts: qcom: msm8998: Add disabled support for LPASS iommu for Q6AngeloGioacchino Del Regno1-0/+27
Add support for the LPASS (Q6) SMMU and keep it disabled as this is used only when the audio DSP is present and used, which is not mandatory to have. It is expected for board-specific device-trees to enable this node if supported. Signed-off-by: AngeloGioacchino Del Regno <angelogioacchino.delregno@somainline.org> Signed-off-by: Marc Gonzalez <mgonzalez@freebox.fr> Link: https://lore.kernel.org/r/20240814-lpass-v1-3-a5bb8f9dfa8b@freebox.fr [bjorn: s/iface/bus in clock-names, to match binding] Signed-off-by: Bjorn Andersson <andersson@kernel.org>
2024-08-15arm64: dts: qcom: msm8976: Add restart nodeBarnabás Czémán1-0/+5
Add a pshold restart node what can be found in downstream for enable to perform restart operations. Signed-off-by: Barnabás Czémán <barnabas.czeman@mainlining.org> Link: https://lore.kernel.org/r/20240807-pshold-v1-1-0fa7927e99ce@mainlining.org Signed-off-by: Bjorn Andersson <andersson@kernel.org>
2024-08-15arm64: dts: qcom: sa8775p: add CPU idle statesBartosz Golaszewski1-0/+115
Add CPU idle-state nodes and power-domains to the .dtsi for SA8775P. Signed-off-by: Bartosz Golaszewski <bartosz.golaszewski@linaro.org> Link: https://lore.kernel.org/r/20240807-sa8775p-idle-states-v1-1-f2b5fcdfa0b0@linaro.org Signed-off-by: Bjorn Andersson <andersson@kernel.org>
2024-08-15arm64: dts: qcom: x1e80100-yoga: Update panel bindingsRob Clark1-2/+15
Use the correct panel compatible, and wire up enable-gpio. It is wired up in the same way as the x1e80100-crd. Signed-off-by: Rob Clark <robdclark@chromium.org> Reviewed-by: Abel Vesa <abel.vesa@linaro.org> Reviewed-by: Stephan Gerhold <stephan.gerhold@linaro.org> Link: https://lore.kernel.org/r/20240806202218.9060-1-robdclark@gmail.com Signed-off-by: Bjorn Andersson <andersson@kernel.org>
2024-08-15arm64: dts: qcom: msm8916-samsung-gt58: Enable the touchkeysNikita Travkin1-0/+1
The tablet has two capacitive buttons on the scren bezel. Enable them by adding the keycodes in the dt. Signed-off-by: Nikita Travkin <nikita@trvn.ru> Link: https://lore.kernel.org/r/20240806-msm8916-gt58-tkey-v1-1-8987b06c5921@trvn.ru Signed-off-by: Bjorn Andersson <andersson@kernel.org>
2024-08-15arm64: dts: qcom: sc8280xp-x13s: Enable RGB sensorBryan O'Donoghue1-0/+67
Enable the main RGB sensor on the Lenovo x13s a five megapixel 2 lane DPHY MIPI sensor connected to cisphy0. With the pm8008 patches recently applied to the x13s dtsi we can now also enable the RGB sensor. Once done we have all upstream support necessary for the RGB sensor on x13s. Reviewed-by: Vladimir Zapolskiy <vladimir.zapolskiy@linaro.org> Signed-off-by: Bryan O'Donoghue <bryan.odonoghue@linaro.org> Link: https://lore.kernel.org/r/20240806-b4-linux-next-24-07-31-camss-sc8280xp-lenovo-rgb-v2-v3-1-199767fb193d@linaro.org Signed-off-by: Bjorn Andersson <andersson@kernel.org>
2024-08-15arm64: dts: qcom: sa8775p-ride: enable remoteprocsBartosz Golaszewski1-0/+25
Enable all remoteproc nodes on the sa8775p-ride board and point to the appropriate firmware files. Reviewed-by: Dmitry Baryshkov <dmitry.baryshkov@linaro.org> Signed-off-by: Bartosz Golaszewski <bartosz.golaszewski@linaro.org> Link: https://lore.kernel.org/r/20240805-topic-sa8775p-iot-remoteproc-v4-6-86affdc72c04@linaro.org Signed-off-by: Bjorn Andersson <andersson@kernel.org>
2024-08-15arm64: dts: qcom: sa8775p: add ADSP, CDSP and GPDSP nodesTengfei Fan1-0/+548
Add nodes for remoteprocs: ADSP, CDSP0, CDSP1, GPDSP0 and GPDSP1 for SA8775p SoCs. Reviewed-by: Dmitry Baryshkov <dmitry.baryshkov@linaro.org> Signed-off-by: Tengfei Fan <quic_tengfan@quicinc.com> [Ling: added the fastrcp nodes] Co-developed-by: Ling Xu <quic_lxu5@quicinc.com> Signed-off-by: Ling Xu <quic_lxu5@quicinc.com> [Bartosz: ported to mainline] Co-developed-by: Bartosz Golaszewski <bartosz.golaszewski@linaro.org> Signed-off-by: Bartosz Golaszewski <bartosz.golaszewski@linaro.org> Link: https://lore.kernel.org/r/20240805-topic-sa8775p-iot-remoteproc-v4-5-86affdc72c04@linaro.org Signed-off-by: Bjorn Andersson <andersson@kernel.org>
2024-08-15arm64: dts: qcom: msm8916-samsung-j3ltetw: Add initial device treeLin, Meng-Bo3-0/+94
The dts and dtsi add support for msm8916 variant of Samsung Galaxy J3 SM-J320YZ smartphone released in 2016. Add a device tree for SM-J320YZ with initial support for: - GPIO keys - SDHCI (internal and external storage) - USB Device Mode - UART (on USB connector via the SM5703 MUIC) - WCNSS (WiFi/BT) - Regulators - QDSP6 audio - Speaker/earpiece/headphones/microphones via digital/analog codec in MSM8916/PM8916 - WWAN Internet via BAM-DMUX - Touchscreen - Accelerometer There are different variants of J3, with some differences in MUIC, sensor, NFC and touch key I2C buses. The common parts are shared in msm8916-samsung-j3-common.dtsi to reduce duplication. Signed-off-by: Lin, Meng-Bo <linmengbo06890@proton.me> Link: https://lore.kernel.org/r/20240804065854.42437-3-linmengbo06890@proton.me Signed-off-by: Bjorn Andersson <andersson@kernel.org>
2024-08-15arm64: dts: qcom: sm8350: add refgen regulatorDmitry Baryshkov1-0/+8
On SM8350 platform the DSI internally is using the refgen regulator. Add corresponding device node and link it as a supply to the DSI node. Signed-off-by: Dmitry Baryshkov <dmitry.baryshkov@linaro.org> Link: https://lore.kernel.org/r/20240804-sm8350-fixes-v1-10-1149dd8399fe@linaro.org Signed-off-by: Bjorn Andersson <andersson@kernel.org>
2024-08-15arm64: dts: qcom: sm8350: add MDSS registers interconnectDmitry Baryshkov1-2/+6
Aside from the MDSS<->MEM interconnect, display devices have separate interconnect for register access. Add this interconnect to the display node. Signed-off-by: Dmitry Baryshkov <dmitry.baryshkov@linaro.org> Link: https://lore.kernel.org/r/20240804-sm8350-fixes-v1-9-1149dd8399fe@linaro.org Signed-off-by: Bjorn Andersson <andersson@kernel.org>
2024-08-15arm64: dts: qcom: sm7125-xiaomi-common: Add reset-gpios for ufs_mem_hcDanila Tikhonov1-0/+2
The SC7180/SM7125 SoCs have a special pin for UFS reset. Generally, this pin is the same for all devices on the same SoC because it is hardcoded in the pinctrl driver. Therefore, it might seem appropriate to add this pin configuration in sc7180.dtsi. However, this pin is defined in the device-specific DTS files instead of the SoC-level DTS files in all Qualcomm DTS. To maintain consistency with this approach, we will follow the same style. Add reset-gpios to ufs_mem_hc. Signed-off-by: Danila Tikhonov <danila@jiaxyga.com> Link: https://lore.kernel.org/r/20240731182412.27966-1-danila@jiaxyga.com Signed-off-by: Bjorn Andersson <andersson@kernel.org>
2024-08-15arm64: dts: qcom: sa8775p: Add CPU and LLCC BWMONTengfei Fan1-0/+95
Add CPU and LLCC BWMON nodes and their corresponding opp tables for SA8775p SoC. SA8775p has two cpu clusters, with each cluster having a set of CPU-to-LLCC BWMON registers. Consequently, there are two sets of CPU-to-LLCC registers. Signed-off-by: Tengfei Fan <quic_tengfan@quicinc.com> Link: https://lore.kernel.org/r/20240730-add_sa8775p_bwmon-v1-2-f4f878da29ae@quicinc.com Signed-off-by: Bjorn Andersson <andersson@kernel.org>
2024-08-15arm64: dts: qcom: msm8939-longcheer-l9100: Add rear flashAndré Apitzsch1-0/+27
The phone has a Silergy SY7802 flash LED controller. Reviewed-by: Konrad Dybcio <konrad.dybcio@linaro.org> Signed-off-by: André Apitzsch <git@apitzsch.eu> Link: https://lore.kernel.org/r/20240729-sy7802-v6-1-86bb9083e40b@apitzsch.eu Signed-off-by: Bjorn Andersson <andersson@kernel.org>
2024-08-15arm64: dts: qcom: add generic compat string to RPM glink channelsDmitry Baryshkov15-15/+15
Add the generic qcom,smd-rpm / qcom,glink-smd-rpm compatible to RPM nodes to follow the schema. Signed-off-by: Dmitry Baryshkov <dmitry.baryshkov@linaro.org> Reviewed-by: Konrad Dybcio <konradybcio@kernel.org> Link: https://lore.kernel.org/r/20240729-fix-smd-rpm-v2-5-0776408a94c5@linaro.org Signed-off-by: Bjorn Andersson <andersson@kernel.org>
generated by cgit v1.2.3 (git 2.39.0) at 2025-09-29 00:20:13 +0300