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2020-09-17arm64: tegra: Add label properties for EEPROMsJon Hunter1-0/+1
Populate the label property for the AT24 EEPROMs on the various Jetson platforms. Note that the name 'module' is used to identify the EEPROM on the processor module board and the name 'system' is used to identify the EEPROM on the main base board (which is sometimes referred to as the carrier board). Signed-off-by: Jon Hunter <jonathanh@nvidia.com> Signed-off-by: Thierry Reding <treding@nvidia.com>
2020-08-27arm64: tegra: Use valid PWM period for VDD_GPU on Tegra210Thierry Reding1-1/+1
The PWM on Tegra210 can run at a maximum frequency of 48 MHz and cannot reach the minimum period is 5334 ns. The currently configured period of 4880 ns is not within the valid range, so set it to 8000 ns. This value was taken from the downstream DTS files and seems to work fine. Signed-off-by: Thierry Reding <treding@nvidia.com>
2020-07-15arm64: tegra: Use standard EEPROM propertiesThierry Reding1-2/+2
The address-bits and page-size properties that are currently used are not valid properties according to the bindings. Use the address-width and pagesize properties instead. Signed-off-by: Thierry Reding <treding@nvidia.com>
2020-07-13arm64: tegra: Remove simple regulators busThierry Reding1-13/+10
The standard way to do this is to list out the regulators at the top- level. Adopt the standard way to fix validation. Signed-off-by: Thierry Reding <treding@nvidia.com>
2020-07-13arm64: tegra: Remove simple clocks busThierry Reding1-11/+4
The standard way to do this is to list out the clocks at the top-level. Adopt the standard way to fix validation. Signed-off-by: Thierry Reding <treding@nvidia.com>
2020-06-23arm64: tegra: Rename sdhci nodes to mmcThierry Reding1-1/+1
The new json-schema based validation tools require SD/MMC controller nodes to be named mmc. Rename all references to them. Signed-off-by: Thierry Reding <treding@nvidia.com>
2020-06-23arm64: tegra: Add unit-address to memory nodeThierry Reding1-1/+1
The memory node requires a unit-address. For some boards the bootloader, which is usually locked down, uses a hard-coded name for the memory node without a unit-address, so we can't fix it on those boards. Signed-off-by: Thierry Reding <treding@nvidia.com>
2020-05-22arm64: tegra: Make the RTC a wakeup source on Jetson Nano and TX1Jon Hunter1-1/+2
The RTC found on the MAX77620 PMIC can be used as a wakeup source on Jetson Nano and TX1, which is useful to wake the system from suspend at a given time. Signed-off-by: Jon Hunter <jonathanh@nvidia.com> Signed-off-by: Thierry Reding <treding@nvidia.com>
2020-03-12arm64: tegra: Add EEPROM suppliesJon Hunter1-0/+1
The following warning is observed on Jetson TX1, Jetson Nano and Jetson TX2 platforms because the supply regulators are not specified for the EEPROMs. WARNING KERN at24 0-0050: 0-0050 supply vcc not found, using dummy regulator WARNING KERN at24 0-0057: 0-0057 supply vcc not found, using dummy regulator For both of these platforms the EEPROM is powered by the main 1.8V supply rail and so populate the supply for these devices to fix these warnings. Signed-off-by: Jon Hunter <jonathanh@nvidia.com> Signed-off-by: Thierry Reding <treding@nvidia.com>
2020-03-12arm64: tegra: Enable I2C controller for EEPROMJon Hunter1-0/+2
Commit a5b6b67364cb ("arm64: tegra: Add ID EEPROM for Jetson TX1 module") populated the EEPROM on the Jetson TX1 module, but did not enable the corresponding I2C controller. Enable the I2C controller so that this EEPROM can be accessed. Fixes: a5b6b67364cb ("arm64: tegra: Add ID EEPROM for Jetson TX1 module") Signed-off-by: Jon Hunter <jonathanh@nvidia.com> Signed-off-by: Thierry Reding <treding@nvidia.com>
2019-10-29arm64: tegra: Add Jetson TX1 SC7 timingsSowjanya Komatineni1-0/+7
Add platform specific SC7 timing configuration to the Jetson TX1 device tree. Signed-off-by: Sowjanya Komatineni <skomatineni@nvidia.com> Signed-off-by: Thierry Reding <treding@nvidia.com>
2019-06-20arm64: tegra: Update Jetson TX1 GPU regulator timingsJon Hunter1-1/+2
The GPU regulator enable ramp delay for Jetson TX1 is set to 1ms which not sufficient because the enable ramp delay has been measured to be greater than 1ms. Furthermore, the downstream kernels released by NVIDIA for Jetson TX1 are using a enable ramp delay 2ms and a settling delay of 160us. Update the GPU regulator enable ramp delay for Jetson TX1 to be 2ms and add a settling delay of 160us. Cc: stable@vger.kernel.org Signed-off-by: Jon Hunter <jonathanh@nvidia.com> Fixes: 5e6b9a89afce ("arm64: tegra: Add VDD_GPU regulator to Jetson TX1") Signed-off-by: Thierry Reding <treding@nvidia.com>
2019-06-19arm64: tegra: Add ID EEPROM for Jetson TX1 moduleThierry Reding1-0/+13
There is an ID EEPROM in the Jetson TX1 module that stores various bits of information to indentify the module. Add the device tree node so that operating systems can access this EEPROM. Acked-by: Jon Hunter <jonathanh@nvidia.com> Signed-off-by: Thierry Reding <treding@nvidia.com>
2019-04-12arm64: tegra: Enable CPU idle support for Jetson TX1Joseph Lo1-0/+6
Enable CPU idle support for Jetson TX1 platform. Signed-off-by: Joseph Lo <josephl@nvidia.com> Acked-by: Jon Hunter <jonathanh@nvidia.com> Signed-off-by: Thierry Reding <treding@nvidia.com>
2018-08-27arm64: dts: tegra210-p2180: Correct sdmmc4 vqmmc-supplyAapo Vienamo1-0/+1
On p2180 sdmmc4 is powered from a fixed 1.8 V regulator. Signed-off-by: Aapo Vienamo <avienamo@nvidia.com> Reviewed-by: Mikko Perttunen <mperttunen@nvidia.com> Signed-off-by: Thierry Reding <treding@nvidia.com>
2018-08-27arm64: dts: tegra210-p2180: Allow ldo2 to go down to 1.8 VAapo Vienamo1-10/+1
Set regulator-min-microvolt property of ldo2 to 1.8 V in tegra210-p2180.dtsi. ldo2 is used by the sdmmc1 SDHCI controller and its voltage needs to be adjusted down to 1.8 V to support faster signaling modes. It appears that the comment about the SDHCI driver requesting invalid voltages no longer applies. Signed-off-by: Aapo Vienamo <avienamo@nvidia.com> Reviewed-by: Mikko Perttunen <mperttunen@nvidia.com> Signed-off-by: Thierry Reding <treding@nvidia.com>
2017-12-13arm64: tegra: Add CPU and PSCI nodes for NVIDIA Tegra210 platformsJon Hunter1-0/+23
Add the CPU and PSCI nodes for the NVIDIA Tegra210 platforms so that all CPUs can be enabled on boot. This assumes that the PSCI firmware has been loaded during the initial bootstrap on the device before the kernel starts (which is typically the case for these platforms). The PSCI firmware version is set to v0.2 which aligns with the current shipping version for Tegra. Reported-by: Martin Michlmayr <tbm@cyrius.com> Signed-off-by: Jon Hunter <jonathanh@nvidia.com> Tested-By: Vagrant Cascadian <vagrant@debian.org> Signed-off-by: Thierry Reding <treding@nvidia.com>
2017-11-02License cleanup: add SPDX GPL-2.0 license identifier to files with no licenseGreg Kroah-Hartman1-0/+1
Many source files in the tree are missing licensing information, which makes it harder for compliance tools to determine the correct license. By default all files without license information are under the default license of the kernel, which is GPL version 2. Update the files which contain no license information with the 'GPL-2.0' SPDX license identifier. The SPDX identifier is a legally binding shorthand, which can be used instead of the full boiler plate text. This patch is based on work done by Thomas Gleixner and Kate Stewart and Philippe Ombredanne. How this work was done: Patches were generated and checked against linux-4.14-rc6 for a subset of the use cases: - file had no licensing information it it. - file was a */uapi/* one with no licensing information in it, - file was a */uapi/* one with existing licensing information, Further patches will be generated in subsequent months to fix up cases where non-standard license headers were used, and references to license had to be inferred by heuristics based on keywords. The analysis to determine which SPDX License Identifier to be applied to a file was done in a spreadsheet of side by side results from of the output of two independent scanners (ScanCode & Windriver) producing SPDX tag:value files created by Philippe Ombredanne. Philippe prepared the base worksheet, and did an initial spot review of a few 1000 files. The 4.13 kernel was the starting point of the analysis with 60,537 files assessed. Kate Stewart did a file by file comparison of the scanner results in the spreadsheet to determine which SPDX license identifier(s) to be applied to the file. She confirmed any determination that was not immediately clear with lawyers working with the Linux Foundation. Criteria used to select files for SPDX license identifier tagging was: - Files considered eligible had to be source code files. - Make and config files were included as candidates if they contained >5 lines of source - File already had some variant of a license header in it (even if <5 lines). All documentation files were explicitly excluded. The following heuristics were used to determine which SPDX license identifiers to apply. - when both scanners couldn't find any license traces, file was considered to have no license information in it, and the top level COPYING file license applied. For non */uapi/* files that summary was: SPDX license identifier # files ---------------------------------------------------|------- GPL-2.0 11139 and resulted in the first patch in this series. If that file was a */uapi/* path one, it was "GPL-2.0 WITH Linux-syscall-note" otherwise it was "GPL-2.0". Results of that was: SPDX license identifier # files ---------------------------------------------------|------- GPL-2.0 WITH Linux-syscall-note 930 and resulted in the second patch in this series. - if a file had some form of licensing information in it, and was one of the */uapi/* ones, it was denoted with the Linux-syscall-note if any GPL family license was found in the file or had no licensing in it (per prior point). Results summary: SPDX license identifier # files ---------------------------------------------------|------ GPL-2.0 WITH Linux-syscall-note 270 GPL-2.0+ WITH Linux-syscall-note 169 ((GPL-2.0 WITH Linux-syscall-note) OR BSD-2-Clause) 21 ((GPL-2.0 WITH Linux-syscall-note) OR BSD-3-Clause) 17 LGPL-2.1+ WITH Linux-syscall-note 15 GPL-1.0+ WITH Linux-syscall-note 14 ((GPL-2.0+ WITH Linux-syscall-note) OR BSD-3-Clause) 5 LGPL-2.0+ WITH Linux-syscall-note 4 LGPL-2.1 WITH Linux-syscall-note 3 ((GPL-2.0 WITH Linux-syscall-note) OR MIT) 3 ((GPL-2.0 WITH Linux-syscall-note) AND MIT) 1 and that resulted in the third patch in this series. - when the two scanners agreed on the detected license(s), that became the concluded license(s). - when there was disagreement between the two scanners (one detected a license but the other didn't, or they both detected different licenses) a manual inspection of the file occurred. - In most cases a manual inspection of the information in the file resulted in a clear resolution of the license that should apply (and which scanner probably needed to revisit its heuristics). - When it was not immediately clear, the license identifier was confirmed with lawyers working with the Linux Foundation. - If there was any question as to the appropriate license identifier, the file was flagged for further research and to be revisited later in time. In total, over 70 hours of logged manual review was done on the spreadsheet to determine the SPDX license identifiers to apply to the source files by Kate, Philippe, Thomas and, in some cases, confirmation by lawyers working with the Linux Foundation. Kate also obtained a third independent scan of the 4.13 code base from FOSSology, and compared selected files where the other two scanners disagreed against that SPDX file, to see if there was new insights. The Windriver scanner is based on an older version of FOSSology in part, so they are related. Thomas did random spot checks in about 500 files from the spreadsheets for the uapi headers and agreed with SPDX license identifier in the files he inspected. For the non-uapi files Thomas did random spot checks in about 15000 files. In initial set of patches against 4.14-rc6, 3 files were found to have copy/paste license identifier errors, and have been fixed to reflect the correct identifier. Additionally Philippe spent 10 hours this week doing a detailed manual inspection and review of the 12,461 patched files from the initial patch version early this week with: - a full scancode scan run, collecting the matched texts, detected license ids and scores - reviewing anything where there was a license detected (about 500+ files) to ensure that the applied SPDX license was correct - reviewing anything where there was no detection but the patch license was not GPL-2.0 WITH Linux-syscall-note to ensure that the applied SPDX license was correct This produced a worksheet with 20 files needing minor correction. This worksheet was then exported into 3 different .csv files for the different types of files to be modified. These .csv files were then reviewed by Greg. Thomas wrote a script to parse the csv files and add the proper SPDX tag to the file, in the format that the file expected. This script was further refined by Greg based on the output to detect more types of files automatically and to distinguish between header and source .c files (which need different comment types.) Finally Greg ran the script using the .csv files to generate the patches. Reviewed-by: Kate Stewart <kstewart@linuxfoundation.org> Reviewed-by: Philippe Ombredanne <pombredanne@nexb.com> Reviewed-by: Thomas Gleixner <tglx@linutronix.de> Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
2016-12-08arm64: tegra: Add VDD_GPU regulator to Jetson TX1Alexandre Courbot1-0/+18
Add the VDD_GPU regulator (a GPIO-enabled PWM regulator) to the Jetson TX1 board. This addition allows the GPU to be used provided the bootloader properly enabled the GPU node. Signed-off-by: Alexandre Courbot <acourbot@nvidia.com> Signed-off-by: Thierry Reding <treding@nvidia.com> [as pointed out by Thierry on IRC, nobody has reported a bug in the field, but using a new bootloader with a .dtb that has the incorrect data, it will crash on boot] Fixes: 336f79c7b6d7 ("arm64: tegra: Add NVIDIA Jetson TX1 Developer Kit support") Cc: stable@vger.kernel.org #v4.5+ Signed-off-by: Arnd Bergmann <arnd@arndb.de>
2016-07-14arm64: tegra: Enable debug serial on Jetson TX1Thierry Reding1-0/+4
Add a chosen node to the device tree that contains a stdout-path property which defines the debug serial port. Signed-off-by: Thierry Reding <treding@nvidia.com>
2016-07-14arm64: tegra: Add PMIC support on Jetson TX1Thierry Reding1-0/+245
Add a device tree node for the MAX77620 PMIC found on the p2180 processor module (Jetson TX1). Also add supporting power supplies, such as the main 5 V system supply. Signed-off-by: Thierry Reding <treding@nvidia.com>
2016-04-11arm64: tegra: Remove 0, prefix from unit-addressesThierry Reding1-4/+4
When Tegra124 support was first merged the unit-addresses of all devices were listed with a "0," prefix to encode the reg property's second cell. It turns out that this notation is not correct, and the "," separator is only used to separate fields in the unit address (such as the device and function number in PCI devices), not individual cells for addresses with more than one cell. Signed-off-by: Thierry Reding <treding@nvidia.com>
2015-11-24arm64: tegra: Add NVIDIA Jetson TX1 supportThierry Reding1-0/+45
The NVIDIA Jetson TX1 is a processor module that features a Tegra210 SoC with 4 GiB of LPDDR4 RAM attached, a 32 GiB eMMC and other essentials. It is typically connected to some I/O board (such as the P2597) that has the connectors needed to hook it up to the outside world. Signed-off-by: Thierry Reding <treding@nvidia.com>