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2022-06-14arm64: dts: imx8mp-evk: add regulator supply to CPU nodesLucas Stach1-1/+17
This supply is used by cpufreq to scale the voltage applied to the ARM voltage domain of the SoC when switching between the different operating points. Signed-off-by: Lucas Stach <l.stach@pengutronix.de> Signed-off-by: Shawn Guo <shawnguo@kernel.org>
2022-06-14arm64: dts: imx8mm: Add SNVS LPGPRMarek Vasut1-0/+5
Add SNVS LPGPR bindings to MX8M Mini, the LPGPR is used to store boot counter. Signed-off-by: Marek Vasut <marex@denx.de> Cc: Fabio Estevam <festevam@denx.de> Cc: Marcel Ziswiler <marcel.ziswiler@toradex.com> Cc: Peng Fan <peng.fan@nxp.com> Cc: Rob Herring <robh+dt@kernel.org> Cc: Shawn Guo <shawnguo@kernel.org> Cc: NXP Linux Team <linux-imx@nxp.com> Cc: devicetree@vger.kernel.org To: linux-arm-kernel@lists.infradead.org Signed-off-by: Shawn Guo <shawnguo@kernel.org>
2022-06-14arm64: dts: fsl: ls1012a: fix Micron SPI NOR compatibleKrzysztof Kozlowski1-1/+1
The proper compatible for Micron n25q128a11 SPI NOR flash should include vendor-prefix. Signed-off-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org> Signed-off-by: Shawn Guo <shawnguo@kernel.org>
2022-06-10arm64: dts: imx8ulp: address build warningPeng Fan1-3/+3
Fix warnings such as: Warning (simple_bus_reg): /soc@0/gpio@2e200000: simple-bus unit address format error, expected "2e200080" Signed-off-by: Peng Fan <peng.fan@nxp.com> Signed-off-by: Shawn Guo <shawnguo@kernel.org>
2022-06-10arm64: dts: freescale: add i.MX93 11x11 EVK basic supportPeng Fan2-0/+115
Enable lpuart & SDHC for console and rootfs Reviewed-by: Dong Aisheng <aisheng.dong@nxp.com> Signed-off-by: Peng Fan <peng.fan@nxp.com> Signed-off-by: Shawn Guo <shawnguo@kernel.org>
2022-06-10arm64: dts: freescale: Add i.MX93 dtsi supportPeng Fan2-0/+957
The i.MX 93 applications processors are the first in the i.MX portfolio to integrate the scalable Arm Cortex-A55 core, bringing performance and energy efficiency to Linux-based edge applications and the Arm Ethos-U65 microNPU, enabling developers to create more capable, cost-effective and energy-efficient ML applications. Add the basic dtsi support for i.MX93. Reviewed-by: Dong Aisheng <aisheng.dong@nxp.com> Acked-by: Rob Herring <robh@kernel.org> Signed-off-by: Peng Fan <peng.fan@nxp.com> Signed-off-by: Shawn Guo <shawnguo@kernel.org>
2022-06-07arm64: s32g2: Pass unit name to soc nodeFabio Estevam1-1/+1
Pass unit name to soc node to fix the following W=1 build warning: arch/arm64/boot/dts/freescale/s32g2.dtsi:82.6-123.4: Warning (unit_address_vs_reg): /soc: node has a reg or ranges property, but no unit name Signed-off-by: Fabio Estevam <festevam@denx.de> Reviewed-by: Chester Lin <clin@suse.com> Signed-off-by: Chester Lin <clin@suse.com> Link: https://lore.kernel.org/r/20220514143505.1554813-1-festevam@gmail.com
2022-05-26Merge tag 'arm-dt-5.19' of git://git.kernel.org/pub/scm/linux/kernel/git/soc/socLinus Torvalds58-314/+5355
Pull ARM DT updates from Arnd Bergmann: "There are 40 branches this time, adding a lot of new hardware support, and cleanups. Krzysztof Kozlowski continues his treewide cleanups. There are a number of new SoCs, all of them as part of existing families, and typically added along with a reference board: - Renesas RZ/G2UL (R9A07G043) is the single-core version of the RZ/G2L general-purpose MPU. - Renesas RZ/V2M (R9A09G011) is a smart camera SoC - Renesas R-Car V4H (R8A779G0) is an automotive chip with Cortex-A76 cores and deep learning accerlation. - Broadcom BCM47622 is a new broadband SoC based on a quad Cortex-A7 and dual Wifi-6. - Corstone1000 is a generic platform from Arm that is used for designing custom SoCs, the support for now is for the Fixed Virtual Platform emulation for it. - Mediatek MT8195 (Kompanio 1200) is a high-end consumer chip used in upcoming Chromebooks. - NXP i.MXRT1050 is a Cortex-M7 based microcontroller, the first MMU-less SoC to be added in a while New machines based on already supported SoCs this time are mainly for 32-bit platforms and include: - Two wireless routers based on Broadcom bcm4708 - 30 new boards based on NXP i.MX6, i.MX7 and i.MX8 families, mostly for the industrial embedded market, and on NXP LS1021A based IOT board. - Two ethernet switches based on Microchip LAN966 - Eight Qualcomm Snapdragon based machines, including a smartwatch, a Chromebook board and some phones - Another phone based on the old ST-Ericsson Ux500 platform - Seven STM32MP1 based boards - Four single-board computers based on Rockchip RK3566/RK3568" * tag 'arm-dt-5.19' of git://git.kernel.org/pub/scm/linux/kernel/git/soc/soc: (791 commits) ARM: dts: kswitch-d10: enable networking ARM: dts: lan966x: add switch node ARM: dts: lan966x: add serdes node ARM: dts: lan966x: add reset switch reset node ARM: dts: lan966x: add MIIM nodes ARM: dts: lan966x: add hwmon node ARM: dts: lan966x: add basic Kontron KSwitch D10 support ARM: dts: lan966x: add flexcom I2C nodes ARM: dts: lan966x: add flexcom SPI nodes ARM: dts: lan966x: add all flexcom usart nodes ARM: dts: lan966x: add missing uart DMA channel ARM: dts: lan966x: add sgpio node ARM: dts: lan966x: swap dma channels for crypto node ARM: dts: lan966x: rename pinctrl nodes ARM: dts: at91: sama7g5: remove interrupt-parent from gic node ARM: dts: at91: use generic node name for dataflash ARM: dts: turris-omnia: Add atsha204a node arm64: dts: mt8192: Follow binding order for SCP registers arm64: dts: mediatek: add mtk-snfi for mt7622 arm64: dts: mediatek: mt8195-demo: enable uart1 ...
2022-05-05arm64: dt: imx8mp: support pwm polarity inversionMarkus Niebel1-4/+4
The i.MX8M Plus has the same PWM IP as i.MX6 / i.MX7. This IP and the driver supporting pwm polarity inversion. Switch CPU device tree fragment to use 3 pwm-cells. Tested on MBa8MPxL mainboard. Signed-off-by: Markus Niebel <Markus.Niebel@ew.tq-group.com> Signed-off-by: Alexander Stein <alexander.stein@ew.tq-group.com> Signed-off-by: Shawn Guo <shawnguo@kernel.org>
2022-05-05arm64: dt: imx8mn: support pwm polarity inversionMarkus Niebel1-4/+4
The i.MX8M Nano has the same PWM IP as i.MX6 / i.MX7. This IP and the driver supporting pwm polarity inversion. Switch CPU device tree fragment to use 3 pwm-cells. Signed-off-by: Markus Niebel <Markus.Niebel@ew.tq-group.com> Signed-off-by: Alexander Stein <alexander.stein@ew.tq-group.com> Signed-off-by: Shawn Guo <shawnguo@kernel.org>
2022-05-05arm64: dt: imx8mm: support pwm polarity inversionMarkus Niebel3-6/+6
The i.MX8M Mini has the same PWM IP as i.MX6 / i.MX7. This IP and the driver supporting pwm polarity inversion. Switch CPU device tree fragment to use 3 pwm-cells and correct board device trees. Signed-off-by: Markus Niebel <Markus.Niebel@ew.tq-group.com> Signed-off-by: Alexander Stein <alexander.stein@ew.tq-group.com> Signed-off-by: Shawn Guo <shawnguo@kernel.org>
2022-05-05arm64: dt: imx8mq: support pwm polarity inversionMarkus Niebel3-6/+6
The i.MX8MQ has the same PWM IP as i.MX6 / i.MX7. This IP and the driver supporting pwm polarity inversion. Switch CPU device tree fragment to use 3 pwm-cells and correct board device trees. Signed-off-by: Markus Niebel <Markus.Niebel@ew.tq-group.com> Signed-off-by: Alexander Stein <alexander.stein@ew.tq-group.com> Signed-off-by: Shawn Guo <shawnguo@kernel.org>
2022-05-05arm64: dts: imx8mm-venice-gw7901: remove unnecessary cpu temp overrideTim Harvey1-12/+0
Remove the unnecessary cpu_alert0 and cpu_crit0 TMU node overrides as these are added dynamically by boot firmware based on CPU temperature grade. Signed-off-by: Tim Harvey <tharvey@gateworks.com> Signed-off-by: Shawn Guo <shawnguo@kernel.org>
2022-05-05arm64: dts: imx8mm-venice-gw7902: add vdd_5p0 ADC channelTim Harvey2-0/+14
Add missing vdd_5p0 ADC channel for the GW7902 boards. Signed-off-by: Tim Harvey <tharvey@gateworks.com> Signed-off-by: Shawn Guo <shawnguo@kernel.org>
2022-05-05arm64: dts: imx8m*venice: add missing clock-names to pcie_phyTim Harvey5-0/+5
Define the missing clock-names property for the pcie_phy required by the fsl,imx8-pcie-phy dt bindings. Signed-off-by: Tim Harvey <tharvey@gateworks.com> Signed-off-by: Shawn Guo <shawnguo@kernel.org>
2022-05-05arm64: dts: imx8mm-venice-gw7902: fix pcie bindingsTim Harvey1-3/+4
Update the pcie bindings to the correct dt bindings: pcie_phy: - use pcie0_refclk - add required clock-names pcie: - remove pcie_phy clock as it comes from phy driver Signed-off-by: Tim Harvey <tharvey@gateworks.com> Reviewed-by: Fabio Estevam <festevam@gmail.com> Signed-off-by: Shawn Guo <shawnguo@kernel.org>
2022-05-05arm64: dts: freescale: reduce the interrup-map-maskMichael Walle5-5/+5
Reduce the interrupt-map-mask of the external interrupt controller to 0xf to align with the devicetree schema. Signed-off-by: Michael Walle <michael@walle.cc> Signed-off-by: Shawn Guo <shawnguo@kernel.org>
2022-05-05arm64: dts: imx8mn-beacon: Enable RTS-CTS on UART3Adam Ford1-0/+3
There is a header for a DB9 serial port, but any attempts to use hardware handshaking fail. Enable RTS and CTS pin muxing and enable handshaking in the uart node. Signed-off-by: Adam Ford <aford173@gmail.com> Signed-off-by: Shawn Guo <shawnguo@kernel.org>
2022-05-05arm64: dts: imx8mm-beacon: Enable RTS-CTS on UART3Adam Ford1-0/+3
There is a header for a DB9 serial port, but any attempts to use hardware handshaking fail. Enable RTS and CTS pin muxing and enable handshaking in the uart node. Signed-off-by: Adam Ford <aford173@gmail.com> Signed-off-by: Shawn Guo <shawnguo@kernel.org>
2022-05-05arm64: dts: imx8mm: Use 100 kHz I2C2 on Data Modul i.MX8M Mini eDM SBCMarek Vasut1-1/+1
The I2C2 has SMBus device SMSC USB2514Bi connected to it, the device is capable of up to 100 kHz operation. Reduce the bus frequency to 100 kHz to guarantee this I2C device can work correctly. Fixes: 583f24ae42a07 ("arm64: dts: imx8mm: Add support for Data Modul i.MX8M Mini eDM SBC") Signed-off-by: Marek Vasut <marex@denx.de> Cc: Fabio Estevam <festevam@denx.de> Cc: Peng Fan <peng.fan@nxp.com> Cc: Shawn Guo <shawnguo@kernel.org> Cc: NXP Linux Team <linux-imx@nxp.com> To: linux-arm-kernel@lists.infradead.org Signed-off-by: Shawn Guo <shawnguo@kernel.org>
2022-05-05arm64: dts: imx8mm: Disable USB2 OC on Data Modul i.MX8M Mini eDM SBCMarek Vasut1-0/+1
The USB2 port has USB Hub permanently connected to it, disable OC to avoid getting false OC indication. Fixes: 583f24ae42a07 ("arm64: dts: imx8mm: Add support for Data Modul i.MX8M Mini eDM SBC") Signed-off-by: Marek Vasut <marex@denx.de> Cc: Fabio Estevam <festevam@denx.de> Cc: Peng Fan <peng.fan@nxp.com> Cc: Shawn Guo <shawnguo@kernel.org> Cc: NXP Linux Team <linux-imx@nxp.com> To: linux-arm-kernel@lists.infradead.org Signed-off-by: Shawn Guo <shawnguo@kernel.org>
2022-05-05arm64: dts: imx8mm: Add CPLD on MX8Menlo boardMarek Vasut1-1/+14
The CPLD on MX8Menlo board is used to operate custom hardware, the CPLD content is compatible with previous M53Menlo CPLD, add the bindings. Signed-off-by: Marek Vasut <marex@denx.de> Cc: Fabio Estevam <festevam@denx.de> Cc: Marcel Ziswiler <marcel.ziswiler@toradex.com> Cc: Peng Fan <peng.fan@nxp.com> Cc: Rob Herring <robh+dt@kernel.org> Cc: Shawn Guo <shawnguo@kernel.org> Cc: NXP Linux Team <linux-imx@nxp.com> Cc: devicetree@vger.kernel.org To: linux-arm-kernel@lists.infradead.org Reviewed-by: Marcel Ziswiler <marcel.ziswiler@toradex.com> Signed-off-by: Shawn Guo <shawnguo@kernel.org>
2022-05-05arm64: dts: imx8mq-kontron-pitx-imx8m: Use the standard 'uart-has-rtscts'Fabio Estevam1-1/+1
The usage of the 'fsl,uart-has-rtscts' property is deprecated. Use the standard 'uart-has-rtscts' instead. Cc: Heiko Thiery <heiko.thiery@gmail.com> Signed-off-by: Fabio Estevam <festevam@denx.de> Acked-By: Heiko Thiery <heiko.thiery@gmail.com> Signed-off-by: Shawn Guo <shawnguo@kernel.org>
2022-05-05arm64: dts: imx8mp-verdin: Use the standard 'uart-has-rtscts'Fabio Estevam2-3/+3
The usage of the 'fsl,uart-has-rtscts' property is deprecated. Use the standard 'uart-has-rtscts' instead. Cc: Marcel Ziswiler <marcel.ziswiler@toradex.com> Signed-off-by: Fabio Estevam <festevam@denx.de> Acked-by: Marcel Ziswiler <marcel.ziswiler@toradex.com> Signed-off-by: Shawn Guo <shawnguo@kernel.org>
2022-05-05arm64: dts: imx8mp: Add MEDIA_BLK_CTRLPaul Elder1-0/+38
Add a DT node for the MEDIA_BLK_CTRL, which provides power domains for the camera and display devices. Signed-off-by: Paul Elder <paul.elder@ideasonboard.com> Signed-off-by: Laurent Pinchart <laurent.pinchart@ideasonboard.com> Reviewed-by: Marek Vasut <marex@denx.de> Signed-off-by: Lucas Stach <l.stach@pengutronix.de> Signed-off-by: Shawn Guo <shawnguo@kernel.org>
2022-05-05arm64: dts: imx8mp: Add MEDIAMIX power domainsLaurent Pinchart1-0/+23
Add the power domains related to the MEDIAMIX to the GPC. Signed-off-by: Laurent Pinchart <laurent.pinchart@ideasonboard.com> Reviewed-by: Marek Vasut <marex@denx.de> Signed-off-by: Lucas Stach <l.stach@pengutronix.de> Signed-off-by: Shawn Guo <shawnguo@kernel.org>
2022-05-05arm64: dts: imx8mp: add HSIO power-domainsLucas Stach1-6/+51
This adds the GPC and HSIO blk-ctrl nodes providing power control for the high-speed (USB and PCIe) IOs. Signed-off-by: Lucas Stach <l.stach@pengutronix.de> Reviewed-by: Laurent Pinchart <laurent.pinchart@ideasonboard.com> Signed-off-by: Shawn Guo <shawnguo@kernel.org>
2022-05-05arm64: dts: imx8mp: Add Engicam i.Core MX8M Plus EDIMM2.2 Starter KitManoj Sai2-0/+176
Genaral features: - LCD 7" C.Touch - microSD slot - Ethernet 1Gb - Wifi/BT - 2x LVDS Full HD interfaces - 3x USB 2.0 - 1x USB 3.0 - HDMI Out - Plus PCIe - MIPI CSI - 2x CAN - Audio Out i.Core MX8M Plus is an EDIMM SoM based on NXP i.MX8M Plus from Engicam. i.Core MX8M Plus needs to mount on top of this Evaluation board for creating complete i.Core MX8M Plus EDIMM2.2 Starter Kit. Add support for it. Signed-off-by: Manoj Sai <abbaraju.manojsai@amarulasolutions.com> Signed-off-by: Matteo Lisi <matteo.lisi@engicam.com> Reviewed-by: Jagan Teki <jagan@amarulasolutions.com> Signed-off-by: Shawn Guo <shawnguo@kernel.org>
2022-05-05arm64: dts: imx8mp: Add Engicam i.Core MX8M Plus SoMManoj Sai1-0/+186
i.Core MX8M Plus is an EDIMM SoM based on NXP i.MX8M Plus from Engicam. General features: - NXP i.MX8M Plus - Up to 4GB LDDR4 - 8 eMMC - Gigabit Ethernet - USB 3.0, 2.0 Host/OTG - PCIe 3.0 interface - I2S - LVDS - rest of i.MX8M Plus features i.Core MX8M Plus needs to mount on top of Engicam baseboards for creating complete platform solutions. Add support for it. Signed-off-by: Manoj Sai <abbaraju.manojsai@amarulasolutions.com> Signed-off-by: Matteo Lisi <matteo.lisi@engicam.com> Reviewed-by: Jagan Teki <jagan@amarulasolutions.com> Signed-off-by: Shawn Guo <shawnguo@kernel.org>
2022-05-05arm64: dts: freescale: update ifc node name to be memory-controllerLi Yang4-4/+4
Update the node name to be align with updated DT binding. But be noted that u-boot for ls1088a used the ifc node name to disable ifc-nor node when the SoC is configured to use QSPI. The u-boot has been updated to use the latest name but the change could break compatibility with older u-boot for ls1088a. Signed-off-by: Li Yang <leoyang.li@nxp.com> Signed-off-by: Shawn Guo <shawnguo@kernel.org>
2022-05-05arm64: dts: remove "simple-bus" compatible from ifc nodeLi Yang4-4/+4
The binding of ifc device has been updated. Update dts to match accordingly. Signed-off-by: Li Yang <leoyang.li@nxp.com> Signed-off-by: Shawn Guo <shawnguo@kernel.org>
2022-04-24arm64: dts: imx8mn-evk: Add UART3 supportFabio Estevam1-0/+18
UART3 pins are available in the J1003 connector. Add support for it. Signed-off-by: Fabio Estevam <festevam@denx.de> Signed-off-by: Shawn Guo <shawnguo@kernel.org>
2022-04-24arm64: dts: imx8mn-ddr4-evk: Describe the 32.768 kHz PMIC clockFabio Estevam1-0/+4
The ROHM BD71847 PMIC has a 32.768 kHz clock. Describe the PMIC clock to fix the following boot errors: bd718xx-clk bd71847-clk.1.auto: No parent clk found bd718xx-clk: probe of bd71847-clk.1.auto failed with error -22 Based on the same fix done for imx8mm-evk as per commit a6a355ede574 ("arm64: dts: imx8mm-evk: Add 32.768 kHz clock to PMIC") Fixes: 3e44dd09736d ("arm64: dts: imx8mn-ddr4-evk: Add rohm,bd71847 PMIC support") Signed-off-by: Fabio Estevam <festevam@denx.de> Signed-off-by: Shawn Guo <shawnguo@kernel.org>
2022-04-24arm64: dts: imx8mm: Add i.MX8M Mini Toradex Verdin based Menlo boardMarek Vasut2-0/+322
Add new board based on the Toradex Verdin iMX8M Mini SoM, the MX8Menlo. The board is a compatible replacement for i.MX53 M53Menlo and features USB, multiple UARTs, ethernet, LEDs, SD and eMMC. Reviewed-by: Fabio Estevam <festevam@denx.de> Reviewed-by: Francesco Dolcini <francesco.dolcini@toradex.com> Signed-off-by: Marek Vasut <marex@denx.de> Cc: Fabio Estevam <festevam@denx.de> Cc: Francesco Dolcini <francesco.dolcini@toradex.com> Cc: Marcel Ziswiler <marcel.ziswiler@toradex.com> Cc: Peng Fan <peng.fan@nxp.com> Cc: Shawn Guo <shawnguo@kernel.org> Cc: NXP Linux Team <linux-imx@nxp.com> To: linux-arm-kernel@lists.infradead.org Signed-off-by: Shawn Guo <shawnguo@kernel.org>
2022-04-18arm64: dts: imx: Add i.MX8M Plus Gateworks gw7400 dts supportTim Harvey2-0/+897
The Gateworks GW7400 is an ARM based single board computer (SBC) featuring: - i.MX8M Plus SoC - LPDDR4 DRAM - eMMC FLASH - Gateworks System Controller (GSC) - QOS GbE - Microchip GbE Switch - Multiple multi-protocol RS232/RS485/RS422 Serial ports - USB 3.0 Front panel connector - onboard 802.11ac WiFi / BT - 3x miniPCIe socket with PCIe and USB 2.0 - 1x M.2 B/A-E socket with PCIe, USB 3.0 and dual nano-SIM sockets - off-board connectors for: MIPI DSI, MIPI CSI, SPI, GPIO, I2C - Wide range DC power input - Passive PoE - 802.3at PoE Signed-off-by: Tim Harvey <tharvey@gateworks.com> Cc: Rob Herring <robh+dt@kernel.org> Cc: Krzysztof Kozlowski <krzk+dt@kernel.org> Cc: Shawn Guo <shawnguo@kernel.org> Cc: Sascha Hauer <s.hauer@pengutronix.de> Cc: Pengutronix Kernel Team <kernel@pengutronix.de> Cc: Fabio Estevam <festevam@gmail.com> Cc: NXP Linux Team <linux-imx@nxp.com> Signed-off-by: Shawn Guo <shawnguo@kernel.org>
2022-04-18arm64: dts: imx8mm-evk: add pwm1/backlight supportTommaso Merciai1-0/+20
Add pwm1/backlight support nodes for imx8mm_evk board. Align with u-boot dts References: - https://patchwork.ozlabs.org/project/uboot/patch/20220326111911.13720-9-tommaso.merciai@amarulasolutions.com/ Signed-off-by: Tommaso Merciai <tommaso.merciai@amarulasolutions.com> Signed-off-by: Shawn Guo <shawnguo@kernel.org>
2022-04-18arm64: dts: imx8mn: add 8MNANOD3L-EVK device treeMichael Walle2-0/+115
Add a device tree for the 8MNANOD3L-EVK eval board which features an IMX8MN SoC. It is similar to the 8MNANODLPD4-EVK eval board except it has an IMX8MN UltraLite SoC and DDR3L memory. It esp. differs in the PMIC configuration because the SoC has a smaller package and thus the ARM core voltage is combined with the SoC voltage and the DDR voltage is 1.35V for the DDR3L memory. Signed-off-by: Michael Walle <michael@walle.cc> Signed-off-by: Shawn Guo <shawnguo@kernel.org>
2022-04-18arm64: dts: imx8m{m,n}-venice-*: add missing uart-has-rtscts property to UARTsTim Harvey4-0/+8
Add the missing 'uart-has-rtscts' property to UART's that have hardware flow control capability. Signed-off-by: Tim Harvey <tharvey@gateworks.com> Signed-off-by: Shawn Guo <shawnguo@kernel.org>
2022-04-18arm64: dts: freescale: imx8q: add imx vpu codec entriesMing Qian3-0/+123
Add the Video Processing Unit node for IMX8Q SoC. Signed-off-by: Ming Qian <ming.qian@nxp.com> Signed-off-by: Shijie Qin <shijie.qin@nxp.com> Signed-off-by: Zhou Peng <eagle.zhou@nxp.com> Signed-off-by: Shawn Guo <shawnguo@kernel.org>
2022-04-18arm64: dts: imx8mp: Enable HS400-ESAdam Ford1-3/+3
The SDHC controller in the imx8mp has the same controller as the imx8mm which supports HS400-ES. Change the compatible fallback to imx8mm to enable it, but keep the imx7d-usdhc to prevent breaking backwards compatibility. Signed-off-by: Adam Ford <aford173@gmail.com> Acked-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org> Signed-off-by: Shawn Guo <shawnguo@kernel.org>
2022-04-18arm64: dts: imx8mn: Enable HS400-ESAdam Ford1-3/+3
The SDHC controller in the imx8mn has the same controller as the imx8mm which supports HS400-ES. Change the compatible fallback to imx8mm to enable it, but keep the imx7d-usdhc to prevent breaking backwards compatibility. Signed-off-by: Adam Ford <aford173@gmail.com> Acked-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org> Signed-off-by: Shawn Guo <shawnguo@kernel.org>
2022-04-11arm64: dts: freescale: add initial support for verdin imx8m plusMarcel Ziswiler10-0/+1767
This patch adds the device tree to support Toradex Verdin iMX8M Plus [1] a computer on module which can be used on different carrier boards. The module consists of an NXP i.MX 8M Plus family SoC (either i.MX 8M Plus Quad or 8M Plus QuadLite), a PCA9450C PMIC, a Gigabit Ethernet PHY, 1, 2, 4 or 8 GB of LPDDR4 RAM, an eMMC, a TLA2024 ADC, an I2C EEPROM, an RX8130 RTC, an optional I2C temperature sensor plus an optional Bluetooth/Wi-Fi module. Anything that is not self-contained on the module is disabled by default. The device tree for the Dahlia includes the module's device tree and enables the supported peripherals of the carrier board. The device tree for the Verdin Development Board includes the module's device tree as well as the Dahlia one as it is a superset and supports almost all peripherals available. So far there is no display functionality supported at all but basic console UART, USB host, eMMC and Ethernet functionality work fine. [1] https://www.toradex.com/computer-on-modules/verdin-arm-family/nxp-imx-8m-plus Signed-off-by: Marcel Ziswiler <marcel.ziswiler@toradex.com> Reviewed-by: Laurent Pinchart <laurent.pinchart@ideasonboard.com> Tested-by: Laurent Pinchart <laurent.pinchart@ideasonboard.com> Signed-off-by: Shawn Guo <shawnguo@kernel.org>
2022-04-11arm64: dts: imx8mp: add uart2 dmaMarcel Ziswiler1-0/+2
Add DMA properties to uart2 node. Signed-off-by: Marcel Ziswiler <marcel.ziswiler@toradex.com> Reviewed-by: Laurent Pinchart <laurent.pinchart@ideasonboard.com> Signed-off-by: Shawn Guo <shawnguo@kernel.org>
2022-04-11arm64: dts: freescale: align SPI NOR node name with dtschemaKrzysztof Kozlowski4-8/+8
The node names should be generic and SPI NOR dtschema expects "flash". Signed-off-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org> Signed-off-by: Shawn Guo <shawnguo@kernel.org>
2022-04-11arm64: dts: lx2160a: Update can node propertyKuldeep Singh1-2/+2
fsl,clk-source property is of type uint8 and need to be defined as "/bits/ 8 <0>". Simply setting value to 0 raise warning: can@2180000: fsl,clk-source:0: [0, 0, 0, 0] is too long Signed-off-by: Kuldeep Singh <singh.kuldeep87k@gmail.com> Signed-off-by: Shawn Guo <shawnguo@kernel.org>
2022-04-11arm64: dts: ls1028a: default to OTG mode for USBMichael Walle4-3/+4
At the moment, the dtsi will force the dr_mode to host. This is problematic because it will always turn on the Vbus voltage regardless if the port is host or device. This might lead to a "shortcut" between the two USB endpoints because both might have their Vbus supplies enabled. Therefore, the default should be "otg" for any ports which aren't host only (from a SoC point of view) and have a user of the dtsi file overwrite that explicitly. Move the 'dr_mode = "host";' into the board dts. Now that the dtsi doesn't set the dr_mode anymore, we can also drop the 'dr_mode = "otg";' in the board dts because that is the default value if dr_mode is not set. Signed-off-by: Michael Walle <michael@walle.cc> Signed-off-by: Shawn Guo <shawnguo@kernel.org>
2022-04-11arm64: dts: ls1028a: sl28: use ocelot-8021q tagging by defaultMichael Walle1-0/+8
Enable the ocelot-8021q tagger by default which supports ethernet flow control. The new default is set in the common board dtsi. The actual switch node is enabled on a per board variant basis. Because of this we set the new tagger default for both internal ports and a particular variant is free to choose among the two port. Signed-off-by: Michael Walle <michael@walle.cc> Reviewed-by: Vladimir Oltean <vladimir.oltean@nxp.com> Signed-off-by: Shawn Guo <shawnguo@kernel.org>
2022-04-11arm64: dts: imx8mm-verdin: add sd1 sleep pinctrlMarcel Ziswiler1-1/+19
Add SD1 sleep pinctrl to avoid backfeeding during sleep. Signed-off-by: Marcel Ziswiler <marcel.ziswiler@toradex.com> Signed-off-by: Shawn Guo <shawnguo@kernel.org>
2022-04-11arm64: dts: imx8mm-verdin: note about disabled sd1 pull-upsMarcel Ziswiler1-0/+4
Add a note about us using discrete external on-module resistors pulling-up to the on-module +V3.3_1.8_SD (LDO5) rail and explicitly disabling the internal pull-ups due to ERR050080 [1]: IO: Degradation of internal IO pullup/pulldown current capability for IO’s continuously driven in a 3.3V operating mode [1] https://www.nxp.com/webapp/Download?colCode=IMX8MM_0N87W Signed-off-by: Marcel Ziswiler <marcel.ziswiler@toradex.com> Signed-off-by: Shawn Guo <shawnguo@kernel.org>
2022-04-11arm64: dts: imx8mm-verdin: capitalisation of verdin commentsMarcel Ziswiler2-2/+2
Fix capitalisation of Verdin in comments. Signed-off-by: Marcel Ziswiler <marcel.ziswiler@toradex.com> Signed-off-by: Shawn Guo <shawnguo@kernel.org>
generated by cgit v1.2.3 (git 2.39.0) at 2025-01-12 23:06:01 +0300