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2022-10-04Merge tag 'samsung-dt-dt64-6.1-2' of ↵Arnd Bergmann1-1/+1
https://git.kernel.org/pub/scm/linux/kernel/git/krzk/linux into arm/dt Samsung DTS ARM and ARM64 changes for v6.1 Late cleanup and fixes for Samsung DTS: 1. Fix polarity of pins: - enable GPIO of NFC chip in Exynos5433 TM2 boards, - vbus GPIO of EHCI in Exynos4412 Origen board. 2. Correct name of pin configuration nodes - redundant "pins" in the name (no functional impact). * tag 'samsung-dt-dt64-6.1-2' of https://git.kernel.org/pub/scm/linux/kernel/git/krzk/linux: ARM: dts: s5pv210: correct double "pins" in pinmux node ARM: dts: exynos: fix polarity of VBUS GPIO of Origen arm64: dts: exynos: fix polarity of "enable" line of NFC chip in TM2 Link: https://lore.kernel.org/r/20221003073916.12588-1-krzysztof.kozlowski@linaro.org Signed-off-by: Arnd Bergmann <arnd@arndb.de>
2022-09-30arm64: dts: exynos: fix polarity of "enable" line of NFC chip in TM2Dmitry Torokhov1-1/+1
According to s3fwrn5 driver code the "enable" GPIO line is driven "high" when chip is not in use (mode is S3FWRN5_MODE_COLD), and is driven "low" when chip is in use. s3fwrn5_phy_power_ctrl(): ... gpio_set_value(phy->gpio_en, 1); ... if (mode != S3FWRN5_MODE_COLD) { msleep(S3FWRN5_EN_WAIT_TIME); gpio_set_value(phy->gpio_en, 0); msleep(S3FWRN5_EN_WAIT_TIME); } Therefore the line described by "en-gpios" property should be annotated as "active low". The wakeup gpio appears to have correct polarity (active high). Signed-off-by: Dmitry Torokhov <dmitry.torokhov@gmail.com> Link: https://lore.kernel.org/r/20220929011557.4165216-1-dmitry.torokhov@gmail.com Signed-off-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org>
2022-08-23arm64: dts: exynos: Add SysMMU nodes for Exynos850Sam Protsenko1-0/+45
Add all SysMMU nodes to Exynos850 SoC device tree. Signed-off-by: Sam Protsenko <semen.protsenko@linaro.org> Signed-off-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org> Link: https://lore.kernel.org/r/20220809113323.29965-10-semen.protsenko@linaro.org
2022-08-23arm64: dts: exynos: Add CMU_AUD, CMU_IS and CMU_MFCMSCL for Exynos850Sam Protsenko1-0/+38
Add missing clock domains to Exynos850 SoC device tree. Signed-off-by: Sam Protsenko <semen.protsenko@linaro.org> Signed-off-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org> Link: https://lore.kernel.org/r/20220809113323.29965-9-semen.protsenko@linaro.org
2022-08-23arm64: dts: exynosautov9: add fsys0/1 clock DT nodesChanho Park1-0/+28
Add cmu_fsys0 and cmu_fsys1 for PCIe clocks and USB/MMC clocks respectively. Signed-off-by: Chanho Park <chanho61.park@samsung.com> Reviewed-by: Chanwoo Choi <cw00.choi@samsung.com> [krzk: put nodes ordered by unit address] Signed-off-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org> Link: https://lore.kernel.org/r/50f8145bca30cf5c900359d0b78c1c617090e021.1659054220.git.chanho61.park@samsung.com
2022-07-07Merge tag 'samsung-dt64-5.20-2' of ↵Arnd Bergmann3-8/+1087
git://git.kernel.org/pub/scm/linux/kernel/git/krzk/linux into arm/dt Samsung DTS ARM64 changes for v5.20, part two 1. Correct SPI11 pin names on ExynosAutov9. 2. Add more USI (I2C/SPI/UART) devices to ExynosAutov9. * tag 'samsung-dt64-5.20-2' of git://git.kernel.org/pub/scm/linux/kernel/git/krzk/linux: arm64: dts: exynosautov9: add usi device tree nodes arm64: dts: exynosautov9: prepare usi0 changes arm64: dts: exynosautov9: add pdma0 device tree node dt-bindings: soc: samsung: usi: add exynosautov9-usi compatible arm64: dts: exynosautov9: correct spi11 pin names Link: https://lore.kernel.org/r/20220707080408.69251-2-krzysztof.kozlowski@linaro.org Signed-off-by: Arnd Bergmann <arnd@arndb.de>
2022-07-05arm64: dts: exynosautov9: add usi device tree nodesChanho Park1-0/+1067
Universal Serial Interface (USI) supports three types of serial interface such as Universal Asynchronous Receiver and Transmitter (UART), Serial Peripheral Interface (SPI), and Inter-Integrated Circuit (I2C). Each protocols can be working independently and configured as one of those using external configuration inputs. Exynos Auto v9 SoC support 12 USIs. When a USI uses two pins such as i2c and 3 wire uarts(RX/TX only), we can use remain two pins as i2c mode. So, we can define one USI node that includes serial/spi and hsi2c. usi_i2c nodes can be used only for i2c mode. We can have below combinations for one USI. 1) The usi node is used either 4 pin uart or 4 pin spi -> No usi_i2c can be used 2) The usi node is used 2 pin uart(RX/TX) and i2c(SDA/SCL) -> usi_i2c should be enabled to use the latter i2c 3) The usi node is used i2c(SDA/SCL) and i2c(SDA/SCL) -> usi_i2c should be enabled to use the latter i2c By default, all USIs are initially set to uart mode by below setting. samsung,mode = <USI_V2_UART>; You can change it either USI_V2_SPI or USI_V2_I2C. Signed-off-by: Chanho Park <chanho61.park@samsung.com> Signed-off-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org> Link: https://lore.kernel.org/r/20220701015226.32781-6-chanho61.park@samsung.com
2022-07-05arm64: dts: exynosautov9: prepare usi0 changesChanho Park2-5/+7
Before adding whole USI nodes, this applies the changes of usi0 in advance. To be the usi0 and serian_0 nodes as SoC default, some properties should be moved to exynosautov9-sadk.dts. Signed-off-by: Chanho Park <chanho61.park@samsung.com> Signed-off-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org> Link: https://lore.kernel.org/r/20220701015226.32781-5-chanho61.park@samsung.com
2022-07-05arm64: dts: exynosautov9: add pdma0 device tree nodeChanho Park1-0/+10
Add an ARM pl330 dma controller DT node as pdma0. Signed-off-by: Chanho Park <chanho61.park@samsung.com> Signed-off-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org> Link: https://lore.kernel.org/r/20220701015226.32781-4-chanho61.park@samsung.com
2022-07-05arm64: dts: exynosautov9: correct spi11 pin namesChanho Park1-3/+3
They should be started with "gpp5-". Fixes: 31bbac5263aa ("arm64: dts: exynos: add initial support for exynosautov9 SoC") Signed-off-by: Chanho Park <chanho61.park@samsung.com> Signed-off-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org> Link: https://lore.kernel.org/r/20220627005832.8709-1-chanho61.park@samsung.com
2022-07-01Merge tag 'samsung-dt64-5.20' of ↵Arnd Bergmann12-53/+271
git://git.kernel.org/pub/scm/linux/kernel/git/krzk/linux into arm/dt Samsung DTS ARM64 changes for v5.20 1. Add CPU cache, UFS to Tesla FSD. 2. Add reboot-mode (boot into specific bootloader mode) to ExynosAutov9. 3. Add watchdogs to ExynosAutov9. 4. Add eMMC to Exynos7885 JackpotLTE (Samsung Galaxy A8). 5. DTS cleanup: white-spaces, node names, LED color/function. 6. Switch to DTS-local header for pinctrl register values instead of bindings header. The bindings header is being deprecated because it does not reflect the purpose of bindings. * tag 'samsung-dt64-5.20' of git://git.kernel.org/pub/scm/linux/kernel/git/krzk/linux: arm64: dts: exynos: Add internal eMMC support to jackpotlte dt-bindings: clock: Add indices for Exynos7885 TREX clocks dt-bindings: clock: Add bindings for Exynos7885 CMU_FSYS arm64: dts: exynos: enable secondary ufs devices ExynosAutov9 SADK arm64: dts: exynos: add secondary ufs devices in ExynosAutov9 arm64: dts: fsd: use local header for pinctrl register values arm64: dts: exynos: use local header for pinctrl register values arm64: dts: exynos: align MMC node name with dtschema arm64: dts: exynos: adjust DT style of ufs nodes in ExynosAutov9 arm64: dts: exynos: adjust whitespace around '=' arm64: dts: fsd: add ufs device node arm64: dts: exynos: add watchdog in ExynosAutov9 arm64: dts: exynos: add syscon reboot/reboot_mode support in ExynosAutov9 dt-bindings: soc: add samsung,boot-mode definitions arm64: dts: fsd: Add cpu cache information Link: https://lore.kernel.org/r/20220624080746.31947-2-krzysztof.kozlowski@linaro.org Signed-off-by: Arnd Bergmann <arnd@arndb.de>
2022-06-24Merge branch 'for-v5.20/exynos7885-emmc-clk' into next/dt64Krzysztof Kozlowski2-0/+52
2022-06-20arm64: dts: exynos: Add internal eMMC support to jackpotlteDavid Virag2-0/+52
Add the nodes relevant to provide clocks for Exynos7885 eMMC and to support eMMC. eMMC is the internal storage used in the Samsung Galaxy A8 (2018) (jackpotlte), and all other known devices using the Exynos7885 SoC. Signed-off-by: David Virag <virag.david003@gmail.com> Link: https://lore.kernel.org/r/20220601233743.56317-6-virag.david003@gmail.com Signed-off-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org>
2022-06-07arm64: dts: exynos: enable secondary ufs devices ExynosAutov9 SADKChanho Park1-0/+18
Enable ufs_1_phy and ufs_1 devices with ufs_1_fixed_vcc_reg regulator. Signed-off-by: Chanho Park <chanho61.park@samsung.com> Link: https://lore.kernel.org/r/20220607070251.15795-3-chanho61.park@samsung.com Signed-off-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org>
2022-06-07arm64: dts: exynos: add secondary ufs devices in ExynosAutov9Chanho Park1-0/+32
Add ufs_1_phy and ufs_1 for secondary ufs hci controller and phy device. Signed-off-by: Chanho Park <chanho61.park@samsung.com> Link: https://lore.kernel.org/r/20220607070251.15795-2-chanho61.park@samsung.com Signed-off-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org>
2022-06-07arm64: dts: exynos: use local header for pinctrl register valuesKrzysztof Kozlowski7-43/+122
The DTS uses hardware register values directly in pin controller pin configuration. These are not some IDs or other abstraction layer but raw numbers used in the registers. These numbers were previously put in the bindings header to avoid code duplication and to provide some context meaning (name), but they do not fit the purpose of bindings. Store the constants in a header next to DTS and use them instead of bindings. Signed-off-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org> Reviewed-by: Chanho Park <chanho61.park@samsung.com> Tested-by: Chanho Park <chanho61.park@samsung.com> Acked-by: Rob Herring <robh@kernel.org> Link: https://lore.kernel.org/r/20220605160508.134075-6-krzysztof.kozlowski@linaro.org
2022-06-07arm64: dts: exynos: align MMC node name with dtschemaKrzysztof Kozlowski1-3/+3
The node names should be generic and MMC controller dtschema expects "mmc". Signed-off-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org> Reviewed-by: Alim Akhtar <alim.akhtar@samsung.com> Link: https://lore.kernel.org/r/20220605163710.144210-3-krzysztof.kozlowski@linaro.org
2022-06-07arm64: dts: exynos: adjust DT style of ufs nodes in ExynosAutov9Chanho Park1-6/+6
Drop "ufs0-" label name usage of ufs phy and hci nodes. Regarding the comments of reg properties, we don't need to illustrate here because we can find the description from the dt-binding doc. Suggested-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org> Signed-off-by: Chanho Park <chanho61.park@samsung.com> Link: https://lore.kernel.org/r/20220602053250.62593-5-chanho61.park@samsung.com Signed-off-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org>
2022-06-07arm64: dts: exynos: adjust whitespace around '='Krzysztof Kozlowski1-1/+1
Fix whitespace coding style: use single space instead of tabs or multiple spaces around '=' sign in property assignment. No functional changes (same DTB). Signed-off-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org> Reviewed-by: Chanho Park <chanho61.park@samsung.com> Reviewed-by: Alim Akhtar <alim.akhtar@samsung.com> Link: https://lore.kernel.org/r/20220526204323.832243-1-krzysztof.kozlowski@linaro.org
2022-06-06arm64: dts: exynos: Correct UART clocks on Exynos7885David Virag1-6/+6
The clocks in the serial UART nodes were swapped by mistake on Exynos7885. This only worked correctly because of a mistake in the clock driver which has been fixed. With the fixed clock driver in place, the baudrate of the UARTs get miscalculated. Fix this by correcting the clocks in the dtsi. Fixes: 06874015327b ("arm64: dts: exynos: Add initial device tree support for Exynos7885 SoC") Signed-off-by: David Virag <virag.david003@gmail.com> Link: https://lore.kernel.org/r/20220526055840.45209-3-virag.david003@gmail.com Signed-off-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org>
2022-06-06arm64: dts: exynos: add watchdog in ExynosAutov9Chanho Park1-0/+20
Adds two CPU watchdog devices for ExynosAutov9 SoC. Signed-off-by: Chanho Park <chanho61.park@samsung.com> Link: https://lore.kernel.org/r/20220523113919.59571-4-chanho61.park@samsung.com Signed-off-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org>
2022-06-06arm64: dts: exynos: add syscon reboot/reboot_mode support in ExynosAutov9Chanho Park1-0/+17
Reboot of exynosautov9 SoC can be handled by setting the bit(SWRESET_SYSTEM[1]) of SYSTEM_CONFIGURATION register(PMU + 0x3a00). syscon-reboot-mode can be used to indicate the reboot mode for bootloader. SYSIP_DAT0 register(PMU + 0x810) will not be cleared after reboot so bootloader can enter the boot mode according to the value. Signed-off-by: Chanho Park <chanho61.park@samsung.com> Link: https://lore.kernel.org/r/20220523121244.67341-3-chanho61.park@samsung.com Signed-off-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org>
2022-05-05arm64: dts: exynos: switch UFS clock node in ExynosAutov9Chanho Park1-12/+2
Use cmu_fsys's clock node instead of dummy UFS clock node. Signed-off-by: Chanho Park <chanho61.park@samsung.com> Reviewed-by: Chanwoo Choi <cw00.choi@samsung.com> Link: https://lore.kernel.org/r/20220504075154.58819-13-chanho61.park@samsung.com Signed-off-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org>
2022-05-05arm64: dts: exynos: switch USI clocks in ExynosAutov9Chanho Park1-13/+4
Use CMU clock nodes instead of dummy fixed-rate-clock. Signed-off-by: Chanho Park <chanho61.park@samsung.com> Reviewed-by: Chanwoo Choi <cw00.choi@samsung.com> Link: https://lore.kernel.org/r/20220504075154.58819-12-chanho61.park@samsung.com Signed-off-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org>
2022-05-05arm64: dts: exynos: add initial CMU clock nodes in ExynosAutov9Chanho Park1-0/+84
Add cmu_top, cmu_busmc, cmu_core, cmu_fsys and peric0/c1/s clock nodes. Signed-off-by: Chanho Park <chanho61.park@samsung.com> Reviewed-by: Chanwoo Choi <cw00.choi@samsung.com> Link: https://lore.kernel.org/r/20220504075154.58819-11-chanho61.park@samsung.com Signed-off-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org>
2022-05-04arm64: dts: exynos: drop useless 'dma-channels/requests' propertiesKrzysztof Kozlowski2-10/+0
The pl330 DMA controller provides number of DMA channels and requests through its registers, so duplicating this information (with a chance of mistakes) in DTS is pointless. Additionally the DTS used always wrong property names which causes DT schema check failures - the bindings documented 'dma-channels' and 'dma-requests' properties without leading hash sign. Reported-by: Rob Herring <robh@kernel.org> Suggested-by: Marek Szyprowski <m.szyprowski@samsung.com> Signed-off-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org> Link: https://lore.kernel.org/r/20220430121902.59895-9-krzysztof.kozlowski@linaro.org
2022-05-04arm64: dts: exynos: move XTCXO clock frequency to board in Exynos Auto v9Krzysztof Kozlowski2-1/+4
The external oscillator - XTCXO - is an input to the SoC. It is defined in the Exynos Auto v9 SoC DTSI, because all boards will provide it and clock controller bindings expect it, however the actual frequency of the clock should be determined by the board. Signed-off-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org> Reviewed-by: Chanho Park <chanho61.park@samsung.com> Link: https://lore.kernel.org/r/20220503092631.174713-1-krzysztof.kozlowski@linaro.org
2022-04-04arm64: dts: exynos: add a specific compatible to MCTKrzysztof Kozlowski2-2/+4
One compatible is used for the Multi-Core Timer on most of the Samsung Exynos SoCs, which is correct but not specific enough. These MCT blocks have different number of interrupts, so add a second specific compatible to Exynos5433 and Exynos850. Signed-off-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org> Reviewed-by: Alim Akhtar <alim.akhtar@samsung.com> Link: https://lore.kernel.org/r/20220304122424.307885-4-krzysztof.kozlowski@canonical.com
2022-04-04arm64: dts: exynos: move aliases to board in Exynos850Krzysztof Kozlowski2-16/+5
The aliases for typical blocks which are disabled by default in DTSI (like I2C, UART and MMC) should be defined in the board DTS. The board should add aliases only for enabled blocks according to its specific order. On Exynos850, move aliases of enabled blocks to E850-96 board and remove unused ones. Signed-off-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org> Link: https://lore.kernel.org/r/20220221075219.10827-1-krzysztof.kozlowski@canonical.com
2022-02-28Merge tag 'samsung-dt64-5.18-2' of ↵Arnd Bergmann6-74/+1405
git://git.kernel.org/pub/scm/linux/kernel/git/krzk/linux into arm/dt Samsung DTS ARM64 changes for v5.18, part two 1. Minor fixes and cleanups in newly introduced support for Exynos850. 2. Add basic support for Exynos7885 and Samsung Galaxy A8 (2018): SM-A530F. * tag 'samsung-dt64-5.18-2' of git://git.kernel.org/pub/scm/linux/kernel/git/krzk/linux: arm64: dts: exynos: Add initial device tree support for Exynos7885 SoC arm64: dts: exynos: use dedicated wake-up pinctrl compatible in Exynos850 arm64: dts: exynos: align pinctrl with dtschema in Exynos850 arm64: dts: exynos: drop incorrectly placed wakeup interrupts in Exynos850 Link: https://lore.kernel.org/r/20220226220116.13452-2-krzysztof.kozlowski@canonical.com Signed-off-by: Arnd Bergmann <arnd@arndb.de>
2022-02-25Merge tag 'samsung-dt-pinctrl-5.18' of ↵Arnd Bergmann6-346/+358
git://git.kernel.org/pub/scm/linux/kernel/git/krzk/linux into arm/dt Samsung pinctrl DTS and driver changes for v5.18 Conversion of Samsung pinctrl bindings to dtschema followed up with alignment of DTS files to the dtschema. The entire work consists of three parts but everything should be merged at once to avoid dtschema check errors: 1. Samsung pinctrl driver change necessary to accept new DTS (driver depends on node names and this has to be adjusted because of dtschema). 2. Conversion to dtschema which brings requirement of different naming of the GPIO nodes. 3. DTS commits depending on driver (1) above, which convert all GPIO pin bank names to new naming, required by dtschema. This also includes few cleanups around DTS which are here to avoid any merge conflicts. The Samsung pinctrl driver changes are backwards compatible. However the DTS changes (renaming nodes) could cause problems in out-of-tree or other project implementations of the driver. * tag 'samsung-dt-pinctrl-5.18' of git://git.kernel.org/pub/scm/linux/kernel/git/krzk/linux: (28 commits) arm64: dts: exynos: use dedicated wake-up pinctrl compatible in ExynosAutov9 ARM: dts: s5pv210: align pinctrl with dtschema ARM: dts: s3c64xx: align pinctrl with dtschema ARM: dts: s3c24xx: align pinctrl with dtschema arm64: dts: exynos: align pinctrl with dtschema in ExynosAutov9 arm64: dts: exynos: align pinctrl with dtschema in Exynos7 arm64: dts: exynos: align pinctrl with dtschema in Exynos5433 ARM: dts: exynos: align pinctrl with dtschema in Exynos542x/5800 ARM: dts: exynos: align pinctrl with dtschema in Exynos5410 ARM: dts: exynos: align pinctrl with dtschema in Exynos5260 ARM: dts: exynos: align pinctrl with dtschema in Exynos5250 ARM: dts: exynos: align pinctrl with dtschema in Exynos4412 ARM: dts: exynos: align pinctrl with dtschema in Exynos4210 ARM: dts: exynos: align pinctrl with dtschema in Exynos3250 ARM: dts: s3c64xx: drop unneeded pinctrl wake-up interrupt mapping ARM: dts: exynos: simplify PMIC DVS pin configuration in Peach Pi ARM: dts: exynos: override pins by label in Peach Pi ARM: dts: exynos: simplify PMIC DVS pin configuration in Peach Pit ARM: dts: exynos: override pins by label in Peach Pit ARM: dts: exynos: simplify PMIC DVS pin configuration in Odroid XU ... Link: https://lore.kernel.org/r/20220129115352.13274-1-krzysztof.kozlowski@canonical.com Signed-off-by: Arnd Bergmann <arnd@arndb.de>
2022-02-23arm64: dts: exynos: Add initial device tree support for Exynos7885 SoCDavid Virag4-4/+1375
Add initial Exynos7885 device tree nodes with dts for the Samsung Galaxy A8 (2018), a.k.a. "jackpotlte", with model number "SM-A530F". Currently this includes some clock support, UART support, and I2C nodes. Signed-off-by: David Virag <virag.david003@gmail.com> Reviewed-by: Sam Protsenko <semen.protsenko@linaro.org> Link: https://lore.kernel.org/r/20220221194958.117361-2-virag.david003@gmail.com Signed-off-by: Krzysztof Kozlowski <krzysztof.kozlowski@canonical.com>
2022-02-12arm64: dts: exynos: use dedicated wake-up pinctrl compatible in Exynos850Krzysztof Kozlowski1-2/+2
Older Samsung Exynos SoC pin controller nodes (Exynos3250, Exynos4, Exynos5, Exynos5433) with external wake-up interrupts, expected to have one interrupt for multiplexing these wake-up interrupts. Also they expected to have exactly one pin controller capable of external wake-up interrupts. It seems however that newer ARMv8 Exynos SoC like Exynos850 and ExynosAutov9 have differences: 1. No multiplexed external wake-up interrupt, only direct, 2. More than one pin controller capable of external wake-up interrupts. Use dedicated Exynos850 compatible for its external wake-up interrupts controller to indicate the differences. Signed-off-by: Krzysztof Kozlowski <krzysztof.kozlowski@canonical.com> Reviewed-by: Sam Protsenko <semen.protsenko@linaro.org> Link: https://lore.kernel.org/r/20220111201722.327219-21-krzysztof.kozlowski@canonical.com
2022-02-12arm64: dts: exynos: align pinctrl with dtschema in Exynos850Krzysztof Kozlowski1-28/+28
Align the pin controller related nodes with dtschema. No functional change expected. Signed-off-by: Krzysztof Kozlowski <krzysztof.kozlowski@canonical.com> Reviewed-by: Sam Protsenko <semen.protsenko@linaro.org> Link: https://lore.kernel.org/r/20220111201722.327219-13-krzysztof.kozlowski@canonical.com
2022-02-12arm64: dts: exynos: drop incorrectly placed wakeup interrupts in Exynos850Krzysztof Kozlowski1-40/+0
The pin controller device node is expected to have one (optional) interrupt. Its pin banks capable of external interrupts, should define interrupts for each pin, unless a muxed interrupt is used. Exynos850 defined the second part - interrupt for each pin in wake-up pin controller - but also added these interrupts in main device node, which is not correct. Fixes: e3493220fd3e ("arm64: dts: exynos: Add initial Exynos850 SoC support") Signed-off-by: Krzysztof Kozlowski <krzysztof.kozlowski@canonical.com> Tested-by: Sam Protsenko <semen.protsenko@linaro.org> Reviewed-by: Sam Protsenko <semen.protsenko@linaro.org> Link: https://lore.kernel.org/r/20211230195325.328220-3-krzysztof.kozlowski@canonical.com
2022-02-01arm64: dts: exynos: adjust USB DRD clocks with dtschema in Exynos7Krzysztof Kozlowski1-3/+2
Use the same order of USB 3.0 DRD controller clocks as in Exynos5433. Signed-off-by: Krzysztof Kozlowski <krzysztof.kozlowski@canonical.com> Link: https://lore.kernel.org/r/20220129193646.372481-1-krzysztof.kozlowski@canonical.com
2022-01-31arm64: dts: exynos: drop unneeded syscon phandle in Exynos5433 LPASSKrzysztof Kozlowski1-1/+0
Exynos5433 LPASS audio node does not use syscon phandle since commit addebf1588ab ("mfd: exynos-lpass: Remove pad retention control"). It was also dropped from bindings. Signed-off-by: Krzysztof Kozlowski <krzysztof.kozlowski@canonical.com> Reviewed-by: Alim Akhtar <alim.akhtar@samsung.com> Link: https://lore.kernel.org/r/20220129175332.298666-2-krzysztof.kozlowski@canonical.com
2022-01-31arm64: dts: exynos: align pl330 node name with dtschemaKrzysztof Kozlowski2-5/+5
Fixes dtbs_check warnings like: pdma@15610000: $nodename:0: 'pdma@15610000' does not match '^dma-controller(@.*)?$' Signed-off-by: Krzysztof Kozlowski <krzysztof.kozlowski@canonical.com> Reviewed-by: Alim Akhtar <alim.akhtar@samsung.com> Link: https://lore.kernel.org/r/20220129175332.298666-1-krzysztof.kozlowski@canonical.com
2022-01-31arm64: dts: exynos: Add initial E850-96 board supportSam Protsenko2-0/+196
E850-96 is a 96boards development board manufactured by WinLink. It incorporates Samsung Exynos850 SoC, and is compatible with 96boards mezzanine boards [1], as it follows 96boards standards. This patch adds minimal support for E850-96 board. Next features are enabled in board dts file and verified with minimal BusyBox rootfs: * User buttons * LEDs * Serial console * Watchdog timers * RTC * eMMC [1] https://www.96boards.org/products/mezzanine/ Signed-off-by: Sam Protsenko <semen.protsenko@linaro.org> Link: https://lore.kernel.org/r/20220131130849.2667-3-semen.protsenko@linaro.org Signed-off-by: Krzysztof Kozlowski <krzysztof.kozlowski@canonical.com>
2022-01-31arm64: dts: exynos: Add initial Exynos850 SoC supportSam Protsenko2-0/+1404
Samsung Exynos850 is ARMv8-based mobile-oriented SoC. This patch adds initial SoC support. It's not comprehensive yet, some more devices will be added later. Right now only crucial system components and most needed platform devices are defined. Crucial features (needed to boot Linux up to shell with serial console): * Octa cores (Cortex-A55), supporting PSCI v1.0 * ARM architected timer (armv8-timer) * Interrupt controller (GIC-400) * Pinctrl nodes for GPIO * Serial node Basic platform features: * Clock controller CMUs * OSCCLK clock * MCT timer * ARM PMU (Performance Monitor Unit) * Chip-id * RTC * Reset * Watchdog timers * eMMC * I2C * HSI2C * USI All those features are tested on E850-96 board with minimal BusyBox rootfs. Reviewed-by: Chanho Park <chanho61.park@samsung.com> Signed-off-by: Sam Protsenko <semen.protsenko@linaro.org> Link: https://lore.kernel.org/r/20220131130849.2667-2-semen.protsenko@linaro.org Signed-off-by: Krzysztof Kozlowski <krzysztof.kozlowski@canonical.com>
2022-01-25arm64: dts: exynos: add USB DWC3 supplies to Espresso boardKrzysztof Kozlowski2-1/+6
Add required voltage regulators for USB DWC3 block on Exynos7 Espresso board. Due to lack of schematics of Espresso board, the choice of regulators is approximate. What bindings call VDD10, for Exynos7 should be actually called VDD09 (0.9 V). Use regulators with a matching voltage range based on vendor sources for Meizu Pro 5 M576 handset (also with Exynos7420). Signed-off-by: Krzysztof Kozlowski <krzysztof.kozlowski@canonical.com> Link: https://lore.kernel.org/r/20220123111644.25540-2-krzysztof.kozlowski@canonical.com
2022-01-23arm64: dts: exynos: add necessary clock inputs in Exynos7Krzysztof Kozlowski1-6/+27
Exynos7 devicetree bindings require more input clocks for TOP0 and PERIC1 clock controllers, than already provided. Existing DTS was not matching the bindings, so let's update the DTS, even though the error could be in the bindings. Signed-off-by: Krzysztof Kozlowski <krzysztof.kozlowski@canonical.com> Link: https://lore.kernel.org/r/20220102115356.75796-1-krzysztof.kozlowski@canonical.com
2022-01-23arm64: dts: exynos: Align MAX77843 nodes with dtschema on TM2Krzysztof Kozlowski1-3/+14
The newly introduced dtschema for MAX77843 MUIC require the children to have proper naming and a port@0 property. This should not have actual impact on MFD children driver binding, because the max77843 MFD driver uses compatibles. The port@0 is disabled to avoid any impact. Signed-off-by: Krzysztof Kozlowski <krzysztof.kozlowski@canonical.com> Link: https://lore.kernel.org/r/20220111174805.223732-2-krzysztof.kozlowski@canonical.com
2022-01-23arm64: dts: exynos: use dedicated wake-up pinctrl compatible in ExynosAutov9Krzysztof Kozlowski1-1/+1
Older Samsung Exynos SoC pin controller nodes (Exynos3250, Exynos4, Exynos5, Exynos5433) with external wake-up interrupts, expected to have one interrupt for multiplexing these wake-up interrupts. Also they expected to have exactly one pin controller capable of external wake-up interrupts. It seems however that newer ARMv8 Exynos SoC like Exynos850 and ExynosAutov9 have differences: 1. No multiplexed external wake-up interrupt, only direct, 2. More than one pin controller capable of external wake-up interrupts. Use dedicated ExynosAutov9 compatible for its external wake-up interrupts controller to indicate the differences. Signed-off-by: Krzysztof Kozlowski <krzysztof.kozlowski@canonical.com> Reviewed-by: Sam Protsenko <semen.protsenko@linaro.org> Reviewed-by: Chanho Park <chanho61.park@samsung.com> Tested-by: Chanho Park <chanho61.park@samsung.com> Link: https://lore.kernel.org/r/20220111201722.327219-22-krzysztof.kozlowski@canonical.com
2022-01-23arm64: dts: exynos: align pinctrl with dtschema in ExynosAutov9Krzysztof Kozlowski1-25/+25
Align the pin controller related nodes with dtschema. No functional change expected. Signed-off-by: Krzysztof Kozlowski <krzysztof.kozlowski@canonical.com> Reviewed-by: Sam Protsenko <semen.protsenko@linaro.org> Reviewed-by: Chanho Park <chanho61.park@samsung.com> Tested-by: Chanho Park <chanho61.park@samsung.com> Link: https://lore.kernel.org/r/20220111201722.327219-14-krzysztof.kozlowski@canonical.com
2022-01-23arm64: dts: exynos: align pinctrl with dtschema in Exynos7Krzysztof Kozlowski2-91/+91
Align the pin controller related nodes with dtschema. No functional change expected. Signed-off-by: Krzysztof Kozlowski <krzysztof.kozlowski@canonical.com> Reviewed-by: Alim Akhtar <alim.akhtar@samsung.com> Link: https://lore.kernel.org/r/20220111201722.327219-12-krzysztof.kozlowski@canonical.com
2022-01-23arm64: dts: exynos: align pinctrl with dtschema in Exynos5433Krzysztof Kozlowski2-229/+241
Align the pin controller related nodes with dtschema. No functional change expected. The macros used to define pin configuration do not work well with node name suffix "-pin" or prefix "pin-", so level of indirection via second macro is needed. For similar reason pcie-wlanen has to stop using the macro. Signed-off-by: Krzysztof Kozlowski <krzysztof.kozlowski@canonical.com> Link: https://lore.kernel.org/r/20220111201722.327219-11-krzysztof.kozlowski@canonical.com
2022-01-10Merge tag 'dt-5.17' of git://git.kernel.org/pub/scm/linux/kernel/git/soc/socLinus Torvalds4-32/+56
Pull ARM SoC devicetree updates from Arnd Bergmann: "As usual, this is the bulk of the updates for the SoC tree, adding more devices to existing files, addressing issues from ever improving automated checking, and fixing minor issues. The most interesting bits as usual are the new platforms. All the newly supported SoCs belong into existing families this time: - Qualcomm gets support for two newly announced platforms, both of which can now work in production environments: the SDX65 5G modem that can run a minimal Linux on its Cortex-A7 core, and the Snapdragon 8 Gen 1, their latest high-end phone SoC. - Renesas adds support for R-Car S4-8, the most recent automotive Server/Communication SoC. - TI adds support for J721s2, a new automotive SoC in the K3 family. - Mediatek MT7986a/b is a SoC used in Wifi routers, the latest generation following their popular MT76xx series. Only basic support is added for now. - NXP i.MX8 ULP8 is a new low-power variant of the widespread i.MX8 series. - TI SPEAr320s is a minor variant of the old SPEAr320 SoC that we have supported for a long time. New boards with the existing SoCs include - Aspeed AST2500/AST2600 BMCs in TYAN, Facebook and Yadro servers - AT91/SAMA5 based evaluation board - NXP gains twenty new development and industrial boards for their i.MX and Layerscape SoCs - Intel IXP4xx now supports the final two machines in device tree that were previously only supported in old style board files. - Mediatek MT6589 is used in the Fairphone FP1 phone from 2013, while MT8183 is used in the Acer Chromebook 314. - Qualcomm gains support for the reference machines using the two new SoCs, plus a number of Chromebook variants and phones based on the Snapdragon 7c, 845 and 888 SoCs, including various Sony Xperia devices and the Microsoft Surface Duo 2. - ST STM32 now supports the Engicam i.Core STM32MP1 carrier board. - Tegra now boots various older Android devices based on 32-bit chips out of the box, including a number of ASUS Transformer tablets. There is also a new Jetson AGX Orin developer kit. - Apple support adds the missing device trees for all the remaining M1 Macbook and iMac variants, though not yet the M1 Pro/Max versions. - Allwinner now supports another version of the Tanix TX6 set-top box based on the H6 SoC. - Broadcom gains support for the Netgear RAXE500 Wireless router based on BCM4908" * tag 'dt-5.17' of git://git.kernel.org/pub/scm/linux/kernel/git/soc/soc: (574 commits) Revert "ARM: dts: BCM5301X: define RTL8365MB switch on Asus RT-AC88U" arm64: dts: qcom: sm6125: Avoid using missing SM6125_VDDCX arm64: dts: qcom: sm8450-qrd: Enable USB nodes arm64: dts: qcom: sm8450: Add usb nodes ARM: dts: aspeed: add LCLK setting into LPC KCS nodes dt-bindings: ipmi: bt-bmc: add 'clocks' as a required property ARM: dts: aspeed: add LCLK setting into LPC IBT node ARM: dts: aspeed: p10: Add TPM device ARM: dts: aspeed: p10: Enable USB host ports ARM: dts: aspeed: Add TYAN S8036 BMC machine ARM: dts: aspeed: tyan-s7106: Add uart_routing and fix vuart config ARM: dts: aspeed: Adding Facebook Bletchley BMC ARM: dts: aspeed: g220a: Enable secondary flash ARM: dts: Add openbmc-flash-layout-64-alt.dtsi ARM: dts: aspeed: Add secure boot controller node dt-bindings: aspeed: Add Secure Boot Controller bindings ARM: dts: Remove "spidev" nodes dt-bindings: pinctrl: samsung: Add pin drive definitions for Exynos850 dt-bindings: arm: samsung: Document E850-96 board binding dt-bindings: Add vendor prefix for WinLink ...
2021-12-15Merge branch 'for-v5.17/dt-usi' into next/dt64Krzysztof Kozlowski2-8/+32
2021-12-13arm64: dts: exynos: convert serial_0 to USI on ExynosAutov9Chanho Park2-8/+32
According to USI v2 driver change[1], serial_0 node should be converted to use the USI node hierarchy. syscon_peric0 will be used as a syscon node to control the USI00_USI_SW_CONF register. This also changes the serial node name from uart@ to serial@. [1]: https://lore.kernel.org/linux-samsung-soc/20211204195757.8600-2-semen.protsenko@linaro.org/ Cc: Sam Protsenko <semen.protsenko@linaro.org> Signed-off-by: Chanho Park <chanho61.park@samsung.com> Reviewed-by: Sam Protsenko <semen.protsenko@linaro.org> Link: https://lore.kernel.org/r/20211208091853.8557-1-chanho61.park@samsung.com Signed-off-by: Krzysztof Kozlowski <krzysztof.kozlowski@canonical.com>
generated by cgit v1.2.3 (git 2.39.0) at 2025-01-30 06:44:19 +0300