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2021-07-09Merge branch 'arm/fixes' into arm/socOlof Johansson1-0/+1
Merging in the last batch of fixes that didn't go in before previous release, just a few smaller DT fixups and a MAINTAINERS update * arm/fixes: (29 commits) MAINTAINERS: Add myself as TEE subsystem reviewer ARM: dts: ux500: Fix LED probing arm64: dts: rockchip: Update RK3399 PCI host bridge window to 32-bit address memory arm64: dts: allwinner: a64-sopine-baseboard: change RGMII mode to TXID arm64: meson: select COMMON_CLK soc: amlogic: meson-clk-measure: remove redundant dev_err call in meson_msr_probe() ARM: dts: qcom: sdx55-telit: Represent secure-regions as 64-bit elements ARM: dts: qcom: sdx55-t55: Represent secure-regions as 64-bit elements ARM: dts: sun8i: h3: orangepi-plus: Fix ethernet phy-mode ARM: dts: imx: emcon-avari: Fix nxp,pca8574 #gpio-cells ARM: dts: imx7d-pico: Fix the 'tuning-step' property ARM: dts: imx7d-meerkat96: Fix the 'tuning-step' property arm64: dts: freescale: sl28: var1: fix RGMII clock and voltage arm64: dts: freescale: sl28: var4: fix RGMII clock and voltage ARM: imx: pm-imx27: Include "common.h" arm64: dts: zii-ultra: fix 12V_MAIN voltage arm64: dts: zii-ultra: remove second GEN_3V3 regulator instance arm64: dts: ls1028a: fix memory node optee: use export_uuid() to copy client UUID arm64: dts: ti: k3*: Introduce reg definition for interrupt routers ...
2021-05-31arm64: meson: select COMMON_CLKJerome Brunet1-0/+1
This fix the recent removal of clock drivers selection. While it is not necessary to select the clock drivers themselves, we need to select a proper implementation of the clock API, which for the meson, is CCF Fixes: ba66a25536dd ("arm64: meson: ship only the necessary clock controllers") Reviewed-by: Neil Armstrong <narmstrong@baylibre.com> Signed-off-by: Jerome Brunet <jbrunet@baylibre.com> Reviewed-by: Martin Blumenstingl <martin.blumenstingl@googlemail.com> Signed-off-by: Kevin Hilman <khilman@baylibre.com> Signed-off-by: Neil Armstrong <narmstrong@baylibre.com> Link: https://lore.kernel.org/r/20210429083823.59546-1-jbrunet@baylibre.com
2021-05-10arm64: sunxi: Build the sun4i timer driverSamuel Holland1-0/+1
While the ARM architectural timer is generatlly the best timer to use, a non-c3stop timer is needed for cpuidle. Build the "sun4i" timer driver so it can be used for this purpose. It is present on all 64-bit sunxi SoCs. Signed-off-by: Samuel Holland <samuel@sholland.org> Acked-by: Daniel Lezcano <daniel.lezcano@linaro.org> Signed-off-by: Maxime Ripard <maxime@cerno.tech> Link: https://lore.kernel.org/r/20210322044707.19479-6-samuel@sholland.org
2021-04-30Merge tag 'pinctrl-v5.13-1' of ↵Linus Torvalds1-2/+0
git://git.kernel.org/pub/scm/linux/kernel/git/linusw/linux-pinctrl Pull pin control updates from Linus Walleij: "There is a lot going on! Core changes: - A semantic change to handle pinmux and pinconf in explicit order while up until now we depended on the semantic order in the device tree. The device tree is a functional programming language and does not imply any order, so the right thing is for the pin control core to provide these semantics. - Add a new pinmux-select debugfs file which makes it possible to go in and select functions for a pin manually (iteratively, at the prompt) for debugging purposes. - Fixes to gpio regmap handling for a new pin control driver making use of regmap-gpio. - Use octal permissions on debugfs files. New drivers: - A massive rewrite of the former custom pin control driver for MIPS Broadcom devices to instead use the pin control subsystem. New pin control drivers for BCM6345, BCM6328, BCM6358, BCM6362, BCM6368, BCM63268 and BCM6318 SoC variants are implemented. - Support for PM8350, PM8350B, PM8350C, PMK8350, PMR735A and PMR735B in the Qualcomm PMIC GPIO driver. Also the two GPIOs on PM8008 are supported. - Support for the Rockchip RK3568/RK3566 pin controller. - Support for Ingenic JZ4730, JZ4750, JZ4755, JZ4775 and X2000. - Support for Mediatek MTK8195. - Add a new Xilinx ZynqMP pin control driver. Driver improvements and non-urgent fixes: - Modularization and improvements of the Rockchip drivers. - Some new pins added to the description of new Renesas SoCs. - Clarifications of the GPIO base calculation in the Intel driver. - Fix the function names for the MPP54 and MPP55 pins in the Armada CP110 pin controller. - GPIO wakeup interrupt map for Qualcomm SC7280 and SM8350. - Support for ACPI probing of the Qualcomm SC8180x. - Fix interrupt clear status on rockchip - Fix some missing pins on the Ingenic JZ4770, some semantic fixes for the behaviour of the Ingenic pin controller. Add DMIC pins for JZ4780, X1000, X1500 and X1830. - A slew of janitorial like of_node_put() calls" * tag 'pinctrl-v5.13-1' of git://git.kernel.org/pub/scm/linux/kernel/git/linusw/linux-pinctrl: (99 commits) pinctrl: Add Xilinx ZynqMP pinctrl driver support firmware: xilinx: Add pinctrl support pinctrl: rockchip: do coding style for mux route struct pinctrl: Add PIN_CONFIG_MODE_PWM to enum pin_config_param pinctrl: Introduce MODE group in enum pin_config_param pinctrl: Keep enum pin_config_param ordered by name dt-bindings: pinctrl: Add binding for ZynqMP pinctrl driver pinctrl: core: Fix kernel doc string for pin_get_name() pinctrl: mediatek: use spin lock in mtk_rmw pinctrl: add drive for I2C related pins on MT8195 pinctrl: add pinctrl driver on mt8195 dt-bindings: pinctrl: mt8195: add pinctrl file and binding document pinctrl: Ingenic: Add pinctrl driver for X2000. pinctrl: Ingenic: Add pinctrl driver for JZ4775. pinctrl: Ingenic: Add pinctrl driver for JZ4755. pinctrl: Ingenic: Add pinctrl driver for JZ4750. pinctrl: Ingenic: Add pinctrl driver for JZ4730. dt-bindings: pinctrl: Add bindings for new Ingenic SoCs. pinctrl: Ingenic: Reformat the code. pinctrl: Ingenic: Add DMIC pins support for Ingenic SoCs. ...
2021-04-26Merge tag 'arm-apple-m1-5.13' of ↵Linus Torvalds1-0/+7
git://git.kernel.org/pub/scm/linux/kernel/git/soc/soc Pull ARM Apple M1 platform support from Arnd Bergmann: "The Apple M1 is the processor used it all current generation Apple Macintosh computers. Support for this platform so far is rudimentary, but it boots and can use framebuffer and serial console over a special USB cable. Support for several essential on-chip devices (USB, PCIe, IOMMU, NVMe) is work in progress but was not ready in time. A very detailed description of what works is in the commit message of commit 1bb2fd3880d4 ("Merge tag 'm1-soc-bringup-v5' [..]") and on the AsahiLinux wiki" Link: https://lore.kernel.org/linux-arm-kernel/bdb18e9f-fcd7-1e31-2224-19c0e5090706@marcan.st/ * tag 'arm-apple-m1-5.13' of git://git.kernel.org/pub/scm/linux/kernel/git/soc/soc: asm-generic/io.h: Unbork ioremap_np() declaration arm64: apple: Add initial Apple Mac mini (M1, 2020) devicetree dt-bindings: display: Add apple,simple-framebuffer arm64: Kconfig: Introduce CONFIG_ARCH_APPLE irqchip/apple-aic: Add support for the Apple Interrupt Controller dt-bindings: interrupt-controller: Add DT bindings for apple-aic arm64: Move ICH_ sysreg bits from arm-gic-v3.h to sysreg.h of/address: Add infrastructure to declare MMIO as non-posted asm-generic/io.h: implement pci_remap_cfgspace using ioremap_np arm64: Implement ioremap_np() to map MMIO as nGnRnE docs: driver-api: device-io: Document ioremap() variants & access funcs docs: driver-api: device-io: Document I/O access functions asm-generic/io.h: Add a non-posted variant of ioremap() arm64: arch_timer: Implement support for interrupt-names dt-bindings: timer: arm,arch_timer: Add interrupt-names support arm64: cputype: Add CPU implementor & types for the Apple M1 cores dt-bindings: arm: cpus: Add apple,firestorm & icestorm compatibles dt-bindings: arm: apple: Add bindings for Apple ARM platforms dt-bindings: vendor-prefixes: Add apple prefix
2021-04-08arm64: Kconfig: Introduce CONFIG_ARCH_APPLEHector Martin1-0/+7
This adds a Kconfig option to toggle support for Apple ARM SoCs. At this time this targets the M1 and later "Apple Silicon" Mac SoCs. Signed-off-by: Hector Martin <marcan@marcan.st>
2021-03-23arm64: socfpga: merge Agilex and N5X into ARCH_INTEL_SOCFPGAKrzysztof Kozlowski1-17/+4
Agilex, N5X and Stratix 10 share all quite similar arm64 hard cores and SoC-part. Up to a point that N5X uses the same DTSI as Agilex. From the Linux kernel point of view these are flavors of the same architecture so there is no need for three top-level arm64 architectures. Simplify this by merging all three architectures into ARCH_INTEL_SOCFPGA and dropping the other ARCH* arm64 Kconfig entries. The side effect is that the INTEL_STRATIX10_SERVICE will now be available for both 32-bit and 64-bit Intel SoCFPGA, even though it is used only for 64-bit. Signed-off-by: Krzysztof Kozlowski <krzysztof.kozlowski@canonical.com> Signed-off-by: Dinh Nguyen <dinguyen@kernel.org>
2021-03-23ARM: socfpga: introduce common ARCH_INTEL_SOCFPGAKrzysztof Kozlowski1-0/+4
Simplify 32-bit and 64-bit Intel SoCFPGA Kconfig options by having only one for both of them. This the common practice for other platforms. Additionally, the ARCH_SOCFPGA is too generic as SoCFPGA designs come from multiple vendors. Signed-off-by: Krzysztof Kozlowski <krzysztof.kozlowski@canonical.com> Signed-off-by: Dinh Nguyen <dinguyen@kernel.org>
2021-03-15arm64: remove select PINCTRL_ROCKCHIP from ARCH_ROCKCHIPJianqun Xu1-2/+0
Prepare to make pinctrl driver of rockchip to be module able, this patch remove the select of PINCTRL_ROCKCHIP from ARCH_ROCKCHIP. Signed-off-by: Jianqun Xu <jay.xu@rock-chips.com> Link: https://lore.kernel.org/r/20210305003907.1692515-2-jay.xu@rock-chips.com Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
2021-02-21Merge tag 'irq-core-2021-02-15' of ↵Linus Torvalds1-0/+2
git://git.kernel.org/pub/scm/linux/kernel/git/tip/tip Pull irq updates from Thomas Gleixner: "Updates for the irq subsystem: - The usual new irq chip driver (Realtek RTL83xx) - Removal of sirfsoc and tango irq chip drivers - Conversion of the sun6i chip support to hierarchical irq domains - The usual fixes, improvements and cleanups all over the place" * tag 'irq-core-2021-02-15' of git://git.kernel.org/pub/scm/linux/kernel/git/tip/tip: irqchip/imx: IMX_INTMUX should not default to y, unconditionally irqchip/loongson-pch-msi: Use bitmap_zalloc() to allocate bitmap irqchip/csky-mpintc: Prevent selection on unsupported platforms irqchip: Add support for Realtek RTL838x/RTL839x interrupt controller dt-bindings: interrupt-controller: Add Realtek RTL838x/RTL839x support irqchip/ls-extirq: add IRQCHIP_SKIP_SET_WAKE to the irqchip flags genirq: Use new tasklet API for resend_tasklet dt-bindings: qcom,pdc: Add compatible for SM8350 dt-bindings: qcom,pdc: Add compatible for SM8250 irqchip/sun6i-r: Add wakeup support irqchip/sun6i-r: Use a stacked irqchip driver dt-bindings: irq: sun6i-r: Add a compatible for the H3 dt-bindings: irq: sun6i-r: Split the binding from sun7i-nmi irqchip/gic-v3: Fix typos in PMR/RPR SCR_EL3.FIQ handling explanation irqchip: Remove sirfsoc driver irqchip: Remove sigma tango driver
2021-02-21Merge tag 'arm-dt-v5.12' of ↵Linus Torvalds1-0/+5
git://git.kernel.org/pub/scm/linux/kernel/git/soc/soc Pull ARM SoC devicetree updates from Arnd Bergmann: "After the last release contained a surprising amount of new 32-bit machines, this time two thirds of the code changes are for 64-bit. The usual updates to existing files include: - Device tree compiler warning fixes for Berlin, Renesas, SoCFPGA, nomadik, stm32, Allwinner, TI Keystone - Support for additional devices on existing machines on Renesas, SoCFPGA, at91, hisilicon, OMAP, Tegra, TI K3, Allwinner, Broadcom, ux500, Mediatek, Marvell Armada, Marvell MMP, ZynqMP, AMLogic, Qualcomm, i.MX, Layerscape, Actions, ASpeed, Toshiba - Cleanups and minor fixes for Renesas, at91, mstar, ux500, Samsung, stm32, Tegra, Broadcom, Mediatek, Marvell MMP, AMLogic, Qualcomm, i.MX, Rockchip, ASpeed, Zynq Only three new SoCs this time, but a number of boards across: Renesas: - Two Beacon EmbeddedWorks boards (RZ/G2H and RZ/G2N based) Intel SoCFPGA: - eASIC N5X board (N5X) ST-Ericsson Ux500: - Samsung GT-I9070 (Janice) phone (u8500) TI OMAP: - MYIR Tech Limited development board (AM335X) Allwinner/sunxi: - SL631 Action Camera (V3) - PineTab Early Adopter tablet (A64) Broadcom: - BCM4906 networking chip - Netgear R8000P router (BCM4906) AMLogic: - Hardkernel ODROID-HC4 development board (SM1) - Beelink GS-King-X TV Box (S922X) Qualcomm: - Snapdragon 888 / SM8350 high-end phone SoC - Qualcomm SDX55 5G modem as standalone SoC - Snapdragon MTP reference board (SM8350) - Snapdragon MTP reference board (SDX55) - Sony Kitakami phones: Xperia Z3+/Z4/Z5 (APQ8094) - Alcatel Idol 3 phone (MSM8916) - ASUS Zenfone 2 Laser phone (MSM8916) - BQ Aquaris X5 aka Longcheer L8910 phone (MSM8916) - OnePlus6 phone (SDM845) - OnePlus6T phone (SDM845) - Alfa Network AP120C-AC access point (IPQ4018) NXP i.MX6 (32-bit): - Plymovent BAS base system controller for filter systems (imx6dl) - Protonic MVT industrial touchscreen terminals (imx6dl) - Protonic PRTI6G reference board (imx6ul) - Kverneland UT1, UT1Q, UT1P, TGO agricultural terminals (imx6q/dl/qp) NXP i.MX8 (64-bit) - Beacon i.MX8M Nano development kit (imx8mn) - Boundary Devices i.MX8MM Nitrogen SBC (imx8mm) - Gateworks Venice i.MX 8M Mini Development Kits (imx8mm) - phyBOARD-Pollux-i.MX8MP (imx8mp) - Purism Librem5 Evergreen phone (imx8mp) - Kontron SMARC-sAL28 system-on-module(imx8mp) Rockchip: - NanoPi M4B Single-board computer (RK3399) - Radxa Rock Pi E router SBC (RK3328) ASpeed: - Ampere Mt. Jade, a BMC for an x86 server (AST2500) - IBM Everest, a BMC for a Power10 server (AST2600) - Supermicro x11spi, a BMC for an ARM server (AST2500) Zynq: - Ebang EBAZ4205, FPGA board (Zynq-7000) - ZynqMP zcu104 revC reference platform (ZynqMP)" * tag 'arm-dt-v5.12' of git://git.kernel.org/pub/scm/linux/kernel/git/soc/soc: (584 commits) ARM: dts: aspeed: align GPIO hog names with dtschema ARM: dts: aspeed: fix PCA95xx GPIO expander properties on Portwell dt-bindings: spi: zynq: Convert Zynq QSPI binding to yaml arm: dts: visconti: Add DT support for Toshiba Visconti5 GPIO driver ARM: dts: aspeed: ast2600evb: Add enable ehci and uhci ARM: dts: aspeed: mowgli: Add i2c rtc device ARM: dts: aspeed: amd-ethanolx: Enable secondary LPC snooping address dt-bindings: arm: xilinx: Add missing Zturn boards ARM: dts: ebaz4205: add pinctrl entries for switches ARM: dts: add Ebang EBAZ4205 device tree dt-bindings: arm: add Ebang EBAZ4205 board dt-bindings: add ebang vendor prefix ARM: dts: aspeed: Add Everest BMC machine ARM: dts: aspeed: inspur-fp5280g2: Add ipsps1 driver ARM: dts: aspeed: inspur-fp5280g2: Add GPIO line names ARM: dts: aspeed: Add Supermicro x11spi BMC machine ARM: dts: aspeed: g220a: Fix some gpio ARM: dts: aspeed: g220a: Enable ipmb ARM: dts: aspeed: rainier: Add eMMC clock phase compensation ARM: dts: aspeed: Add LCLK to lpc-snoop ...
2021-02-21Merge tag 'arm-soc-v5.12' of ↵Linus Torvalds1-0/+1
git://git.kernel.org/pub/scm/linux/kernel/git/soc/soc Pull ARM SoC updates from Arnd Bergmann: "This is mostly 32-bit code for SoC platforms, and looks smaller than any such branch I remember from previous kernels, as most of this is now handled in other subsystems for modern platforms: - Minor bugfixes and Kconfig updates for Tegra, Broadcom, i.MX, Renesas, and Samsung - Updates to the MAINTAINERS listing for Actions, OMAP, and Samsung - Samsung SoC driver updates to make them loadable modules" * tag 'arm-soc-v5.12' of git://git.kernel.org/pub/scm/linux/kernel/git/soc/soc: MAINTAINERS: arm: samsung: include S3C headers in platform entry MAINTAINERS: Add linux-actions ML for Actions Semi Arch ARM: s3c: irq-s3c24xx: staticize local functions ARM: s3c: irq-s3c24xx: include headers for missing declarations ARM: s3c: fix fiq for clang IAS ARM: imx: Remove unused IMX_GPIO_NR() macro soc: renesas: rcar-sysc: Mark device node OF_POPULATED after init ARM: OMAP2+: fix spellint typo MAINTAINERS: Update address for OMAP GPMC driver soc: renesas: rcar-sysc: Use readl_poll_timeout_atomic() ARM: bcm: Select BRCMSTB_L2_IRQ for bcm2835 ARM: brcmstb: Add debug UART entry for 72116 ARM: tegra: Don't enable unused PLLs on resume from suspend soc: samsung: pm_domains: Convert to regular platform driver soc: samsung: exynos-chipid: correct helpers __init annotation ARM: mach-imx: imx6ul: Print SOC revision on boot ARM: imx: mach-imx6ul: remove 14x14 EVK specific PHY fixup soc: samsung: exynos-chipid: convert to driver and merge exynos-asv soc: samsung: exynos-asv: handle reading revision register error soc: samsung: exynos-asv: don't defer early on not-supported SoCs
2021-01-25ARM: bcm: Select BRCMSTB_L2_IRQ for bcm2835Maxime Ripard1-0/+1
The BCM2711 has a number of instances of interrupt controllers handled by the driver behind the BRCMSTB_L2_IRQ Kconfig option (irq-brcmstb-l2). Let's select that driver as part of the ARCH_BCM2835 Kconfig option. Signed-off-by: Maxime Ripard <maxime@cerno.tech> Signed-off-by: Nicolas Saenz Julienne <nsaenzjulienne@suse.de> Link: https://lore.kernel.org/r/20210111142309.193441-1-maxime@cerno.tech
2021-01-21irqchip/sun6i-r: Use a stacked irqchip driverSamuel Holland1-0/+2
The R_INTC in the A31 and newer sun8i/sun50i SoCs is more similar to the original sun4i interrupt controller than the sun7i/sun9i NMI controller. It is used for two distinct purposes: - To control the trigger, latch, and mask for the NMI input pin - To provide the interrupt input for the ARISC coprocessor As this interrupt controller is not documented, information about it comes from vendor-provided firmware blobs and from experimentation. Differences from the sun4i interrupt controller appear to be: - It only has one or two registers of each kind (max 32 or 64 IRQs) - Multiplexing logic is added to support additional inputs - There is no FIQ-related logic - There is no interrupt priority logic In order to fulfill its two purposes, this hardware block combines four types of IRQs. First, the NMI pin is routed to the "IRQ 0" input on this chip, with a trigger type controlled by the NMI_CTRL_REG. The "IRQ 0 pending" output from this chip, if enabled, is then routed to a SPI IRQ input on the GIC. In other words, bit 0 of IRQ_ENABLE_REG *does* affect the NMI IRQ seen at the GIC. The NMI is followed by a contiguous block of 15 "direct" (my name for them) IRQ inputs that are connected in parallel to both R_INTC and the GIC. Or in other words, these bits of IRQ_ENABLE_REG *do not* affect the IRQs seen at the GIC. Following the direct IRQs are the ARISC's copy of banked IRQs for shared peripherals. These are not relevant to Linux. The remaining IRQs are connected to a multiplexer and provide access to the first (up to) 128 SPIs from the ARISC. This range of SPIs overlaps with the direct IRQs. Because of the 1:1 correspondence between R_INTC and GIC inputs, this is a perfect scenario for using a stacked irqchip driver. We want to hook into setting the NMI trigger type, but not actually handle any IRQ here. To allow access to all multiplexed IRQs, this driver requires a new binding where the interrupt number matches the GIC interrupt number. (This moves the NMI from number 0 to 32 or 96, depending on the SoC.) For simplicity, copy the three-cell GIC binding; this disambiguates interrupt 0 in the old binding (the NMI) from interrupt 0 in the new binding (SPI 0) by the number of cells. Since R_INTC is in the always-on power domain, and its output is visible to the power management coprocessor, a stacked irqchip driver provides a simple way to add wakeup support to any of its IRQs. That is the next patch; for now, just the NMI is moved over. This commit mostly reverts commit 173bda53b340 ("irqchip/sunxi-nmi: Support sun6i-a31-r-intc compatible"). Acked-by: Maxime Ripard <mripard@kernel.org> Signed-off-by: Samuel Holland <samuel@sholland.org> Signed-off-by: Marc Zyngier <maz@kernel.org> Link: https://lore.kernel.org/r/20210118055040.21910-4-samuel@sholland.org
2021-01-20ARM: remove zte zx platformArnd Bergmann1-6/+0
The ZTE ZX set-top-box SoC platform was added in 2015 by Jun Nie, with Baoyou Xie and Shawn Guo subsequently becoming maintainers after the addition of the 64-bit variant. However, the only machines that were ever supported upstream are the reference designs, not actual set-top-box devices that would benefit from this support. All ZTE set-top-boxes from the past few years seem to be based on third-party SoCs. While there is very little information about zx296702 and zx296718 on the web, I found some references to other chips from the same family, such as zx296716 and zx296719, which were never submitted for upstream support. Finally, there is no support for the GPU on either of them, with the lima and panfrost device drivers having been added after work on the zx platform had stopped. Shawn confirmed that he has not seen any interest in this platform for the past four years, and that it can be removed. Thanks to Jun and Shawn for maintaining this platform over the past five years. Cc: Jun Nie <jun.nie@linaro.org> Cc: Shawn Guo <shawnguo@kernel.org> Signed-off-by: Arnd Bergmann <arnd@arndb.de>
2021-01-05arm64: dts: n5x: Add support for Intel's eASIC N5X platformDinh Nguyen1-0/+5
The Intel eASIC N5X platform shares the same register map as the Agilex platform, thus, we can re-use the socfpga_agilex.dtsi as the base DTSI. Signed-off-by: Dinh Nguyen <dinguyen@kernel.org>
2020-12-17Merge tag 'arm-soc-dt-5.11' of ↵Linus Torvalds1-0/+8
git://git.kernel.org/pub/scm/linux/kernel/git/soc/soc Pull ARM device tree updates from Arnd Bergmann: "Across all platforms, there is a continued move towards DT schema for validating the dts files. As a result there are bug fixes for mistakes that are found using these schema, in addition to warnings from the dtc compiler. As usual, many changes are for adding support for additional on-chip and on-board components in the machines we already support. The newly supported SoCs for this release are: - MStar Infinity2M, a low-end IP camera chip based on a dual-core Cortex-A7, otherwise similar to the Infinity chip we already support. This is also known as the SigmaStar SSD202D, and we add support for the Honestar ssd201htv2 development kit. - Nuvoton NPCM730, a Cortex-A9 based Baseboard Management Controller (BMC), in the same family as the NPCM750. This gets used in the Ampere Altra based "Fii Kudo" server and the Quanta GSJ, both of which are added as well. - Broadcom BCM4908, a 64-bit home router chip based on Broadcom's own Brahma-B53 CPU. Support is also added for the Asus ROG Rapture GT-AC5300 high-end WiFi router based on this chip. - Mediatek MT8192 is a new SoC based on eight Cortex-A76/A55 cores, meant for faster Chromebooks and tablets. It gets added along with its reference design. - Mediatek MT6779 (Helio P90) is a high-end phone chip from last year's generation, also added along with its reference board. This one is still based on Cortex-A75/A55. - Mediatek MT8167 is a version of the already supported MT8516 chip, both based on Cortex-A35. It gets added along with the "Pumpkin" single board computer, but is likely to also make its way into low-end tablets in the future. For the already supported chips, there are a number of new boards. Interestingly there are more 32-bit machines added this time than 64-bit. Here is a brief list of the new boards: - Three new Mikrotik router variants based on Marvell Prestera 98DX3236, a close relative of the more common Armada XP - A reference board for the Marvell Armada 382 - Three new servers using ASpeed baseboard management controllers, the actual machines being from Bytedance, Facebook and IBM, and one machine using the Nuvoton NPCM750 BMC. - The Galaxy Note 10.1 (P4) tablet, using an Exynos 4412. - The usual set of 32-bit i.MX industrial/embedded hardware: * Protonic WD3 (tractor e-cockpit) * Kamstrup OMNIA Flex Concentrator (smart grid platform) * Van der Laan LANMCU (food storage) * Altesco I6P (vehicle inspection stations) * PHYTEC phyBOARD-Segin/phyCORE-i.MX6UL baseboard - DH electronics STM32MP157C DHCOM, a PicoITX carrier board for the aleady supported DHCOM module - Three new Allwinner SoC based single-board computers: * NanoPi R1 (H3 based) * FriendlyArm ZeroPi (H3 based) * Elimo Initium SBC (S3 based) - Ouya Game Console based on Nvidia Tegra 3 - Version 5 of the already supported Zynq Z-Turn MYIR Board - LX2162AQDS, a reference platform for NXP Layerscape LX2162A, which is a repackaged 16-core LX2160A - A series of Kontron i.MX8M Mini baseboard/SoM versions - Espressobin Ultra, a new variant of the popular Armada 3700 based board, - IEI Puzzle-M801, a rackmount network appliance based on Marvell Armada 8040 - Microsoft Lumia 950 XL, a phone - HDK855 and HDK865 Hardware development kits for Qualcomm sm8250 and sm8150, respectively - Three new board variants of the "Trogdor" Chromebook (sc7180) - New board variants of the Renesas based "Kingfisher" and "HiHope" reference boards - Kobol Helios64, an open source NAS appliance based on Rockchips RK3399 - Engicam PX30.Core, a SoM based on Rockchip PX30, along with a few carrier boards" * tag 'arm-soc-dt-5.11' of git://git.kernel.org/pub/scm/linux/kernel/git/soc/soc: (679 commits) arm64: dts: sparx5: Add SGPIO devices arm64: dts: sparx5: Add reset support dt-bindings: gpio: Add a binding header for the MSC313 GPIO driver ARM: mstar: SMP support ARM: mstar: Wire up smpctrl for SSD201/SSD202D ARM: mstar: Add smp ctrl registers to infinity2m dtsi ARM: mstar: Add dts for Honestar ssd201htv2 ARM: mstar: Add chip level dtsi for SSD202D ARM: mstar: Add common dtsi for SSD201/SSD202D ARM: mstar: Add infinity2m support dt-bindings: mstar: Add Honestar SSD201_HT_V2 to mstar boards dt-bindings: vendor-prefixes: Add honestar vendor prefix dt-bindings: mstar: Add binding details for mstar,smpctrl ARM: mstar: Fill in GPIO controller properties for infinity ARM: mstar: Add gpio controller to MStar base dtsi ARM: zynq: Fix incorrect reference to XM013 instead of XM011 ARM: zynq: Convert at25 binding to new description on zc770-xm013 ARM: zynq: Fix OCM mapping to be aligned with binding on zc702 ARM: zynq: Fix leds subnode name for zc702/zybo-z7 ARM: zynq: Rename bus to be align with simple-bus yaml ...
2020-12-17Merge tag 'arm-soc-5.11' of ↵Linus Torvalds1-5/+0
git://git.kernel.org/pub/scm/linux/kernel/git/soc/soc Pull ARM SoC updates from Arnd Bergmann: "These are updates for SoC specific code, mostly in the 32-bit architecture: - A rework for handling MMIO accesses in Renesas SoCs in a more portable way - Updates to SoC version detection in NXP i.MX SoCs. - Smaller bug fixes for OMAP, Samsung, Marvell, Amlogic" * tag 'arm-soc-5.11' of git://git.kernel.org/pub/scm/linux/kernel/git/soc/soc: (24 commits) arm64: Kconfig: meson: drop pinctrl ARM: mxs: Add serial number support for i.MX23, i.MX28 SoCs MAINTAINERS: switch mvebu tree to kernel.org MAINTAINERS: Add an entry for MikroTik CRS3xx 98DX3236 boards ARM: shmobile: Stop using __raw_*() I/O accessors ARM: shmobile: sh73a0: Remove obsolete static mapping ARM: shmobile: sh73a0: Use ioremap() to map SMP registers ARM: shmobile: sh73a0: Use ioremap() to map L2C registers ARM: shmobile: r8a7779: Remove obsolete static mappings ARM: shmobile: r8a7779: Use ioremap() to map SMP registers ARM: shmobile: r8a7779: Use ioremap() to map INTC2 registers ARM: shmobile: r8a7778: Introduce HPBREG_BASE ARM: OMAP1: clock: Use IS_ERR_OR_NULL() to clean code ARM: OMAP2+: Remove redundant null check before clk_prepare_enable/clk_disable_unprepare ARM: OMAP2+: Remove redundant assignment to variable ret ARM: OMAP2+: Fix kfree NULL pointer in omap2xxx_clkt_vps_init ARM: OMAP2+: Fix memleak in omap2xxx_clkt_vps_init ARM: exynos: extend cpuidle support to P4 Note boards ARM: imx: mach-imx6q: correctly identify i.MX6QP SoCs ARM: imx: imx7ulp: Add a comment explaining the B2 silicon version ...
2020-12-16Merge tag 'asm-generic-timers-5.11' of ↵Linus Torvalds1-1/+0
git://git.kernel.org/pub/scm/linux/kernel/git/arnd/asm-generic Pull asm-generic cross-architecture timer cleanup from Arnd Bergmann: "This cleans up two ancient timer features that were never completed in the past, CONFIG_GENERIC_CLOCKEVENTS and CONFIG_ARCH_USES_GETTIMEOFFSET. There was only one user left for the ARCH_USES_GETTIMEOFFSET variant of clocksource implementations, the ARM EBSA110 platform. Rather than changing to use modern timekeeping, we remove the platform entirely as Russell no longer uses his machine and nobody else seems to have one any more. The conditional code for using arch_gettimeoffset() is removed as a result. For CONFIG_GENERIC_CLOCKEVENTS, there are still a couple of platforms not using clockevent drivers: parisc, ia64, most of m68k, and one Arm platform. These all do timer ticks slighly differently, and this gets cleaned up to the point they at least all call the same helper function. Instead of most platforms using 'select GENERIC_CLOCKEVENTS' in Kconfig, the polarity is now reversed, with the few remaining ones selecting LEGACY_TIMER_TICK instead" * tag 'asm-generic-timers-5.11' of git://git.kernel.org/pub/scm/linux/kernel/git/arnd/asm-generic: timekeeping: default GENERIC_CLOCKEVENTS to enabled timekeeping: remove xtime_update m68k: remove timer_interrupt() function m68k: change remaining timers to legacy_timer_tick m68k: m68328: use legacy_timer_tick() m68k: sun3/sun3c: use legacy_timer_tick m68k: split heartbeat out of timer function m68k: coldfire: use legacy_timer_tick() parisc: use legacy_timer_tick ARM: rpc: use legacy_timer_tick ia64: convert to legacy_timer_tick timekeeping: add CONFIG_LEGACY_TIMER_TICK timekeeping: remove arch_gettimeoffset net: remove am79c961a driver ARM: remove ebsa110 platform
2020-12-09arm64: Kconfig: meson: drop pinctrlKevin Hilman1-2/+0
Don't automatically select pinctrl drivers, leave it up to defaults in drivers/pinctrl/meson, which default to built-in, but are also now optionally configurable as modules as of commit 9c65441ec823 ("pinctrl/meson: enable building as modules") Signed-off-by: Kevin Hilman <khilman@baylibre.com> Reviewed-by: Jerome Brunet <jbrunet@baylibre.com> Link: https://lore.kernel.org/r/20201207230156.10198-1-khilman@baylibre.com' Signed-off-by: Arnd Bergmann <arnd@arndb.de>
2020-12-09Merge tag 'amlogic-soc' of ↵Arnd Bergmann1-3/+0
git://git.kernel.org/pub/scm/linux/kernel/git/khilman/linux-amlogic into arm/soc arm64: Kconfig.platform: amlogic updates for v5.11 - ship only the necessary clock controllers * tag 'amlogic-soc' of git://git.kernel.org/pub/scm/linux/kernel/git/khilman/linux-amlogic: arm64: meson: ship only the necessary clock controllers Link: https://lore.kernel.org/r/7hlfehjgv8.fsf@baylibre.com Signed-off-by: Arnd Bergmann <arnd@arndb.de>
2020-12-09Merge tag 'arm-soc/for-5.11/devicetree-arm64' of ↵Arnd Bergmann1-0/+8
https://github.com/Broadcom/stblinux into arm/dt This pull request contains Broadcom ARM64-based SoCs Device Tree changes for 5.11, please pull the following: - Rafal adds initial support for the Broadcom 4908 which are SoCs used in home routers and are based on the DSL architecture and using Broadcom Brahma-B53 CPUs. * tag 'arm-soc/for-5.11/devicetree-arm64' of https://github.com/Broadcom/stblinux: arm64: add config for Broadcom BCM4908 SoCs arm64: dts: broadcom: add BCM4908 and Asus GT-AC5300 early DTS files dt-bindings: arm: bcm: document BCM4908 bindings Link: https://lore.kernel.org/r/20201128163410.1691529-4-f.fainelli@gmail.com Signed-off-by: Arnd Bergmann <arnd@arndb.de>
2020-11-25arm64: add config for Broadcom BCM4908 SoCsRafał Miłecki1-0/+8
Add ARCH_BCM4908 config that can be used for compiling DTS files. Signed-off-by: Rafał Miłecki <rafal@milecki.pl> Signed-off-by: Florian Fainelli <f.fainelli@gmail.com>
2020-11-10arm64: meson: ship only the necessary clock controllersJerome Brunet1-3/+0
There now the menu entries for the amlogic clock controllers. Do not select these when ARM64 is enabled so it possible to ship only the required. Signed-off-by: Jerome Brunet <jbrunet@baylibre.com> Reviewed-by: Neil Armstrong <narmstrong@baylibre.com> Acked-by: Kevin Hilman <khilman@baylibre.com> Signed-off-by: Kevin Hilman <khilman@baylibre.com> Link: https://lore.kernel.org/r/20201020075034.172825-1-jbrunet@baylibre.com
2020-10-30timekeeping: default GENERIC_CLOCKEVENTS to enabledArnd Bergmann1-1/+0
Almost all machines use GENERIC_CLOCKEVENTS, so it feels wrong to require each one to select that symbol manually. Instead, enable it whenever CONFIG_LEGACY_TIMER_TICK is disabled as a simplification. It should be possible to select both GENERIC_CLOCKEVENTS and LEGACY_TIMER_TICK from an architecture now and decide at runtime between the two. For the clockevents arch-support.txt file, this means that additional architectures are marked as TODO when they have at least one machine that still uses LEGACY_TIMER_TICK, rather than being marked 'ok' when at least one machine has been converted. This means that both m68k and arm (for riscpc) revert to TODO. At this point, we could just always enable CONFIG_GENERIC_CLOCKEVENTS rather than leaving it off when not needed. I built an m68k defconfig kernel (using gcc-10.1.0) and found that this would add around 5.5KB in kernel image size: text data bss dec hex filename 3861936 1092236 196656 5150828 4e986c obj-m68k/vmlinux-no-clockevent 3866201 1093832 196184 5156217 4ead79 obj-m68k/vmlinux-clockevent On Arm (MACH_RPC), that difference appears to be twice as large, around 11KB on top of an 6MB vmlinux. Reviewed-by: Geert Uytterhoeven <geert@linux-m68k.org> Acked-by: Geert Uytterhoeven <geert@linux-m68k.org> Tested-by: Geert Uytterhoeven <geert@linux-m68k.org> Reviewed-by: Linus Walleij <linus.walleij@linaro.org> Signed-off-by: Arnd Bergmann <arnd@arndb.de>
2020-10-26arm64: berlin: Select DW_APB_TIMER_OFJisheng Zhang1-0/+1
Berlin SoCs always contain some DW APB timers which can be used as an always-on broadcast timer. Link: https://lore.kernel.org/r/20201009150536.214181fb@xhacker.debian Cc: <stable@vger.kernel.org> # v3.14+ Signed-off-by: Jisheng Zhang <Jisheng.Zhang@synaptics.com> Signed-off-by: Arnd Bergmann <arnd@arndb.de>
2020-10-24Merge tag 'armsoc-dt' of git://git.kernel.org/pub/scm/linux/kernel/git/soc/socLinus Torvalds1-0/+7
Pull ARM Devicetree updates from Olof Johansson: "As usual, most of the changes are to devicetrees. Besides smaller fixes, some refactorings and cleanups, some of the new platforms and chips (or significant features) supported are below: Broadcom boards: - Cisco Meraki MR32 (BCM53016-based) - BCM2711 (RPi4) display pipeline support Actions Semi boards: - Caninos Loucos Labrador SBC (S500-based) - RoseapplePi SBC (S500-based) Allwinner SoCs/boards: - A100 SoC with Perf1 board - Mali, DMA, Cetrus and IR support for R40 SoC Amlogic boards: - Libretch S905x CC V2 board - Hardkernel ODROID-N2+ board Aspeed boards/platforms: - Wistron Mowgli (AST2500-based, Power9 OpenPower server) - Facebook Wedge400 (AST2500-based, ToR switch) Hisilicon SoC: - SD5203 SoC Nvidia boards: - Tegra234 VDK, for pre-silicon Orin SoC NXP i.MX boards: - Librem 5 phone - i.MX8MM DDR4 EVK - Variscite VAR-SOM-MX8MN SoM - Symphony board - Tolino Shine 2 HD - TQMa6 SoM - Y Soft IOTA Orion Rockchip boards: - NanoPi R2S board - A95X-Z2 board - more Rock-Pi4 variants STM32 boards: - Odyssey SOM board (STM32MP157CAC-based) - DH DRC02 board Toshiba SoCs/boards: - Visconti SoC and TPMV7708 board" * tag 'armsoc-dt' of git://git.kernel.org/pub/scm/linux/kernel/git/soc/soc: (638 commits) ARM: dts: nspire: Fix SP804 users arm64: dts: lg: Fix SP804 users arm64: dts: lg: Fix SP805 clocks ARM: mstar: Fix up the fallout from moving the dts/dtsi files ARM: mstar: Add mstar prefix to all of the dtsi/dts files ARM: mstar: Add interrupt to pm_uart ARM: mstar: Add interrupt controller to base dtsi ARM: dts: meson8: remove two invalid interrupt lines from the GPU node arm64: dts: ti: k3-j7200-common-proc-board: Add USB support arm64: dts: ti: k3-j7200-common-proc-board: Configure the SERDES lane function arm64: dts: ti: k3-j7200-main: Add USB controller arm64: dts: ti: k3-j7200-main.dtsi: Add USB to SERDES lane MUX arm64: dts: ti: k3-j7200-main: Add SERDES lane control mux dt-bindings: ti-serdes-mux: Add defines for J7200 SoC ARM: dts: hisilicon: add SD5203 dts ARM: dts: hisilicon: fix the system controller compatible nodes arm64: dts: zynqmp: Fix leds subnode name for zcu100/ultra96 v1 arm64: dts: zynqmp: Remove undocumented u-boot properties arm64: dts: zynqmp: Remove additional compatible string for i2c IPs arm64: dts: zynqmp: Rename buses to be align with simple-bus yaml ...
2020-09-23arm64: visconti: Add initial support for Toshiba Visconti platformNobuhiro Iwamatsu1-0/+7
Add the initial device tree files for Toshiba Visconti platform. For starters, the only SoC supported will be Visconti5 TMPV7708. https://toshiba.semicon-storage.com/ap-en/semiconductor/product/image-recognition-processors-visconti.html Signed-off-by: Nobuhiro Iwamatsu <nobuhiro1.iwamatsu@toshiba.co.jp> Reviewed-by: Punit Agrawal <punit1.agrawal@toshiba.co.jp>
2020-08-19ARM: samsung: remove HAVE_S3C2410_WATCHDOG and use direct dependenciesKrzysztof Kozlowski1-1/+0
A separate Kconfig option HAVE_S3C2410_WATCHDOG for Samsung SoCs is not really needed and the s3c24xx watchdog driver can depend on Samsung ARM architectures instead. The "HAVE_xxx_WATCHDOG" pattern of dependency is not popular and Samsung platforms are here exceptions. All others just depend on CONFIG_ARCH_xxx. This makes the code slightly smaller without any change in functionality. Signed-off-by: Krzysztof Kozlowski <krzk@kernel.org> Acked-by: Guenter Roeck <linux@roeck-us.net>
2020-08-04Merge tag 'arm-newsoc-5.9' of ↵Linus Torvalds1-0/+19
git://git.kernel.org/pub/scm/linux/kernel/git/soc/soc Pull new ARM SoC support from Arnd Bergmann: "There are three SoC families newly dded to the 32-bit and 64-bit Arm architecture code in the kernel this time: - Daniel Palmer adds initial support for two chips made by MStar, a taiwanese SoC manufacturer that became part of Mediatek in 2012. For now, the added support is fairly minimal, with just two of its Cortex-A7 based 32-bit camera chips getting support for a limited set of on-chip peripherals. - Lars Povlsen from Microchip adds support for their new Sparx5 family of ethernet switch chips using 64-bit Cortex-A53 cores. These are descended from earlier VSC7xxx SparX and Ocelot chips using 32-bit MIPS cores. - Daniele Alessandrelli from Intel adds support for the new Keem Bay SoC for computer vision, built around a Movidius VPU with Linux running on Arm Cortex-A53 cores" * tag 'arm-newsoc-5.9' of git://git.kernel.org/pub/scm/linux/kernel/git/soc/soc: (38 commits) ARM: mstar: Correct the compatible string for pmsleep dt-bindings: arm: mstar: remove the binding description for mstar,pmsleep dt-bindings: mfd: syscon: add compatible string for mstar,msc313-pmsleep ARM: mstar: Add reboot support ARM: mstar: Add "pmsleep" node to base dtsi ARM: mstar: Add PMU ARM: mstar: Adjust IMI size for infinity3 ARM: mstar: Adjust IMI size for mercury5 ARM: mstar: Adjust IMI size of infinity ARM: mstar: Add IMI SRAM region dt-bindings: arm: mstar: Move existing MStar binding descriptions dt-bindings: arm: mstar: Add binding details for mstar, pmsleep ARM: mstar: Fix dts filename for 70mai midrive d08 ARM: mstar: Add dts for 70mai midrive d08 ARM: mstar: Add dts for msc313(e) based BreadBee boards ARM: mstar: Add mercury5 series dtsis ARM: mstar: Add infinity/infinity3 family dtsis ARM: mstar: Add Armv7 base dtsi ARM: mstar: Add binding details for mstar,l3bridge ARM: mstar: Add machine for MStar/Sigmastar Armv7 SoCs ...
2020-07-22arm64: sparx5: Add support for Microchip 2xA53 SoCLars Povlsen1-0/+14
This adds support for the Microchip Sparx5 ARMv8-based SoC family of TSN-capable gigabit switches. Link: https://lore.kernel.org/r/20200615133242.24911-3-lars.povlsen@microchip.com Reviewed-by: Alexandre Belloni <alexandre.belloni@bootlin.com> Signed-off-by: Lars Povlsen <lars.povlsen@microchip.com> Signed-off-by: Arnd Bergmann <arnd@arndb.de>
2020-07-17arm64: Add config for Keem Bay SoCDaniele Alessandrelli1-0/+5
Add ARCH_KEEMBAY configuration option to support Intel Movidius SoC code-named Keem Bay. Link: https://lore.kernel.org/r/20200717090414.313530-2-daniele.alessandrelli@linux.intel.com Reviewed-by: Dinh Nguyen <dinguyen@kernel.org> Signed-off-by: Daniele Alessandrelli <daniele.alessandrelli@intel.com> Signed-off-by: Arnd Bergmann <arnd@arndb.de>
2020-07-17arm64: arch_k3: enable chipid driverGrygorii Strashko1-0/+1
Select TI chip id driver for TI's SoCs based on K3 architecture to provide this information to user space and Kernel as it is required by other drivers to determine SoC revision to function properly. Signed-off-by: Grygorii Strashko <grygorii.strashko@ti.com> Reviewed-by: Lokesh Vutla <lokeshvutla@ti.com> Reviewed-by: Peter Ujfalusi <peter.ujfalusi@ti.com> Tested-by: Peter Ujfalusi <peter.ujfalusi@ti.com> Signed-off-by: Tero Kristo <t-kristo@ti.com>
2020-06-10Merge tag 'clk-for-linus' of ↵Linus Torvalds1-1/+0
git://git.kernel.org/pub/scm/linux/kernel/git/clk/linux Pull clk updates from Stephen Boyd: "This time around we have four lines of diff in the core framework, removing a function that isn't used anymore. Otherwise the main new thing for the common clk framework is that it is selectable in the Kconfig language now. Hopefully this will let clk drivers and clk consumers be testable on more than the architectures that support the clk framework. The goal is to introduce some Kunit tests for the framework. Outside of the core framework we have the usual set of various driver updates and non-critical fixes. The dirstat shows that the new Baikal-T1 driver is the largest addition this time around in terms of lines of code. After that the x86 (Intel), Qualcomm, and Mediatek drivers introduce many lines to support new or upcoming SoCs. After that the dirstat shows the usual suspects working on their SoC support by fixing minor bugs, correcting data and converting some of their DT bindings to YAML. Core: - Allow the COMMON_CLK config to be selectable New Drivers: - Clk driver for Baikal-T1 SoCs - Mediatek MT6765 clock support - Support for Intel Agilex clks - Add support for X1830 and X1000 Ingenic SoC clk controllers - Add support for the new Renesas RZ/G1H (R8A7742) SoC - Add support for Qualcomm's MSM8939 Generic Clock Controller Updates: - Support IDT VersaClock 5P49V5925 - Bunch of updates for HSDK clock generation unit (CGU) driver - Start making audio and GPU clks work on Marvell MMP2/MMP3 SoCs - Add some GPU, NPU, and UFS clks to Qualcomm SM8150 driver - Enable supply regulators for GPU gdscs on Qualcomm SoCs - Add support for Si5342, Si5344 and Si5345 chips - Support custom flags in Xilinx zynq firmware - Various small fixes to the Xilinx clk driver - A single minor rounding fix for the legacy Allwinner clock support - A few patches from Abel Vesa as preparation of adding audiomix clock support on i.MX - A couple of cleanups from Anson Huang for i.MX clk-sscg-pll and clk-pllv3 drivers - Drop dependency on ARM64 for i.MX8M clock driver, to support aarch32 mode on aarch64 hardware - A series from Peng Fan to improve i.MX8M clock drivers, using composite clock for core and bus clk slice - Set a better parent clock for flexcan on i.MX6UL to support CiA102 defined bit rates - A couple changes for EMC frequency scaling on Tegra210 - Support for CPU frequency scaling on Tegra20/Tegra30 - New clk gate for CSI test pattern generator on Tegra210 - Regression fixes for Samsung exynos542x and exynos5433 SoCs - Use of fallthrough; attribute for Samsung s3c24xx - Updates and fixup HDMI and video clocks on Meson8b - Fixup reset polarity on Meson8b - Fix GPU glitch free mux switch on Meson gx and g12 - A minor fix for the currently unused suspend/resume handling on Renesas RZ/A1 and RZ/A2 - Two more conversions of Renesas DT bindings to json-schema - Add support for the USB 2.0 clock selector on Renesas R-Car M3-W+" * tag 'clk-for-linus' of git://git.kernel.org/pub/scm/linux/kernel/git/clk/linux: (155 commits) clk: mediatek: Remove ifr{0,1}_cfg_regs structures clk: baikal-t1: remove redundant assignment to variable 'divider' clk: baikal-t1: fix spelling mistake "Uncompatible" -> "Incompatible" dt-bindings: clock: Add a missing include to MMP Audio Clock binding dt: Add bindings for IDT VersaClock 5P49V5925 clk: vc5: Add support for IDT VersaClock 5P49V6965 clk: Add Baikal-T1 CCU Dividers driver clk: Add Baikal-T1 CCU PLLs driver dt-bindings: clk: Add Baikal-T1 CCU Dividers binding dt-bindings: clk: Add Baikal-T1 CCU PLLs binding clk: mediatek: assign the initial value to clk_init_data of mtk_mux clk: mediatek: Add MT6765 clock support clk: mediatek: add mt6765 clock IDs dt-bindings: clock: mediatek: document clk bindings vcodecsys for Mediatek MT6765 SoC dt-bindings: clock: mediatek: document clk bindings mipi0a for Mediatek MT6765 SoC dt-bindings: clock: mediatek: document clk bindings for Mediatek MT6765 SoC CLK: HSDK: CGU: add support for 148.5MHz clock CLK: HSDK: CGU: support PLL bypassing CLK: HSDK: CGU: check if PLL is bypassed first clk: clk-si5341: Add support for the Si5345 series ...
2020-06-05Merge tag 'arm-drivers-5.8' of ↵Linus Torvalds1-1/+1
git://git.kernel.org/pub/scm/linux/kernel/git/soc/soc Pull ARM/SoC driver updates from Arnd Bergmann: "These are updates to SoC specific drivers that did not have another subsystem maintainer tree to go through for some reason: - Some bus and memory drivers for the MIPS P5600 based Baikal-T1 SoC that is getting added through the MIPS tree. - There are new soc_device identification drivers for TI K3, Qualcomm MSM8939 - New reset controller drivers for NXP i.MX8MP, Renesas RZ/G1H, and Hisilicon hi6220 - The SCMI firmware interface can now work across ARM SMC/HVC as a transport. - Mediatek platforms now use a new driver for their "MMSYS" hardware block that controls clocks and some other aspects in behalf of the media and gpu drivers. - Some Tegra processors have improved power management support, including getting woken up by the PMIC and cluster power down during idle. - A new v4l staging driver for Tegra is added. - Cleanups and minor bugfixes for TI, NXP, Hisilicon, Mediatek, and Tegra" * tag 'arm-drivers-5.8' of git://git.kernel.org/pub/scm/linux/kernel/git/soc/soc: (155 commits) clk: sprd: fix compile-testing bus: bt1-axi: Build the driver into the kernel bus: bt1-apb: Build the driver into the kernel bus: bt1-axi: Use sysfs_streq instead of strncmp bus: bt1-axi: Optimize the return points in the driver bus: bt1-apb: Use sysfs_streq instead of strncmp bus: bt1-apb: Use PTR_ERR_OR_ZERO to return from request-regs method bus: bt1-apb: Fix show/store callback identations bus: bt1-apb: Include linux/io.h dt-bindings: memory: Add Baikal-T1 L2-cache Control Block binding memory: Add Baikal-T1 L2-cache Control Block driver bus: Add Baikal-T1 APB-bus driver bus: Add Baikal-T1 AXI-bus driver dt-bindings: bus: Add Baikal-T1 APB-bus binding dt-bindings: bus: Add Baikal-T1 AXI-bus binding staging: tegra-video: fix V4L2 dependency tee: fix crypto select drivers: soc: ti: knav_qmss_queue: Make knav_gp_range_ops static soc: ti: add k3 platforms chipid module driver dt-bindings: soc: ti: add binding for k3 platforms chipid module ...
2020-06-03clk: sprd: fix compile-testingArnd Bergmann1-1/+1
I got a build failure with CONFIG_ARCH_SPRD=m when the main portion of the clock driver failed to get linked into the kernel: ERROR: modpost: "sprd_pll_sc_gate_ops" [drivers/clk/sprd/sc9863a-clk.ko] undefined! ERROR: modpost: "sprd_pll_ops" [drivers/clk/sprd/sc9863a-clk.ko] undefined! ERROR: modpost: "sprd_div_ops" [drivers/clk/sprd/sc9863a-clk.ko] undefined! ERROR: modpost: "sprd_comp_ops" [drivers/clk/sprd/sc9863a-clk.ko] undefined! ERROR: modpost: "sprd_mux_ops" [drivers/clk/sprd/sc9863a-clk.ko] undefined! ERROR: modpost: "sprd_gate_ops" [drivers/clk/sprd/sc9863a-clk.ko] undefined! ERROR: modpost: "sprd_sc_gate_ops" [drivers/clk/sprd/sc9863a-clk.ko] undefined! ERROR: modpost: "sprd_clk_probe" [drivers/clk/sprd/sc9863a-clk.ko] undefined! ERROR: modpost: "sprd_clk_regmap_init" [drivers/clk/sprd/sc9863a-clk.ko] undefined! ERROR: modpost: "sprd_pll_ops" [drivers/clk/sprd/sc9860-clk.ko] undefined! ERROR: modpost: "sprd_div_ops" [drivers/clk/sprd/sc9860-clk.ko] undefined! ERROR: modpost: "sprd_mux_ops" [drivers/clk/sprd/sc9860-clk.ko] undefined! This is a combination of two trivial bugs: - A platform should not be 'tristate', it should be a 'bool' symbol like the other platforms, if only for consistency, and to avoid surprises like this one. - The clk Makefile does not traverse into the sprd subdirectory if the platform is disabled but the drivers are enabled for compile-testing. Fixing either of the two would be sufficient to address the link failure, but for correctness, both need to be changed. Fixes: 2b1b799d7630 ("arm64: change ARCH_SPRD Kconfig to tristate") Fixes: d41f59fd92f2 ("clk: sprd: Add common infrastructure") Acked-by: Chunyan Zhang <chunyan.zhang@unisoc.com> Signed-off-by: Arnd Bergmann <arnd@arndb.de>
2020-05-05arm64: tegra: Remove redundant CLKDEV_LOOKUP selectsStephen Boyd1-1/+0
The arm64 architecture selects COMMON_CLK at the toplevel ARM64 config. The COMMON_CLK config option already selects CLKDEV_LOOKUP so it's redundant to have this selected again for the Tegra specific config. Cc: Paul Walmsley <paul@pwsan.com> Acked-by: Thierry Reding <treding@nvidia.com> Cc: Catalin Marinas <catalin.marinas@arm.com> Cc: Will Deacon <will@kernel.org> Cc: <linux-arm-kernel@lists.infradead.org> Cc: Arnd Bergmann <arnd@arndb.de> Signed-off-by: Stephen Boyd <sboyd@kernel.org> Reviewed-by: Arnd Bergmann <arnd@arndb.de> Link: https://lkml.kernel.org/r/20200409064416.83340-4-sboyd@kernel.org
2020-05-05clk: versatile: Rework kconfig structureRob Herring1-1/+0
CONFIG_COMMON_CLK_VERSATILE doesn't really do anything other than hiding Arm Ltd reference platform clock drivers. It is both selected by the platforms that need it and has a 'depends on' for those platforms. Let's drop the selects and convert CONFIG_COMMON_CLK_VERSATILE into a menuconfig entry. With this make CONFIG_ICST visible. Move the 'select REGMAP_MMIO' to the drivers that require it (SP810 did not). This also has the side effect of enabling CONFIG_ICST for COMPILE_TEST as it was not visible before. Cc: Catalin Marinas <catalin.marinas@arm.com> Cc: Will Deacon <will@kernel.org> Cc: Liviu Dudau <liviu.dudau@arm.com> Cc: Lorenzo Pieralisi <lorenzo.pieralisi@arm.com> Cc: Linus Walleij <linus.walleij@linaro.org> Reviewed-by: Sudeep Holla <sudeep.holla@arm.com> Reviewed-by: Stephen Boyd <sboyd@kernel.org> Signed-off-by: Rob Herring <robh@kernel.org>
2020-05-05arm64: vexpress: Don't select CONFIG_POWER_RESET_VEXPRESSRob Herring1-2/+0
The VExpress power-off/reset driver is not needed on 64-bit platforms as PSCI power-off and reset can be used instead. Stop selecting it so it can be disabled and not always built-in. CONFIG_VEXPRESS_CONFIG can also be dropped as it was a dependency for CONFIG_POWER_RESET_VEXPRESS. Cc: Catalin Marinas <catalin.marinas@arm.com> Cc: Will Deacon <will@kernel.org> Cc: Lorenzo Pieralisi <lorenzo.pieralisi@arm.com> Cc: Linus Walleij <linus.walleij@linaro.org> Reviewed-by: Sudeep Holla <sudeep.holla@arm.com> Acked-by: Arnd Bergmann <arnd@arndb.de> Acked-by: Liviu Dudau <liviu.dudau@arm.com> Signed-off-by: Rob Herring <robh@kernel.org>
2020-04-04Merge tag 'arm-soc-5.7' of git://git.kernel.org/pub/scm/linux/kernel/git/soc/socLinus Torvalds1-2/+0
Pull ARM SoC updates from Arnd Bergmann: "The code changes are mostly for 32-bit platforms and include: - Lots of updates for the Nvidia Tegra platform, including cpuidle, pmc, and dt-binding changes - Microchip at91 power management updates for the recently added sam9x60 SoC - Treewide setup_irq deprecation by afzal mohammed - STMicroelectronics stm32 gains earlycon support - Renesas platforms with Cortex-A9 can now use the global timer - Some TI OMAP2+ platforms gain cpuidle support - Various cleanups for the i.MX6 and Orion platforms, as well as Kconfig files across all platforms" * tag 'arm-soc-5.7' of git://git.kernel.org/pub/scm/linux/kernel/git/soc/soc: (75 commits) ARM: qcom: Add support for IPQ40xx ARM: mmp: replace setup_irq() by request_irq() ARM: cns3xxx: replace setup_irq() by request_irq() ARM: spear: replace setup_irq() by request_irq() ARM: ep93xx: Replace setup_irq() by request_irq() ARM: iop32x: replace setup_irq() by request_irq() arm: mach-dove: Mark dove_io_desc as __maybe_unused ARM: orion: replace setup_irq() by request_irq() ARM: debug: stm32: add UART early console support for STM32MP1 ARM: debug: stm32: add UART early console support for STM32H7 ARM: debug: stm32: add UART early console configuration for STM32F7 ARM: debug: stm32: add UART early console configuration for STM32F4 cpuidle: tegra: Disable CC6 state if LP2 unavailable cpuidle: tegra: Squash Tegra114 driver into the common driver cpuidle: tegra: Squash Tegra30 driver into the common driver cpuidle: Refactor and move out NVIDIA Tegra20 driver into drivers/cpuidle ARM: tegra: cpuidle: Remove unnecessary memory barrier ARM: tegra: cpuidle: Make abort_flag atomic ARM: tegra: cpuidle: Handle case where secondary CPU hangs on entering LP2 ARM: tegra: Make outer_disable() open-coded ...
2020-03-25Merge tag 'zynqmp-soc-for-v5.7' of https://github.com/Xilinx/linux-xlnx into ↵Arnd Bergmann1-1/+0
arm/soc arm64: soc: ZynqMP SoC changes for v5.7 - Change firmware dependency to be able to disable it * tag 'zynqmp-soc-for-v5.7' of https://github.com/Xilinx/linux-xlnx: arm64: zynqmp: Make zynqmp_firmware driver optional include: linux: firmware: Correct config dependency of zynqmp_eemi_ops Link: https://lore.kernel.org/r/ecef6de5-8318-9f88-db8c-7c33fe44901f@monstr.eu Signed-off-by: Arnd Bergmann <arnd@arndb.de>
2020-03-10arm64: bcm2835: Drop select of nonexistent HAVE_ARM_ARCH_TIMERGeert Uytterhoeven1-1/+0
Unlike on arm32, the HAVE_ARM_ARCH_TIMER config symbol does not exist on arm64. Note that the toplevel ARM64 symbol always selects ARM_ARCH_TIMER, so support for it is always included. Fixes: 628d30d1ccb897fe ("arm64: Add platform selection for BCM2835.") Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be> Reviewed-by: Nicolas Saenz Julienne <nsaenzjulienne@suse.de> Signed-off-by: Florian Fainelli <f.fainelli@gmail.com>
2020-03-09arm64: zynqmp: Make zynqmp_firmware driver optionalTejas Patel1-1/+0
Make zynqmp_firmware driver as optional to disable it, if user don't want to use default zynqmp firmware interface. Signed-off-by: Tejas Patel <tejas.patel@xilinx.com> Signed-off-by: Jolly Shah <jolly.shah@xilinx.com> Signed-off-by: Michal Simek <michal.simek@xilinx.com>
2020-03-06arm64: change ARCH_SPRD Kconfig to tristateChunyan Zhang1-1/+1
The default value of Kconfig for almost all sprd drivers are the same with ARCH_SPRD, making these drivers built as modules as default would be easier if we can set ARCH_SPRD as 'm', so this patch change ARCH_SPRD to tristate. Signed-off-by: Chunyan Zhang <chunyan.zhang@unisoc.com> Link: https://lore.kernel.org/r/20200305103228.9686-1-zhang.lyra@gmail.com Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
2019-11-06Merge tag 'imx-soc-5.5' of ↵Olof Johansson1-0/+5
git://git.kernel.org/pub/scm/linux/kernel/git/shawnguo/linux into arm/soc i.MX SoC update for 5.5: - Add arm64 Kconfig option for the NXP S32 platform. - Drop imx_anatop_usb_chrg_detect_disable() function which becomes unneeded, since all the necessary charger setup is done by the USB PHY driver now. - Add serial number support for i.MX6/7 SoCs by reading 64-bit SoC unique ID from OCOTP block. - Replace i.MX machine specific coherency exit implementation using the generic v7_exit_coherency_flush() function. * tag 'imx-soc-5.5' of git://git.kernel.org/pub/scm/linux/kernel/git/shawnguo/linux: ARM: imx: use generic function to exit coherency ARM: imx: Add serial number support for i.MX6/7 SoCs ARM: imx: Drop imx_anatop_usb_chrg_detect_disable() arm64: Introduce config for S32 Link: https://lore.kernel.org/r/20191105150315.15477-2-shawnguo@kernel.org Signed-off-by: Olof Johansson <olof@lixom.net>
2019-11-04Merge tag 'realtek-arm64-soc-for-5.5' of ↵Olof Johansson1-0/+1
git://git.kernel.org/pub/scm/linux/kernel/git/afaerber/linux-realtek into arm/soc Realtek ARM64 based SoC for v5.5 Enable reset controllers and add a mailing list to MAINTAINERS. * tag 'realtek-arm64-soc-for-5.5' of git://git.kernel.org/pub/scm/linux/kernel/git/afaerber/linux-realtek: arm64: realtek: Select reset controller MAINTAINERS: Add mailing list for Realtek SoCs Link: https://lore.kernel.org/r/20191030041000.31848-1-afaerber@suse.de Signed-off-by: Olof Johansson <olof@lixom.net>
2019-10-26arm64: Introduce config for S32Mihaela Martinas1-0/+5
Add configuration option for the NXP S32 platform family in Kconfig.platforms. For starters, the only SoC supported will be Treerunner (S32V234), with a single execution target: the S32V234-EVB (rev 29288) board. Signed-off-by: Mihaela Martinas <Mihaela.Martinas@freescale.com> Signed-off-by: Stoica Cosmin-Stefan <cosmin.stoica@nxp.com> Signed-off-by: Stefan-Gabriel Mirea <stefan-gabriel.mirea@nxp.com> Signed-off-by: Shawn Guo <shawnguo@kernel.org>
2019-10-26arm64: realtek: Select reset controllerAndreas Färber1-0/+1
Select RESET_CONTROLLER for ARCH_REALTEK. Signed-off-by: Andreas Färber <afaerber@suse.de>
2019-10-10ARM: bcm: Add support for BCM2711 SoCStefan Wahren1-2/+3
Add the BCM2711 to ARCH_BCM2835, but use new machine board code because of the differences. Signed-off-by: Stefan Wahren <wahrenst@gmx.net> Reviewed-by: Eric Anholt <eric@anholt.net> Acked-by: Florian Fanelli <f.fainelli@gmail.com>
2019-09-04arm64: exynos: Enable exynos-chipid driverPankaj Dubey1-0/+1
Enable Exynos Chipid driver for accessing SoC related information. Link: https://lore.kernel.org/r/20190904175002.10487-6-krzk@kernel.org Signed-off-by: Pankaj Dubey <pankaj.dubey@samsung.com> Signed-off-by: Bartlomiej Zolnierkiewicz <b.zolnierkie@samsung.com> Signed-off-by: Sylwester Nawrocki <s.nawrocki@samsung.com> Signed-off-by: Krzysztof Kozlowski <krzk@kernel.org> Signed-off-by: Arnd Bergmann <arnd@arndb.de>
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