index
:
starfive-tech/linux.git
JH7100_VisionFive_OH_dev
JH7110_VisionFive2_510_devel
JH7110_VisionFive2_6.1.y_devel
JH7110_VisionFive2_6.6.y_devel
JH7110_VisionFive2_devel
JH7110_VisionFive2_upstream
beaglev-5.13.y
beaglev_fedora_devel
buildroot-upstream
esmil_starlight
fedora-vic-7100_5.10.6
master
openwrt-6.1.y
rt-ethercat-release
rt-linux-6.6.y-release
rt-linux-release
rtthread_AMP
starfive-5.13
starfive-5.15-dubhe
starfive-6.1-dubhe
starfive-6.1.65-dubhe
starfive-6.6.10-dubhe
starfive-6.6.31-dubhe
starfive-6.6.48-dubhe
starlight-5.14.y
visionfive
visionfive-5.13.y-devel
visionfive-5.15.y
visionfive-5.15.y-devel
visionfive-5.15.y_fedora_devel
visionfive-5.16.y
visionfive-5.17.y
visionfive-5.18.y
visionfive-5.19.y
visionfive-6.4.y
visionfive_fedora_devel
StarFive Tech Linux Kernel for VisionFive (JH7110) boards (mirror)
Andrey V.Kosteltsev
summary
refs
log
tree
commit
diff
log msg
author
committer
range
path:
root
/
arch
/
arm
/
mm
/
tlb-v7.S
Age
Commit message (
Expand
)
Author
Files
Lines
2012-08-11
ARM: 7489/1: errata: fix workaround for erratum #720789 on UP systems
Will Deacon
1
-3
/
+3
2012-07-31
ARM: 7478/1: errata: extend workaround for erratum #720789
Will Deacon
1
-0
/
+12
2011-07-23
Merge branch 'devel-stable' into for-next
Russell King
1
-7
/
+2
2011-07-19
ARM: btc: avoid invalidating the branch target cache on kernel TLB maintanence
Russell King
1
-6
/
+0
2011-07-07
ARM: mm: tlb-v7: Use the new processor struct macros
Dave Martin
1
-7
/
+2
2010-10-04
ARM: Allow SMP kernels to boot on UP systems
Russell King
1
-21
/
+12
2010-05-08
ARM: 6112/1: Use the Inner Shareable I-cache and BTB ops on ARMv7 SMP
Catalin Marinas
1
-0
/
+8
2010-01-05
ARM: 5858/1: Remove unused vma_vm_flags macro from v7wbi_flush_user_tlb_range
Bahadir Balban
1
-1
/
+0
2009-05-30
Check whether the TLB operations need broadcasting on SMP systems
Catalin Marinas
1
-6
/
+11
2009-04-28
arm: Use __INIT macro instead of .text.init.
Tim Abbott
1
-1
/
+2
2008-09-01
[ARM] 5227/1: Add the ENDPROC declarations to the .S files
Catalin Marinas
1
-0
/
+2
2007-05-30
[ARM] 4394/1: ARMv7: Add the TLB range operations
Catalin Marinas
1
-0
/
+88