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starfive-tech/linux.git
JH7100_VisionFive_OH_dev
JH7110_VisionFive2_510_devel
JH7110_VisionFive2_6.1.y_devel
JH7110_VisionFive2_6.6.y_devel
JH7110_VisionFive2_devel
JH7110_VisionFive2_upstream
beaglev-5.13.y
beaglev_fedora_devel
buildroot-upstream
esmil_starlight
fedora-vic-7100_5.10.6
master
openwrt-6.1.y
rt-ethercat-release
rt-linux-6.6.y-release
rt-linux-release
rtthread_AMP
starfive-5.13
starfive-5.15-dubhe
starfive-6.1-dubhe
starfive-6.1.65-dubhe
starfive-6.6.10-dubhe
starfive-6.6.31-dubhe
starlight-5.14.y
visionfive
visionfive-5.13.y-devel
visionfive-5.15.y
visionfive-5.15.y-devel
visionfive-5.15.y_fedora_devel
visionfive-5.16.y
visionfive-5.17.y
visionfive-5.18.y
visionfive-5.19.y
visionfive-6.4.y
visionfive_fedora_devel
StarFive Tech Linux Kernel for VisionFive (JH7110) boards (mirror)
Andrey V.Kosteltsev
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path:
root
/
arch
/
arm
/
mm
/
proc-v7-3level.S
Age
Commit message (
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Author
Files
Lines
2014-04-25
ARM: 8037/1: mm: support big-endian page tables
Jianguo Wu
1
-5
/
+13
2013-07-22
ARM: 7784/1: mm: ensure SMP alternates assemble to exactly 4 bytes with Thumb-2
Will Deacon
1
-1
/
+1
2013-07-15
arm: delete __cpuinit/__CPUINIT usage from all ARM users
Paul Gortmaker
1
-4
/
+0
2013-05-30
ARM: LPAE: accomodate >32-bit addresses for page table base
Cyril Chemparathy
1
-0
/
+8
2013-05-30
ARM: LPAE: factor out T1SZ and TTBR1 computations
Cyril Chemparathy
1
-21
/
+8
2013-05-30
ARM: LPAE: use phys_addr_t in switch_mm()
Cyril Chemparathy
1
-4
/
+12
2013-04-03
ARM: 7691/1: mm: kill unused TLB_CAN_READ_FROM_L1_CACHE and use ALT_SMP instead
Will Deacon
1
-1
/
+2
2013-03-04
ARM: 7652/1: mm: fix missing use of 'asid' to get asid value from mm->context.id
Ben Dooks
1
-1
/
+1
2013-02-16
ARM: 7650/1: mm: replace direct access to mm->context.id with new macro
Ben Dooks
1
-1
/
+1
2012-11-09
ARM: mm: introduce present, faulting entries for PAGE_NONE
Will Deacon
1
-0
/
+3
2012-11-09
ARM: mm: introduce L_PTE_VALID for page table entries
Will Deacon
1
-1
/
+1
2011-12-08
ARM: LPAE: MMU setup for the 3-level page table format
Catalin Marinas
1
-0
/
+150