| Age | Commit message (Expand) | Author | Files | Lines |
|---|---|---|---|---|
| 2009-03-16 | [ARM] xsc3: add highmem support to L2 cache handling code | Nicolas Pitre | 1 | -27/+80 |
| 2008-11-06 | [ARM] xsc3: fix xsc3_l2_inv_range | Dan Williams | 1 | -2/+2 |
| 2008-09-01 | [ARM] cputype: separate definitions, use them | Russell King | 1 | -1/+2 |
| 2008-07-29 | [ARM] pxa: add support for L2 outer cache on XScale3 (attempt 2) | Eric Miao | 1 | -0/+182 |
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index : starfive-tech/linux.git | |
| StarFive Tech Linux Kernel for VisionFive (JH7110) boards (mirror) | Andrey V.Kosteltsev |
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