| Age | Commit message (Expand) | Author | Files | Lines |
|---|---|---|---|---|
| 2014-03-27 | ARM: cache-tauros2: remove ARMv6 code | Arnd Bergmann | 1 | -28/+1 |
| 2012-08-16 | ARM: cache: add dt support for tauros2 cache | Chao Xie | 1 | -1/+34 |
| 2012-08-16 | ARM: cache: add extra feature enable for tauros2 | Chao Xie | 1 | -17/+27 |
| 2012-08-16 | ARM: cache: add cputype.h for tauros2 | Chao Xie | 1 | -3/+1 |
| 2012-08-16 | ARM: cache: fix uninitialized ptr in tauros2_init | Chao Xie | 1 | -1/+1 |
| 2012-05-07 | ARM: cache: tauros2: add disable and resume callback | Chao Xie | 1 | -0/+24 |
| 2012-03-28 | ARM: move CP15 definitions to separate header file | Russell King | 1 | -0/+1 |
| 2009-11-27 | ARM: Add Tauros2 L2 cache controller support | Lennert Buytenhek | 1 | -0/+263 |
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index : starfive-tech/linux.git | |
| StarFive Tech Linux Kernel for VisionFive (JH7110) boards (mirror) | Andrey V.Kosteltsev |
| summaryrefslogtreecommitdiff |