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path: root/arch/arm/mach-zynq/slcr.c
AgeCommit message (Expand)AuthorFilesLines
2016-02-09ARM: zynq: address L2 cache data corruptionJosh Cartwright1-0/+4
2015-05-18ARM: zynq: Drop use of slcr_unlock in zynq_slcr_system_restartJosh Cartwright1-7/+0
2015-05-18ARM: zynq: Use restart_handler mechanism for slcr resetJosh Cartwright1-2/+19
2015-01-29ARM: zynq: Simplify SLCR initializationMichal Simek1-28/+7
2014-09-16ARM: zynq: Synchronise zynq_cpu_die/killSoren Brinkmann1-1/+42
2014-05-20ARM: zynq: Add support for SOC_BUSMichal Simek1-0/+19
2014-02-10ARM: zynq: Introduce zynq_slcr_unlock()Michal Simek1-2/+14
2014-02-10ARM: zynq: Add and use zynq_slcr_read/write() helper functionsMichal Simek1-8/+48
2014-02-10ARM: zynq: Make zynq_slcr_base staticSteffen Trumtrar1-1/+1
2014-02-10ARM: zynq: Hang iomapped slcr address on device_nodeSteffen Trumtrar1-0/+2
2014-02-10ARM: zynq: Split slcr in two partsMichal Simek1-2/+24
2014-02-05ARM: zynq: Move clock_init from slcr to commonSteffen Trumtrar1-2/+0
2013-07-26arm: zynq: slcr: Use read-modify-write for register writesSoren Brinkmann1-8/+8
2013-07-26arm: zynq: slcr: Clean up #definesSoren Brinkmann1-13/+12
2013-07-26arm: zynq: slcr: Remove redundant header #includesSoren Brinkmann1-10/+0
2013-05-27arm: zynq: Migrate platform to clock controllerSoren Brinkmann1-1/+1
2013-04-04arm: zynq: Add smp supportMichal Simek1-0/+29
2013-04-04arm: zynq: Add support for system resetMichal Simek1-0/+27
2013-04-04arm: zynq: Move slcr initialization to separate fileMichal Simek1-0/+69
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