index
:
starfive-tech/linux.git
JH7100_VisionFive_OH_dev
JH7110_VisionFive2_510_devel
JH7110_VisionFive2_6.1.y_devel
JH7110_VisionFive2_6.6.y_devel
JH7110_VisionFive2_devel
JH7110_VisionFive2_upstream
beaglev-5.13.y
beaglev_fedora_devel
buildroot-upstream
esmil_starlight
fedora-vic-7100_5.10.6
master
openwrt-6.1.y
rt-ethercat-release
rt-linux-6.6.y-release
rt-linux-release
rtthread_AMP
starfive-5.13
starfive-5.15-dubhe
starfive-6.1-dubhe
starfive-6.1.65-dubhe
starfive-6.6.10-dubhe
starfive-6.6.31-dubhe
starfive-6.6.48-dubhe
starlight-5.14.y
visionfive
visionfive-5.13.y-devel
visionfive-5.15.y
visionfive-5.15.y-devel
visionfive-5.15.y_fedora_devel
visionfive-5.16.y
visionfive-5.17.y
visionfive-5.18.y
visionfive-5.19.y
visionfive-6.4.y
visionfive_fedora_devel
StarFive Tech Linux Kernel for VisionFive (JH7110) boards (mirror)
Andrey V.Kosteltsev
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path:
root
/
arch
/
arm
/
mach-tegra
/
sleep-tegra20.S
Age
Commit message (
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)
Author
Files
Lines
2017-04-04
soc/tegra: Move Tegra flowctrl driver
Jon Hunter
1
-1
/
+2
2015-11-24
ARM: tegra: Ensure entire dcache is flushed on entering LP0/1
Jon Hunter
1
-0
/
+3
2015-05-04
ARM: tegra20: Store CPU "resettable" status in IRAM
Dmitry Osipenko
1
-16
/
+21
2014-07-18
ARM: convert all "mov.* pc, reg" to "bx reg" for ARMv6+
Russell King
1
-12
/
+12
2013-09-17
ARM: tegra: move resume vector define to irammap.h
Stephen Warren
1
-2
/
+3
2013-08-12
ARM: tegra: add LP1 suspend support for Tegra20
Joseph Lo
1
-0
/
+296
2013-07-19
ARM: tegra: add a flag for tegra_disable_clean_inv_dcache to do LoUIS or ALL
Joseph Lo
1
-0
/
+1
2013-04-29
ARM: tegra: call cpu_do_idle from C code
Arnd Bergmann
1
-1
/
+1
2013-01-28
ARM: tegra20: cpuidle: apply coupled cpuidle for powered-down mode
Joseph Lo
1
-0
/
+53
2013-01-28
ARM: tegra20: cpuidle: add powered-down state for secondary CPU
Joseph Lo
1
-0
/
+147
2013-01-28
ARM: tegra: update the cache maintenance order for CPU shutdown
Joseph Lo
1
-3
/
+0
2012-11-16
ARM: tegra: rename the file of "sleep-tXX" to "sleep-tegraXX"
Joseph Lo
1
-0
/
+80