starfive-tech/linux.git - StarFive Tech Linux Kernel for VisionFive (JH7110) boards (mirror)

Age	Commit message (Expand)	Author	Files	Lines
2017-04-04	soc/tegra: Move Tegra flowctrl driver	Jon Hunter	1	-1/+1
2015-05-04	ARM: tegra20: Store CPU "resettable" status in IRAM	Dmitry Osipenko	1	-3/+7
2014-11-17	ARM: tegra: Re-add removed SoC id macro to tegra_resume()	Dmitry Osipenko	1	-0/+1
2014-07-17	ARM: tegra: Use a function to get the chip ID	Thierry Reding	1	-1/+2
2014-07-17	ARM: tegra: Sort includes alphabetically	Thierry Reding	1	-2/+2
2014-05-30	ARM: l2c: tegra: convert to common l2c310 early resume functionality	Russell King	1	-8/+3
2013-10-19	ARM: tegra: make tegra_resume can work with current and later chips	Joseph Lo	1	-8/+5
2013-08-12	ARM: tegra: add common resume handling code for LP1 resuming	Joseph Lo	1	-0/+13
2013-07-19	ARM: tegra: set up the correct L2 data RAM latency for Cortex-A15	Joseph Lo	1	-0/+1
2013-07-19	ARM: tegra: do v7_invalidate_l1 only when CPU is Cortex-A9	Joseph Lo	1	-2/+5
2013-06-05	ARM: tegra: remove ifdef in the tegra_resume	Joseph Lo	1	-3/+1
2013-05-23	ARM: tegra114: add CPU hotplug support	Joseph Lo	1	-3/+12
2013-05-23	ARM: tegra: make tegra_resume can work for Tegra114	Joseph Lo	1	-4/+9
2013-05-23	ARM: tegra: add an assembly marco to check Tegra SoC ID	Joseph Lo	1	-16/+9
2013-04-18	ARM: tegra: fix relocation truncated error when THUMB2_KERNEL enabled	Joseph Lo	1	-0/+1
2013-03-12	ARM: tegra: don't unlock MMIO access to DBGLAR	Joseph Lo	1	-3/+0
2013-03-12	ARM: tegra: add CPU errata WARs to Tegra reset handler	Stephen Warren	1	-6/+39
2013-01-28	ARM: tegra: make device can run on UP	Joseph Lo	1	-0/+239