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2011-10-01ARM: CSR: timer: space required before the open parenthesis '('Barry Song1-1/+1
Signed-off-by: Barry Song <Baohua.Song@csr.com>
2011-10-01ARM: CSR: timer: do not initialise statics to 0 or NULLBarry Song1-1/+1
Signed-off-by: Barry Song <Baohua.Song@csr.com>
2011-09-26ARM: add an extra temp register to the low level debugging addruart macroNicolas Pitre1-1/+1
Some platforms (like OMAP not to name it) are doing rather complicated hacks just to determine the base UART address to use. Let's give their addruart macro some slack by providing an extra work register which will allow for much needed cleanups. This is basically a no-op as this commit is only adding the extra argument to the macro but no one is using it yet. Signed-off-by: nicolas Pitre <nicolas.pitre@linaro.org> Reviewed-by: Kevin Hilman <khilman@ti.com>
2011-09-21ARM: CSR: PM: add sleep entry for SiRFprimaIIRongjun Ying4-0/+243
This patch adds suspend-to-mem support for prima2. It will make prima2 enter DEEPSLEEP mode while accepting PM_SUSPEND_MEM command. Signed-off-by: Rongjun Ying <rongjun.ying@csr.com> Signed-off-by: Barry Song <baohua.song@csr.com> Acked-by: Arnd Bergmann <arnd@arndb.de>
2011-09-21ARM: CSR: PM: save/restore irq status in suspend cycleBarry Song1-0/+40
SiRFprimaII will lose power in deepsleep mode except rtc, pmu and sdram self-refresh. So IRQ controller will lose status in suspend cyle. This patch saves irq mask/level registers while suspending and restore them while resuming. Signed-off-by: Barry Song <baohua.song@csr.com> Acked-by: Arnd Bergmann <arnd@arndb.de>
2011-09-21ARM: CSR: PM: save/restore timer status in suspend cycleBarry Song1-0/+34
SiRFprimaII will lose power in deepsleep mode except rtc, pmu and sdram self-refresh. This patch saves timer-related registers while suspending and restore them while resuming. Signed-off-by: Barry Song <baohua.song@csr.com> Acked-by: Arnd Bergmann <arnd@arndb.de>
2011-09-21Merge branch 'kprobes-test' of git://git.yxit.co.uk/linux into devel-stableRussell King4-0/+4
2011-09-11ARM: CSR: add rtc i/o bridge interface for SiRFprimaIIZhiwu Song2-0/+140
The module is a bridge between the RTC clock domain and the CPU interface clock domain. ARM access the register of SYSRTC, GPSRTC and PWRC through this module. Signed-off-by: Zhiwu Song <zhiwu.song@csr.com> Signed-off-by: Barry Song <Baohua.Song@csr.com> Reviewed-by: Jamie Iles <jamie@jamieiles.com> Acked-by: Arnd Bergmann <arnd@arndb.de>
2011-09-11ARM: CSR: IRQ: add simple irq_domain so that hw irq can map to LinuxBarry Song1-0/+3
Signed-off-by: Barry Song <Baohua.Song@csr.com>
2011-09-11ARM: CSR: add missing sentinels to of_device_id tablesJamie Iles4-0/+4
The of_device_id tables used for matching should be terminated with empty sentinel values. Signed-off-by: Jamie Iles <jamie@jamieiles.com> Signed-off-by: Barry Song <baohua.song@csr.com>
2011-09-07ARM: mach-prima2: move ARM_DMA_ZONE_SIZE to mdesc->dma_zone_sizeNicolas Pitre2-7/+1
Original comment: Restrict DMA-able region to workaround silicon limitation. The limitation restricts buffers available for DMA to SD/MMC hardware to be below 256MB. Signed-off-by: Nicolas Pitre <nicolas.pitre@linaro.org>
2011-08-22ARM: mach-prima2: convert boot_params to atag_offsetNicolas Pitre1-1/+1
Signed-off-by: Nicolas Pitre <nicolas.pitre@linaro.org> Acked-by: Arnd Bergmann <arnd@arndb.de>
2011-07-09ARM: CSR: initializing L2 cacheRongjun Ying2-0/+60
Signed-off-by: Rongjun Ying <rongjun.ying@csr.com> Signed-off-by: Barry Song <baohua.song@csr.com> Reviewed-by: Arnd Bergmann <arnd@arndb.de>
2011-07-09ARM: CSR: mapping early DEBUG_LL uartBarry Song4-0/+33
Signed-off-by: Barry Song <baohua.song@csr.com> Reviewed-by: Arnd Bergmann <arnd@arndb.de>
2011-07-09ARM: CSR: Adding CSR SiRFprimaII board supportBinghua Duan21-0/+1214
SiRFprimaII is the latest generation application processor from CSR’s Multifunction SoC product family. Designed around an ARM cortex A9 core, high-speed memory bus, advanced 3D accelerator and full-HD multi-format video decoder, SiRFprimaII is able to meet the needs of complicated applications for modern multifunction devices that require heavy concurrent applications and fluid user experience. Integrated with GPS baseband, analog and PMU, this new platform is designed to provide a cost effective solution for Automotive and Consumer markets. This patch adds the basic support for this SoC and EVB board based on device tree. It is following the ZYNQ of Xilinx in some degree. Signed-off-by: Binghua Duan <Binghua.Duan@csr.com> Signed-off-by: Rongjun Ying <Rongjun.Ying@csr.com> Signed-off-by: Zhiwu Song <Zhiwu.Song@csr.com> Signed-off-by: Yuping Luo <Yuping.Luo@csr.com> Signed-off-by: Bin Shi <Bin.Shi@csr.com> Signed-off-by: Huayi Li <Huayi.Li@csr.com> Signed-off-by: Barry Song <Baohua.Song@csr.com> Reviewed-by: Arnd Bergmann <arnd@arndb.de>
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