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path: root/arch/arm/mach-omap2/prm2xxx.h
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2014-07-04ARM: OMAP24xx: PRM: add API for clearing wakeup status bitsTero Kristo1-0/+1
This helps to isolate the PRM into its own driver. Signed-off-by: Tero Kristo <t-kristo@ti.com>
2014-05-08ARM: OMAP2+: raw read and write endian fixVictor Kamensky1-1/+1
All OMAP IP blocks expect LE data, but CPU may operate in BE mode. Need to use endian neutral functions to read/write h/w registers. I.e instead of __raw_read[lw] and __raw_write[lw] functions code need to use read[lw]_relaxed and write[lw]_relaxed functions. If the first simply reads/writes register, the second will byteswap it if host operates in BE mode. Changes are trivial sed like replacement of __raw_xxx functions with xxx_relaxed variant. Signed-off-by: Victor Kamensky <victor.kamensky@linaro.org> Signed-off-by: Taras Kondratiuk <taras.kondratiuk@linaro.org> Signed-off-by: Tony Lindgren <tony@atomide.com>
2012-11-22ARM: OMAP2+: PRM: initialize some PRM functions earlyPaul Walmsley1-2/+1
Some PRM functions will need to be called by the hwmod code early in kernel init. To handle this, split the PRM initialization code into early and late phases. The early init is handled via mach-omap2/io.c, while the late init is handled by subsys_initcall(). Signed-off-by: Paul Walmsley <paul@pwsan.com>
2012-11-08ARM: OMAP2/3: PRM: add SoC reset functions (using the CORE DPLL method)Paul Walmsley1-0/+2
Add SoC reset functions into the PRM code. These functions are based on code from mach-omap2/prcm.c. They reset the SoC using the CORE DPLL reset method (as opposed to one of the other two or three chip reset methods). Adding them here will facilitate their removal from arch/arm/mach-omap2/prcm.c. (prcm.c is deprecated.) Signed-off-by: Paul Walmsley <paul@pwsan.com> Tested-by: Vaibhav Hiremath <hvaibhav@ti.com>
2012-10-21ARM: OMAP2+: PRM: create PRM reset source API for the watchdog timer driverPaul Walmsley1-0/+4
The OMAP watchdog timer driver needs to determine what caused the SoC to reset for its GETBOOTSTATUS ioctl. So, define a set of standard reset sources across OMAP SoCs. For OMAP2xxx, 3xxx, and 4xxx SoCs, define mappings from the SoC-specific reset source register bits to the standardized reset source IDs. Create SoC-specific PRM functions that read the appropriate per-SoC register and use the mapping to return the standardized reset bits. Register the SoC-specific PRM functions with the common PRM code via prm_register(). Create a function in the common PRM code, prm_read_reset_sources(), that calls the SoC-specific function, registered during boot. This patch does not yet handle some SoCs, such as AM33xx. Those SoCs were not handled by the code this will replace. Signed-off-by: Paul Walmsley <paul@pwsan.com>
2012-10-21ARM: OMAP2/3: clockdomain/PRM/CM: move the low-level clockdomain functions ↵Paul Walmsley1-0/+6
into PRM/CM Move the low-level SoC-specific clockdomain control functions into cm*.c and prm*.c. For example, OMAP2xxx low-level clockdomain functions go into cm2xxx.c. Then remove the unnecessary clockdomain*xxx*.c files. The objective is to centralize low-level CM and PRM register accesses into the cm*.[ch] and prm*.[ch] files, and then to export an OMAP SoC-independent API to higher-level OMAP power management code. Signed-off-by: Paul Walmsley <paul@pwsan.com> Cc: Rajendra Nayak <rnayak@ti.com> Cc: Vaibhav Hiremath <hvaibhav@ti.com> Acked-by: Rajendra Nayak <rnayak@ti.com> Reviewed-by: Russ Dill <Russ.Dill@ti.com> Acked-by: Santosh Shilimkar <santosh.shilimkar@ti.com>
2012-10-21ARM: OMAP2+: PRM: split PRM functions into OMAP2, OMAP3-specific filesPaul Walmsley1-0/+122
Move OMAP3xxx-specific PRM functions & macros into prm3xxx.[ch] and OMAP2xxx-specific macros into prm2xxx.h. (prm2xxx.c will be created by a subsequent patch when it's needed.) Move basic PRM register access functions into static inline functions in prm2xxx_3xxx.h, leaving only OMAP2/3 hardreset functions in prm2xxx_3xxx.c. Also clarify the initcall function naming to reinforce that this code is specifically for the PRM IP block. This is in preparation for the upcoming powerdomain series and the upcoming move of this code to drivers/. Signed-off-by: Paul Walmsley <paul@pwsan.com> Reviewed-by: Russ Dill <Russ.Dill@ti.com> Acked-by: Santosh Shilimkar <santosh.shilimkar@ti.com>