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starfive-tech/linux.git
JH7100_VisionFive_OH_dev
JH7110_VisionFive2_510_devel
JH7110_VisionFive2_6.1.y_devel
JH7110_VisionFive2_6.6.y_devel
JH7110_VisionFive2_devel
JH7110_VisionFive2_upstream
beaglev-5.13.y
beaglev_fedora_devel
buildroot-upstream
esmil_starlight
fedora-vic-7100_5.10.6
master
openwrt-6.1.y
rt-ethercat-release
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rt-linux-release
rtthread_AMP
starfive-5.13
starfive-5.15-dubhe
starfive-6.1-dubhe
starfive-6.1.65-dubhe
starfive-6.6.10-dubhe
starfive-6.6.31-dubhe
starfive-6.6.48-dubhe
starlight-5.14.y
visionfive
visionfive-5.13.y-devel
visionfive-5.15.y
visionfive-5.15.y-devel
visionfive-5.15.y_fedora_devel
visionfive-5.16.y
visionfive-5.17.y
visionfive-5.18.y
visionfive-5.19.y
visionfive-6.4.y
visionfive_fedora_devel
StarFive Tech Linux Kernel for VisionFive (JH7110) boards (mirror)
Andrey V.Kosteltsev
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path:
root
/
arch
/
arm
/
kernel
/
suspend.c
Age
Commit message (
Expand
)
Author
Files
Lines
2015-01-21
ARM: 8248/1: pm: remove outdated comment
Brian Norris
1
-4
/
+0
2013-07-30
ARM: suspend: use hash of cpu_logical_map value to index into save array
Nicolas Pitre
1
-3
/
+5
2013-06-20
ARM: kernel: implement stack pointer save array through MPIDR hashing
Lorenzo Pieralisi
1
-0
/
+20
2013-06-07
ARM: suspend: fix CPU suspend code for !CONFIG_MMU configurations
Will Deacon
1
-28
/
+36
2013-03-04
ARM: 7661/1: mm: perform explicit branch predictor maintenance when required
Will Deacon
1
-0
/
+1
2012-09-25
ARM: kernel: update cpu_suspend code to use cache LoUIS operations
Lorenzo Pieralisi
1
-1
/
+16
2011-12-06
ARM: suspend: use idmap_pgd instead of suspend_pgd
Will Deacon
1
-15
/
+3
2011-09-21
ARM: pm: add L2 cache cleaning for suspend
Russell King
1
-0
/
+3
2011-09-21
ARM: pm: convert some assembly to C
Russell King
1
-3
/
+21
2011-09-21
ARM: pm: get rid of cpu_resume_turn_mmu_on
Russell King
1
-2
/
+2
2011-09-21
ARM: pm: only use preallocated page table during resume
Russell King
1
-7
/
+10
2011-09-21
ARM: pm: preallocate a page table for suspend/resume
Russell King
1
-0
/
+48