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starfive-tech/linux.git
JH7100_VisionFive_OH_dev
JH7110_VisionFive2_510_devel
JH7110_VisionFive2_6.1.y_devel
JH7110_VisionFive2_6.6.y_devel
JH7110_VisionFive2_devel
JH7110_VisionFive2_upstream
beaglev-5.13.y
beaglev_fedora_devel
buildroot-upstream
esmil_starlight
fedora-vic-7100_5.10.6
master
openwrt-6.1.y
rt-ethercat-release
rt-linux-6.6.y-release
rt-linux-release
rtthread_AMP
starfive-5.13
starfive-5.15-dubhe
starfive-6.1-dubhe
starfive-6.1.65-dubhe
starfive-6.6.10-dubhe
starfive-6.6.31-dubhe
starfive-6.6.48-dubhe
starlight-5.14.y
visionfive
visionfive-5.13.y-devel
visionfive-5.15.y
visionfive-5.15.y-devel
visionfive-5.15.y_fedora_devel
visionfive-5.16.y
visionfive-5.17.y
visionfive-5.18.y
visionfive-5.19.y
visionfive-6.4.y
visionfive_fedora_devel
StarFive Tech Linux Kernel for VisionFive (JH7110) boards (mirror)
Andrey V.Kosteltsev
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path:
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/
arch
/
arm
/
include
/
asm
/
outercache.h
Age
Commit message (
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Author
Files
Lines
2019-06-05
treewide: Replace GPLv2 boilerplate/reference with SPDX - rule 333
Thomas Gleixner
1
-13
/
+1
2015-07-25
ARM: move heavy barrier support out of line
Russell King
1
-17
/
+0
2015-01-16
ARM: 8260/1: l2c: Add interface to ask hypervisor to configure L2C
Tomasz Figa
1
-0
/
+3
2014-05-30
ARM: l2c: remove old .set_debug method
Russell King
1
-1
/
+0
2014-05-30
ARM: l2c: provide generic hook to intercept writes to secure registers
Russell King
1
-1
/
+4
2014-05-30
ARM: outer cache: add WARN_ON() to outer_disable()
Russell King
1
-5
/
+1
2014-05-22
ARM: outer cache: add documentation of outer cache functions
Russell King
1
-1
/
+47
2014-05-22
ARM: l2c: remove outer_inv_all() method
Russell King
1
-8
/
+0
2013-08-23
ARM: move outer_cache declaration out of ifdef
Rob Herring
1
-2
/
+2
2013-02-06
ARM: 7639/1: cache-l2x0: add missed dummy outer_resume entry
Barry Song
1
-0
/
+1
2011-10-17
ARM: 7114/1: cache-l2x0: add resume entry for l2 in secure mode
Barry Song
1
-0
/
+7
2011-03-20
Merge branches 'fixes', 'pgt-next' and 'versatile' into devel
Russell King
1
-6
/
+8
2011-03-09
ARM: 6795/1: l2x0: Errata fix for flush by Way operation can cause data corrupti
Santosh Shilimkar
1
-0
/
+1
2011-02-15
ARM: 6671/1: LPAE: use phys_addr_t instead of unsigned long in outercache fun...
Will Deacon
1
-6
/
+8
2010-10-26
arm: Disable outer (L2) cache in kexec
Thomas Gleixner
1
-0
/
+24
2010-03-26
ARM: 5994/1: ARM: Add outer_cache_fns.sync function pointer (2/4)
Catalin Marinas
1
-0
/
+14
2010-03-26
ARM: 5993/1: ARM: Move the outer_cache definitions into a separate file (1/4)
Catalin Marinas
1
-0
/
+61