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2024-04-25ARM: dts: stm32: put ETZPC as an access controller for STM32MP15x boardsGatien Chevallier3-1/+68
Reference ETZPC as an access-control-provider. For more information on which peripheral is securable or supports MCU isolation, please read the STM32MP15 reference manual Signed-off-by: Gatien Chevallier <gatien.chevallier@foss.st.com> Signed-off-by: Alexandre Torgue <alexandre.torgue@foss.st.com>
2024-04-25ARM: dts: stm32: add ETZPC as a system bus for STM32MP15x boardsGatien Chevallier3-1362/+1368
ETZPC is a firewall controller. Put all peripherals filtered by the ETZPC as ETZPC subnodes and keep the "simple-bus" compatible for backward compatibility. Signed-off-by: Gatien Chevallier <gatien.chevallier@foss.st.com> Signed-off-by: Alexandre Torgue <alexandre.torgue@foss.st.com>
2024-04-25ARM: dts: imx6ull-tarragon: Reduce SPI clock for QCA7000Stefan Wahren3-4/+4
Our hardware department recently informed us that, according to the specification, the QCA7000 should be operated with a maximum SPI clock frequency of 12 MHz. Even if it appears to work at a higher frequency, we should not take any risks here. A short performance test showed no measurable loss of speed. Signed-off-by: Stefan Wahren <wahrenst@gmx.net> Signed-off-by: Shawn Guo <shawnguo@kernel.org>
2024-04-25ARM: dts: imx6ull-tarragon: fix USB over-current polarityMichael Heimpold1-0/+1
Our Tarragon platform uses a active-low signal to inform the i.MX6ULL about the over-current detection. Fixes: 5e4f393ccbf0 ("ARM: dts: imx6ull: Add chargebyte Tarragon support") Signed-off-by: Michael Heimpold <michael.heimpold@chargebyte.com> Signed-off-by: Stefan Wahren <wahrenst@gmx.net> Signed-off-by: Shawn Guo <shawnguo@kernel.org>
2024-04-25ARM: dts: nxp: imx6qdl: fix esai clock warning when do dtb_checkFrank Li1-2/+1
Remove unused clock-names 'mem'. Driver (sound/soc/fsl/fsl_esai.c.) never use clock name 'mem'. arch/arm/boot/dts/nxp/imx/imx6q-sabreauto.dtb: esai@2024000: clocks: [[2, 208], [2, 209], [2, 118], [2, 208], [2, 156]] is too long from schema $id: http://devicetree.org/schemas/sound/fsl,esai.yaml# arch/arm/boot/dts/nxp/imx/imx6q-sabreauto.dtb: esai@2024000: clock-names:1: 'extal' was expected from schema $id: http://devicetree.org/schemas/sound/fsl,esai.yaml# arch/arm/boot/dts/nxp/imx/imx6q-sabreauto.dtb: esai@2024000: clock-names:2: 'fsys' was expected from schema $id: http://devicetree.org/schemas/sound/fsl,esai.yaml# arch/arm/boot/dts/nxp/imx/imx6q-sabreauto.dtb: esai@2024000: clock-names:3: 'spba' was expected from schema $id: http://devicetree.org/schemas/sound/fsl,esai.yaml# arch/arm/boot/dts/nxp/imx/imx6q-sabreauto.dtb: esai@2024000: clock-names: ['core', 'mem', 'extal', 'fsys', 'spba'] is too long from schema $id: http://devicetree.org/schemas/sound/fsl,esai.yaml# Signed-off-by: Frank Li <Frank.Li@nxp.com> Signed-off-by: Shawn Guo <shawnguo@kernel.org>
2024-04-25ARM: dts: nxp: imx6sx: fix esai related warning when do dtb_checkFrank Li1-3/+2
Remove undocumented compatible string 'fsl,imx6sx-esai', which never used in driver sound/soc/fsl/fsl_esai.c. Remove unused clock-names 'mem'. Driver never use clock name 'mem'. Fix below warning: arch/arm/boot/dts/nxp/imx/imx6sx-sdb.dtb: esai@2024000: compatible:0: 'fsl,imx6sx-esai' is not one of ['fsl,imx35-esai', 'fsl,imx6ull-esai', 'fsl,imx8qm-esai', 'fsl,vf610-esai'] from schema $id: http://devicetree.org/schemas/sound/fsl,esai.yaml# arm/arch/arm/boot/dts/nxp/imx/imx6sx-sdb.dtb: esai@2024000: compatible: ['fsl,imx6sx-esai', 'fsl,imx35-esai'] is too long from schema $id: http://devicetree.org/schemas/sound/fsl,esai.yaml# arm/arch/arm/boot/dts/nxp/imx/imx6sx-sdb.dtb: esai@2024000: clocks: [[2, 239], [2, 240], [2, 152], [2, 239], [2, 196]] is too long from schema $id: http://devicetree.org/schemas/sound/fsl,esai.yaml# arm/boot/dts/nxp/imx/imx6sx-sdb.dtb: esai@2024000: clock-names:1: 'extal' was expected from schema $id: http://devicetree.org/schemas/sound/fsl,esai.yaml# arch/arm/boot/dts/nxp/imx/imx6sx-sdb.dtb: esai@2024000: clock-names:2: 'fsys' was expected from schema $id: http://devicetree.org/schemas/sound/fsl,esai.yaml# arch/arm/boot/dts/nxp/imx/imx6sx-sdb.dtb: esai@2024000: clock-names:3: 'spba' was expected from schema $id: http://devicetree.org/schemas/sound/fsl,esai.yaml# arch/arm/boot/dts/nxp/imx/imx6sx-sdb.dtb: esai@2024000: clock-names: ['core', 'mem', 'extal', 'fsys', 'spba'] is too long Signed-off-by: Frank Li <Frank.Li@nxp.com> Signed-off-by: Shawn Guo <shawnguo@kernel.org>
2024-04-24ARM: dts: BCM5301X: Conform to DTS Coding Style on ASUS RT-AC3100 & AC88UArınç ÜNAL2-81/+80
Reorder the nodes and properties to conform to the Devicetree Sources (DTS) Coding Style. Signed-off-by: Arınç ÜNAL <arinc.unal@arinc9.com> Reviewed-by: Linus Walleij <linus.walleij@linaro.org> Link: https://lore.kernel.org/r/20240423-for-soc-asus-rt-ac3200-ac5300-v3-5-23d33cfafe7a@arinc9.com Signed-off-by: Florian Fainelli <florian.fainelli@broadcom.com>
2024-04-24ARM: dts: BCM5301X: Add DT for ASUS RT-AC5300Arınç ÜNAL2-0/+157
Add the device tree for ASUS RT-AC5300 which is an AC5300 router featuring 5 Ethernet ports over the integrated Broadcom switch. Hardware info: * Processor: Broadcom BCM4709C0 dual-core @ 1.4 GHz * Switch: BCM53012 in BCM4709C0 * DDR3 RAM: 512 MB * Flash: 128 MB * 2.4GHz: BCM4366 4x4 single chip 802.11b/g/n SoC * 5GHz: BCM4366 4x4 two chips 802.11a/n/ac SoC * Ports: 4 LAN Ports, 1 WAN Port Co-developed-by: Tom Brautaset <tbrautaset@gmail.com> Signed-off-by: Tom Brautaset <tbrautaset@gmail.com> Signed-off-by: Arınç ÜNAL <arinc.unal@arinc9.com> Reviewed-by: Linus Walleij <linus.walleij@linaro.org> Link: https://lore.kernel.org/r/20240423-for-soc-asus-rt-ac3200-ac5300-v3-4-23d33cfafe7a@arinc9.com Signed-off-by: Florian Fainelli <florian.fainelli@broadcom.com>
2024-04-24ARM: dts: BCM5301X: Add DT for ASUS RT-AC3200Arınç ÜNAL2-0/+151
Add the device tree for ASUS RT-AC3200 which is an AC3200 router featuring 5 Ethernet ports over the integrated Broadcom switch. Hardware info: * Processor: Broadcom BCM4709A0 dual-core @ 1.0 GHz * Switch: BCM53012 in BCM4709A0 * DDR3 RAM: 256 MB * Flash: 128 MB * 2.4GHz: BCM43602 3x3 single chip 802.11b/g/n SoC * 5GHz: BCM43602 3x3 two chips 802.11a/n/ac SoC * Ports: 4 LAN Ports, 1 WAN Port Co-developed-by: Tom Brautaset <tbrautaset@gmail.com> Signed-off-by: Tom Brautaset <tbrautaset@gmail.com> Signed-off-by: Arınç ÜNAL <arinc.unal@arinc9.com> Reviewed-by: Linus Walleij <linus.walleij@linaro.org> Link: https://lore.kernel.org/r/20240423-for-soc-asus-rt-ac3200-ac5300-v3-3-23d33cfafe7a@arinc9.com Signed-off-by: Florian Fainelli <florian.fainelli@broadcom.com>
2024-04-24ARM: dts: bcm2835: Add Unicam CSI nodesJean-Michel Hautbois3-0/+46
Add both MIPI CSI-2 nodes in the bcm283x tree and take care of the Raspberry Pi / BCM2711 specific in the related files. Signed-off-by: Jean-Michel Hautbois <jeanmichel.hautbois@ideasonboard.com> Reviewed-by: Laurent Pinchart <laurent.pinchart@ideasonboard.com> Signed-off-by: Stefan Wahren <stefan.wahren@i2se.com> Link: https://lore.kernel.org/r/20240424153542.32503-6-laurent.pinchart@ideasonboard.com Signed-off-by: Florian Fainelli <florian.fainelli@broadcom.com>
2024-04-24ARM: dts: aspeed: Add vendor prefixes to lm25066 compat stringsZev Weiss2-3/+3
Due to the way i2c driver matching works (falling back to the driver's id_table if of_match_table fails) this didn't actually cause any misbehavior, but let's add the vendor prefixes so things actually work the way they were intended to. Signed-off-by: Zev Weiss <zev@bewilderbeest.net> Reviewed-by: Conor Dooley <conor.dooley@microchip.com> Reviewed-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org> Link: https://lore.kernel.org/r/20240224103712.20864-2-zev@bewilderbeest.net Signed-off-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org>
2024-04-23ARM: dts: qcom: msm8974: Add DTS for Samsung Galaxy S5 China (kltechn)Rong Zhang2-0/+17
The only difference between Samsung Galaxy S5 China (kltechn) and klte is the gpio pins of i2c_led_gpio. With pins corrected, the LEDs and WiFi are able to work properly. Signed-off-by: Rong Zhang <i@rong.moe> Reviewed-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org> Tested-by: Icenowy Zheng <uwu@icenowy.me> Link: https://lore.kernel.org/r/20240213110137.122737-5-i@rong.moe Signed-off-by: Bjorn Andersson <andersson@kernel.org>
2024-04-23ARM: dts: qcom: msm8974-klte-common: Pin WiFi board typeRong Zhang1-0/+6
klte* variants have little difference in the WiFi part. Without "brcm,board-type", variant-specific NVRAM file will be probed (e.g., klte probes samsung,klte). Pin it to "samsung,klte" to allow klte* to load the same NVRAM file as klte. Signed-off-by: Rong Zhang <i@rong.moe> Acked-by: Konrad Dybcio <konrad.dybcio@linaro.org> Tested-by: Icenowy Zheng <uwu@icenowy.me> Link: https://lore.kernel.org/r/20240213110137.122737-3-i@rong.moe Signed-off-by: Bjorn Andersson <andersson@kernel.org>
2024-04-23ARM: dts: qcom: msm8974: Split out common part of samsung-klteRong Zhang2-807/+818
Samsung Galaxy S5 has many variants. Variants that support LTE use klte* as their codename. Currently, the only supported one is the one without any suffix, namely, klte. It is known that other klte* variants have only minor differences compared to klte and can mostly work with the klte DTB. Split the common part into a common DTSI so that it can be imported in the DTS of klte and other klte* variants. Signed-off-by: Rong Zhang <i@rong.moe> Tested-by: Alexey Minnekhanov <alexeymin@postmarketos.org> Reviewed-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org> Tested-by: Icenowy Zheng <uwu@icenowy.me> Link: https://lore.kernel.org/r/20240213110137.122737-2-i@rong.moe Signed-off-by: Bjorn Andersson <andersson@kernel.org>
2024-04-23ARM: dts: stm32: List exti parent interrupts on stm32mp131Antonio Borneo1-1/+73
Stop using the table inside the EXTI driver and list in DT the mapping between EXTI events and its parent interrupts. By switching away from using the internal table, there is no need anymore to use the specific compatible "st,stm32mp13-exti", which was introduced to select the proper internal table. Convert the driver's table for stm32mp131 to the DT property interrupts-extended. Switch the compatible string to the generic "st,stm32mp1-exti", in place of the specific "st,stm32mp13-exti". Older DT using compatible "st,stm32mp13-exti" will still work as the driver remains backward compatible. Signed-off-by: Antonio Borneo <antonio.borneo@foss.st.com> Signed-off-by: Thomas Gleixner <tglx@linutronix.de> Link: https://lore.kernel.org/r/20240415134926.1254428-10-antonio.borneo@foss.st.com
2024-04-23ARM: dts: stm32: List exti parent interrupts on stm32mp151Antonio Borneo1-0/+75
Stop using the table inside the EXTI driver and list in DT the mapping between EXTI events and its parent interrupts. Convert the driver's table for stm32mp151 to the DT property interrupts-extended. Signed-off-by: Antonio Borneo <antonio.borneo@foss.st.com> Signed-off-by: Thomas Gleixner <tglx@linutronix.de> Link: https://lore.kernel.org/r/20240415134926.1254428-9-antonio.borneo@foss.st.com
2024-04-22ARM: dts: imx6: exchange fallback and specific compatible stringShengjiu Wang2-4/+4
Exchange fallback and specific compatible string for spdif sound card. The specific compatible string needs to be in first place, the fallback compatible string needs to be in the end. Signed-off-by: Shengjiu Wang <shengjiu.wang@nxp.com> Reviewed-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org> Acked-by: Conor Dooley <conor.dooley@microchip.com> Signed-off-by: Shawn Guo <shawnguo@kernel.org>
2024-04-22ARM: dts: imx6: remove fsl,anatop property from usb controller nodeXu Yang2-3/+0
This property is not needed for usb controller. The usb phy needs it instead. Signed-off-by: Xu Yang <xu.yang_2@nxp.com> Signed-off-by: Shawn Guo <shawnguo@kernel.org>
2024-04-22ARM: dts: imx27-phytec: Add USB supportMichael Grzeschik1-0/+78
This patch adds the pinmux and nodes for usbotg and usbh2. In v6 revision of the pca100 the usb phys were changed to usb3320 which are connected by their reset pins. We add the phy configuration to the description. Signed-off-by: Michael Grzeschik <m.grzeschik@pengutronix.de> Signed-off-by: Shawn Guo <shawnguo@kernel.org>
2024-04-21ARM: dts: qcom: sdx55: Add PCIe bridge nodeManivannan Sadhasivam1-0/+10
On Qcom SoCs, the PCIe host bridge is connected to a single PCIe bridge for each controller instance. Hence, add a node to represent the bridge. Signed-off-by: Manivannan Sadhasivam <manivannan.sadhasivam@linaro.org> Reviewed-by: Konrad Dybcio <konrad.dybcio@linaro.org> Link: https://lore.kernel.org/r/20240321-pcie-qcom-bridge-dts-v2-20-1eb790c53e43@linaro.org Signed-off-by: Bjorn Andersson <andersson@kernel.org>
2024-04-21ARM: dts: qcom: apq8064: Add PCIe bridge nodeManivannan Sadhasivam1-0/+10
On Qcom SoCs, the PCIe host bridge is connected to a single PCIe bridge for each controller instance. Hence, add a node to represent the bridge. Signed-off-by: Manivannan Sadhasivam <manivannan.sadhasivam@linaro.org> Reviewed-by: Konrad Dybcio <konrad.dybcio@linaro.org> Link: https://lore.kernel.org/r/20240321-pcie-qcom-bridge-dts-v2-19-1eb790c53e43@linaro.org Signed-off-by: Bjorn Andersson <andersson@kernel.org>
2024-04-21ARM: dts: qcom: ipq4019: Add PCIe bridge nodeManivannan Sadhasivam1-0/+10
On Qcom SoCs, the PCIe host bridge is connected to a single PCIe bridge for each controller instance. Hence, add a node to represent the bridge. Signed-off-by: Manivannan Sadhasivam <manivannan.sadhasivam@linaro.org> Reviewed-by: Konrad Dybcio <konrad.dybcio@linaro.org> Link: https://lore.kernel.org/r/20240321-pcie-qcom-bridge-dts-v2-18-1eb790c53e43@linaro.org Signed-off-by: Bjorn Andersson <andersson@kernel.org>
2024-04-21ARM: dts: qcom: ipq8064: Add PCIe bridge nodeManivannan Sadhasivam1-0/+30
On Qcom SoCs, the PCIe host bridge is connected to a single PCIe bridge for each controller instance. Hence, add a node to represent the bridge. Signed-off-by: Manivannan Sadhasivam <manivannan.sadhasivam@linaro.org> Reviewed-by: Konrad Dybcio <konrad.dybcio@linaro.org> Link: https://lore.kernel.org/r/20240321-pcie-qcom-bridge-dts-v2-17-1eb790c53e43@linaro.org Signed-off-by: Bjorn Andersson <andersson@kernel.org>
2024-04-21ARM: dts: microchip: at91-sama7g54_curiosity: Replace ↵Andrei Simion1-4/+4
regulator-suspend-voltage with the valid property By checking the pmic node with microchip,mcp16502.yaml# 'regulator-suspend-voltage' does not match any of the regexes 'pinctrl-[0-9]+' from schema microchip,mcp16502.yaml# which inherits regulator.yaml#. So replace regulator-suspend-voltage with regulator-suspend-microvolt to avoid the inconsitency. Fixes: ebd6591f8ddb ("ARM: dts: microchip: sama7g54_curiosity: Add initial device tree of the board") Signed-off-by: Andrei Simion <andrei.simion@microchip.com> Acked-by: Nicolas Ferre <nicolas.ferre@microchip.com> Link: https://lore.kernel.org/r/20240404123824.19182-3-andrei.simion@microchip.com Signed-off-by: Claudiu Beznea <claudiu.beznea@tuxon.dev>
2024-04-21ARM: dts: microchip: at91-sama7g5ek: Replace regulator-suspend-voltage with ↵Andrei Simion1-4/+4
the valid property By checking the pmic node with microchip,mcp16502.yaml# 'regulator-suspend-voltage' does not match any of the regexes 'pinctrl-[0-9]+' from schema microchip,mcp16502.yaml# which inherits regulator.yaml#. So replace regulator-suspend-voltage with regulator-suspend-microvolt to avoid the inconsitency. Fixes: 85b1304b9daa ("ARM: dts: at91: sama7g5ek: set regulator voltages for standby state") Signed-off-by: Andrei Simion <andrei.simion@microchip.com> Acked-by: Nicolas Ferre <nicolas.ferre@microchip.com> Link: https://lore.kernel.org/r/20240404123824.19182-2-andrei.simion@microchip.com [claudiu.beznea: added a dot before starting the last sentence in commit description] Signed-off-by: Claudiu Beznea <claudiu.beznea@tuxon.dev>
2024-04-17ARM: dts: BCM5301X: remove earlycon on ASUS RT-AC3100 and ASUS RT-AC88UArınç ÜNAL1-4/+0
Remove the earlycon boot argument. As Krzysztof pointed out, earlycon is for debugging, not regular mainline usage. Signed-off-by: Arınç ÜNAL <arinc.unal@arinc9.com> Reviewed-by: Krzysztof Kozlowski <krzk@kernel.org> Link: https://lore.kernel.org/r/20240414-for-soc-asus-rt-ac3100-improvements-v1-4-0e40caf1a70a@arinc9.com Signed-off-by: Florian Fainelli <florian.fainelli@broadcom.com>
2024-04-17ARM: dts: BCM5301X: remove duplicate compatible on ASUS RT-AC3100 & AC88UArınç ÜNAL1-1/+0
The compatible property on the node with the srab handle is already described with the same value on the included device tree. Remove it. Signed-off-by: Arınç ÜNAL <arinc.unal@arinc9.com> Link: https://lore.kernel.org/r/20240414-for-soc-asus-rt-ac3100-improvements-v1-3-0e40caf1a70a@arinc9.com Signed-off-by: Florian Fainelli <florian.fainelli@broadcom.com>
2024-04-17ARM: dts: BCM5301X: provide address for SoC MACs on ASUS RT-AC3100 & AC88UArınç ÜNAL2-2/+19
Do not leave the providing of a MAC address for an SoC MAC to a driver. Describe it on the bindings. Provide a distinct MAC address for each SoC MAC. Signed-off-by: Arınç ÜNAL <arinc.unal@arinc9.com> Link: https://lore.kernel.org/r/20240414-for-soc-asus-rt-ac3100-improvements-v1-2-0e40caf1a70a@arinc9.com Signed-off-by: Florian Fainelli <florian.fainelli@broadcom.com>
2024-04-17ARM: dts: BCM5301X: use color and function on ASUS RT-AC3100 and RT-AC88UArınç ÜNAL1-22/+32
As the label property for LEDs is deprecated, use the color and function properties to describe the LEDs on the device tree file for ASUS RT-AC3100 and ASUS RT-AC88U. Reorder the LED and button nodes in alphabetical order. Signed-off-by: Arınç ÜNAL <arinc.unal@arinc9.com> Link: https://lore.kernel.org/r/20240414-for-soc-asus-rt-ac3100-improvements-v1-1-0e40caf1a70a@arinc9.com Signed-off-by: Florian Fainelli <florian.fainelli@broadcom.com>
2024-04-16ARM: dts: sun5i: Add PocketBook 614 Plus supportDenis Burkov2-0/+219
What works: - Serial console - mmc0, mmc2 (both microSD card slots on the board) - All buttons (gpio and lradc based) - Power LED - PMIC - RTC - USB OTG/gadgets mode Signed-off-by: Denis Burkov <hitechshell@mail.ru> Reviewed-by: Jernej Skrabec <jernej.skrabec@gmail.com> Link: https://lore.kernel.org/r/20240415173416.13838-2-hitechshell@mail.ru Signed-off-by: Jernej Skrabec <jernej.skrabec@gmail.com>
2024-04-16arm: dts: allwinner: drop underscore in node namesKrzysztof Kozlowski49-86/+86
Underscores should not be used in node names (dtc with W=2 warns about them), so replace them with hyphens. Use also generic name for pwrseq node, because generic naming is favored by Devicetree spec. All the clocks affected by this change use clock-output-names, so resulting clock name should not change. Functional impact checked with comparing before/after DTBs with dtx_diff and fdtdump. Signed-off-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org> Reviewed-by: Jernej Skrabec <jernej.skrabec@gmail.com> Link: https://lore.kernel.org/r/20240317184130.157695-4-krzysztof.kozlowski@linaro.org Signed-off-by: Jernej Skrabec <jernej.skrabec@gmail.com>
2024-04-16arm64: dts: allwinner: Orange Pi: delete node by phandleKrzysztof Kozlowski1-1/+2
Delete node via phandle, not via full node path, to avoid easy mistakes - if original node name changes, such deletion would be ineffective and not reported by the dtc as error. Signed-off-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org> Reviewed-by: Jernej Skrabec <jernej.skrabec@gmail.com> Link: https://lore.kernel.org/r/20240317184130.157695-3-krzysztof.kozlowski@linaro.org Signed-off-by: Jernej Skrabec <jernej.skrabec@gmail.com>
2024-04-10ARM: dts: ti: omap: minor whitespace cleanupKrzysztof Kozlowski2-5/+5
The DTS code coding style expects exactly one space before '{' character. Acked-by: Tony Lindgren <tony@atomide.com> Link: https://lore.kernel.org/r/20240208105146.128645-2-krzysztof.kozlowski@linaro.org Signed-off-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org>
2024-04-10ARM: dts: dra7: Use clksel binding for CTRL_CORE_SMA_SW_0Tony Lindgren1-27/+36
On dra76x, most dpll_gmac output clksel clocks are in registers from CM_CLKSEL_DPLL_GMAC to CM_DIV_H13_DPLL_GMAC. In addition to that, there are there more clocks in the CTRL_CORE_SMA_SW_0 register. Let's group the CTRL_CORE_SMA_SW_0 clocks using the clksel binding to reduce make W=1 dtbs unique_unit_address warnings, and stop using the custom the ti,bit-shift property in favor of the standard reg property. Let's also add a comment for the CTRL_CORE_SMA_SW_0 clock that matches the documentation. Signed-off-by: Tony Lindgren <tony@atomide.com>
2024-04-10ARM: dts: dra7: Use clksel binding for CM_CLKSEL_DPLL_USBTony Lindgren1-15/+32
With the clkcsel binding we can drop the custom ti,bit-shift devicetree property in favor of the standard reg property and reduce the number of clocks to update for the make W-1 dtbs warnings. Let's also add a comment for the clocksel clock that matches the documentation. Signed-off-by: Tony Lindgren <tony@atomide.com>
2024-04-10ARM: dts: dra7: Use clksel binding for CM_CLKSEL_DPLL_PERTony Lindgren1-7/+15
With the clkcsel binding we can drop the custom ti,bit-shift devicetree property in favor of the standard reg property and reduce the number of clocks to update for the make W-1 dtbs warnings. Let's also add a comment for the clocksel clock that matches the documentation. Signed-off-by: Tony Lindgren <tony@atomide.com>
2024-04-10ARM: dts: dra7: Use clksel binding for CM_CLKSEL_ABE_PLL_SYSTony Lindgren1-6/+15
With the clkcsel binding we can drop the custom ti,bit-shift devicetree property in favor of the standard reg property and reduce the number of clocks to update for the make W-1 dtbs warnings. Let's also add a comment for the clocksel clock that matches the documentation. Signed-off-by: Tony Lindgren <tony@atomide.com>
2024-04-10ARM: dts: dra7: Use clksel binding for CM_CLKSEL_CORETony Lindgren1-9/+17
With the clkcsel binding we can drop the custom ti,bit-shift devicetree property in favor of the standard reg property and reduce the number of clocks to update for the make W-1 dtbs warnings. Let's also add a comment for the clocksel clock that matches the documentation. Signed-off-by: Tony Lindgren <tony@atomide.com>
2024-04-10ARM: dts: dra7: Use clksel binding for CM_CLKSEL_DPLL_EVETony Lindgren1-7/+15
With the clkcsel binding we can drop the custom ti,bit-shift devicetree property in favor of the standard reg property and reduce the number of clocks to update for the make W-1 dtbs warnings. Let's also add a comment for the clocksel clock that matches the documentation. Signed-off-by: Tony Lindgren <tony@atomide.com>
2024-04-10ARM: dts: dra7: Use clksel binding for CM_CLKSEL_DPLL_GMACTony Lindgren1-7/+15
With the clkcsel binding we can drop the custom ti,bit-shift devicetree property in favor of the standard reg property and reduce the number of clocks to update for the make W-1 dtbs warnings. Let's also add a comment for the clocksel clock that matches the documentation. Signed-off-by: Tony Lindgren <tony@atomide.com>
2024-04-10ARM: dts: dra7: Use clksel binding for CM_CLKSEL_DPLL_DRRTony Lindgren1-7/+15
With the clkcsel binding we can drop the custom ti,bit-shift devicetree property in favor of the standard reg property and reduce the number of clocks to update for the make W-1 dtbs warnings. Let's also add a comment for the clocksel clock that matches the documentation. Signed-off-by: Tony Lindgren <tony@atomide.com>
2024-04-10ARM: dts: dra7: Use clksel binding for CM_CLKSEL_DPLL_GPUTony Lindgren1-7/+15
With the clkcsel binding we can drop the custom ti,bit-shift devicetree property in favor of the standard reg property and reduce the number of clocks to update for the make W-1 dtbs warnings. Let's also add a comment for the clocksel clock that matches the documentation. Signed-off-by: Tony Lindgren <tony@atomide.com>
2024-04-10ARM: dts: dra7: Use clksel binding for CM_CLKSEL_DPLL_IVATony Lindgren1-7/+15
With the clkcsel binding we can drop the custom ti,bit-shift devicetree property in favor of the standard reg property and reduce the number of clocks to update for the make W-1 dtbs warnings. Let's also add a comment for the clocksel clock that matches the documentation. Signed-off-by: Tony Lindgren <tony@atomide.com>
2024-04-10ARM: dts: dra7: Use clksel binding for CM_CLKSEL_DPLL_DSPTony Lindgren1-7/+15
With the clkcsel binding we can drop the custom ti,bit-shift devicetree property in favor of the standard reg property and reduce the number of clocks to update for the make W-1 dtbs warnings. Let's also add a comment for the clocksel clock that matches the documentation. Signed-off-by: Tony Lindgren <tony@atomide.com>
2024-04-10ARM: dts: dra7: Use clksel binding for CM_CLKSEL_DPLL_CORETony Lindgren1-7/+15
With the clkcsel binding we can drop the custom ti,bit-shift devicetree property in favor of the standard reg property and reduce the number of clocks to update for the make W-1 dtbs warnings. Let's also add a comment for the clocksel clock that matches the documentation. Signed-off-by: Tony Lindgren <tony@atomide.com>
2024-04-09ARM: dts: ti: keystone: k2g: Remove ti,system-reboot-controller propertyAndrew Davis1-5/+0
The property ti,system-reboot-controller is no longer needed as the reboot handler is now always registered. Remove this property. While here remove the comment about delete-property, all K2G platforms use PMMC, and it wasn't good advice anyway. Signed-off-by: Andrew Davis <afd@ti.com> Link: https://lore.kernel.org/r/20240326223730.54639-4-afd@ti.com Signed-off-by: Nishanth Menon <nm@ti.com>
2024-04-09ARM: dts: qcom: msm8974-sony-shinano: Enable vibratorLuca Weiss1-0/+4
Enable the vibrator connected to PM8941 found on the Sony shinano platform. Signed-off-by: Luca Weiss <luca@z3ntu.xyz> Reviewed-by: Dmitry Baryshkov <dmitry.baryshkov@linaro.org> Link: https://lore.kernel.org/r/20240406-shinano-vib-v1-1-fdd02af39d56@z3ntu.xyz Signed-off-by: Bjorn Andersson <andersson@kernel.org>
2024-04-08ARM: dts: renesas: r9a06g032: Remove duplicate interrupt-parentGeert Uytterhoeven1-1/+0
As the "soc" node already specifies the GIC as the interrupt-parent, there is no reason to repeat this in any of its subnodes. Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be> Link: https://lore.kernel.org/r/7ac440ec923f5d781a93c4344d6fedf280c3fa72.1712064816.git.geert+renesas@glider.be
2024-04-08ARM: dts: qcom: ipq4019: add QCA8075 PHY Package nodesChristian Marangi1-13/+22
Add QCA8075 PHY Package nodes. The PHY nodes that were previously defined never worked and actually never had a driver to correctly setup these PHY. Now that we have a correct driver, correctly add the PHY Package node and set the default value of 300mw for tx driver strength following specification of ipq4019 SoC. Signed-off-by: Christian Marangi <ansuelsmth@gmail.com> Link: https://lore.kernel.org/r/20240211202700.17810-1-ansuelsmth@gmail.com Signed-off-by: Bjorn Andersson <andersson@kernel.org>
2024-04-08ARM: dts: qcom: Add support for Motorola Moto G (2013)Stanislav Jakubek2-0/+360
Add a device tree for the Motorola Moto G (2013) smartphone based on the Qualcomm MSM8226 SoC. Initially supported features: - Buttons (Volume Down/Up, Power) - eMMC - Hall Effect Sensor - SimpleFB display - TMP108 temperature sensor - Vibrator Note: the dhob and shob reserved-memory regions are seemingly a part of some Motorola specific (firmware?) mechanism, see [1]. [1] https://github.com/LineageOS/android_kernel_motorola_msm8226/blob/cm-14.1/Documentation/devicetree/bindings/misc/hob_ram.txt Reviewed-by: Konrad Dybcio <konrad.dybcio@linaro.org> Signed-off-by: Stanislav Jakubek <stano.jakubek@gmail.com> Link: https://lore.kernel.org/r/ef86e9c84b082f7549f2ca825adfb5cbea640637.1712480582.git.stano.jakubek@gmail.com Signed-off-by: Bjorn Andersson <andersson@kernel.org>
generated by cgit v1.2.3 (git 2.39.0) at 2025-09-26 09:33:19 +0300