Age | Commit message (Collapse) | Author | Files | Lines |
|
Move adc14 and adc15 (battery sensor) into single iio-hwmon node to
correct label to be read by single application for all adc sensors.
Signed-off-by: Quan Nguyen <quan@os.amperecomputing.com>
Signed-off-by: Thang Q. Nguyen <thang@os.amperecomputing.com>
Reviewed-by: Joel Stanley <joel@jms.id.au>
Link: https://lore.kernel.org/r/20220228000242.1884-6-quan@os.amperecomputing.com
Signed-off-by: Joel Stanley <joel@jms.id.au>
|
|
GPIO hog nodes must have a "hog-" prefix or "-hog" suffix according to
the DT schema. Rename the node to pass dtbs_check.
Signed-off-by: Quan Nguyen <quan@os.amperecomputing.com>
Reviewed-by: Joel Stanley <joel@jms.id.au>
Link: https://lore.kernel.org/r/20220228000242.1884-5-quan@os.amperecomputing.com
Signed-off-by: Joel Stanley <joel@jms.id.au>
|
|
Update the input GPIO that indicates Host ready.
Link: https://github.com/openbmc/docs/blob/master/designs/device-tree-gpio-naming.md#host-ready
Signed-off-by: Quan Nguyen <quan@os.amperecomputing.com>
Signed-off-by: Thang Q. Nguyen <thang@os.amperecomputing.com>
Reviewed-by: Joel Stanley <joel@jms.id.au>
Link: https://lore.kernel.org/r/20220228000242.1884-4-quan@os.amperecomputing.com
Signed-off-by: Joel Stanley <joel@jms.id.au>
|
|
Update the output pin name that enables reading RTC battery voltage.
Link: https://github.com/openbmc/docs/blob/master/designs/device-tree-gpio-naming.md#rtc-battery-voltage-read-enable
Signed-off-by: Quan Nguyen <quan@os.amperecomputing.com>
Signed-off-by: Thang Q. Nguyen <thang@os.amperecomputing.com>
Reviewed-by: Joel Stanley <joel@jms.id.au>
Link: https://lore.kernel.org/r/20220228000242.1884-3-quan@os.amperecomputing.com
Signed-off-by: Joel Stanley <joel@jms.id.au>
|
|
Enable the secondary flash of the Ampere's Mt. Jade's BMC.
Signed-off-by: Quan Nguyen <quan@os.amperecomputing.com>
Signed-off-by: Thang Q. Nguyen <thang@os.amperecomputing.com>
Reviewed-by: Joel Stanley <joel@jms.id.au>
Link: https://lore.kernel.org/r/20220228000242.1884-2-quan@os.amperecomputing.com
Signed-off-by: Joel Stanley <joel@jms.id.au>
|
|
git://git.kernel.org/pub/scm/linux/kernel/git/atorgue/stm32 into arm/dt
STM32 DT for v5.18, round 1
Highlights:
----------
-MCU:
-Fix W=1 warnings for timers (duplicate unit-address) for F4 and F7 series.
-Enable DMA2D on f469 disco.
- MPU:
-General:
- Add new board support: emSBS-Argon.
- Add dma configuration for all U(S)ART nodes and disable them in board files
when they are not needed in stm32mp15.
- Correct GIC PPI interrupts on stm32mp15 and stm32mp13.
- ST boards:
- Add EXTI support on stm32mp13
- Add DMA, MDMA and DMAmux support to stm32mp13 (iso feature than MP15)
- Update SDMMC1/2 support on stm32mp13: sleep config, update version to v2.2,
update the max frequency to 130 MHz.
- DH boards:
- Enable rproc to control the CM4 and IPCC mailbox to interact with it.
* tag 'stm32-dt-for-v5.18-1' of git://git.kernel.org/pub/scm/linux/kernel/git/atorgue/stm32: (43 commits)
ARM: dts: stm32: Correct masks for GIC PPI interrupts on stm32mp15
ARM: dts: stm32: Correct masks for GIC PPI interrupts on stm32mp13
ARM: dts: stm32: remove timer5 duplicate unit-address on stm32f7 series
ARM: dts: stm32: remove some timer duplicate unit-address on stm32f7 series
ARM: dts: stm32: Enable EXTI on stm32mp13
ARM: dts: stm32: keep uart nodes behavior on stm32mp15xx-dhcor-avenger96
ARM: dts: stm32: keep uart4 behavior on stm32mp15xx-dhcom-som
ARM: dts: stm32: keep uart nodes behavior on stm32mp15xx-dhcom-picoitx
ARM: dts: stm32: keep uart nodes behavior on stm32mp15xx-dhcom-pdk2
ARM: dts: stm32: keep uart nodes behavior on stm32mp15xx-dhcom-drc02
ARM: dts: stm32: keep uart4 behavior on stm32mp157c-odyssey
ARM: dts: stm32: keep uart4 behavior on stm32mp157c-lxa-mc1
ARM: dts: stm32: keep uart nodes behavior on stm32mp157a-stinger96
ARM: dts: stm32: keep uart nodes behavior on stm32mp1-microdev2.0
ARM: dts: stm32: keep uart nodes behavior on stm32mp1-microdev2.0-of7
ARM: dts: stm32: keep uart4 behavior on stm32mp157a-iot-box
ARM: dts: stm32: keep uart4 behavior on icore-stm32mp1-edimm2.2
ARM: dts: stm32: keep uart4 behavior on icore-stm32mp1-ctouch2
ARM: dts: stm32: keep uart4 and uart7 behavior on stm32mp15xx-dkx
ARM: dts: stm32: keep uart4 behavior on stm32mp157c-ed1
...
Link: https://lore.kernel.org/r/893924a9-bcc4-9fa9-4f8e-7f56e77f6854@foss.st.com
Signed-off-by: Arnd Bergmann <arnd@arndb.de>
|
|
git://git.kernel.org/pub/scm/linux/kernel/git/at91/linux into arm/dt
AT91 & LAN966 DT #1 for 5.18:
- lan966x basic DT and associated evaluation board pcb8291 (2-ports)
- documentation for an upcoming Kontron switch board featuring a LAN9668
- one fix for an old bug we have with PMECC on sama5d2 in some corner
cases
- sama7g5 and its EK: crypto, CAN and DVFS operating points
* tag 'at91-dt-5.18' of git://git.kernel.org/pub/scm/linux/kernel/git/at91/linux:
ARM: dts: at91: sama7g5: add opps
ARM: dts: at91: sama7g5ek: set regulator voltages for standby state
ARM: dts: at91: fix low limit for CPU regulator
ARM: dts: at91: sama7g5: Enable can0 and can1 support in sama7g5-ek
ARM: dts: at91: sama7g5: Add can controllers of sama7g5
ARM: dts: at91: sama7g5: Add crypto nodes
ARM: dts: at91: Use the generic "crypto" node name for the crypto IPs
ARM: dts: at91: remove status = "okay" from soc specific dtsi
ARM: dts: at91: sama5d2: Fix PMERRLOC resource size
dt-bindings: arm: at91: add Kontron's new KSwitches
ARM: dts: add DT for lan966 SoC and 2-port board pcb8291
Link: https://lore.kernel.org/r/20220225110735.18080-1-nicolas.ferre@microchip.com
Signed-off-by: Arnd Bergmann <arnd@arndb.de>
|
|
git://git.kernel.org/pub/scm/linux/kernel/git/geert/renesas-devel into arm/dt
Renesas ARM DT updates for v5.18 (take two)
- Document the use of the renesas-soc IRC channel,
- Watchdog support for the R-Car S4-8, RZ/N1D, and RZ/G2LC SoCs on the
Spider, RZN1D-DB, and RZ/G2LC SMARC EVK development boards,
- Miscellaneous fixes and improvements.
* tag 'renesas-arm-dt-for-v5.18-tag2' of git://git.kernel.org/pub/scm/linux/kernel/git/geert/renesas-devel:
ARM: dts: renesas: Align GPIO hog names with dtschema
arm64: dts: renesas: Align GPIO hog names with dtschema
arm64: dts: renesas: rzg2lc-smarc-som: Enable watchdog
ARM: dts: r9a06g032-rzn1d400-db: Enable watchdog0 with a 60s timeout
ARM: dts: r9a06g032: Add the watchdog nodes
dt-bindings: clock: r9a06g032: Add the definition of the watchdog clock
arm64: dts: renesas: spider-cpu: Enable watchdog timer
arm64: dts: renesas: r8a779f0: Add RWDT node
MAINTAINERS: Specify IRC channel for Renesas ARM64 port
MAINTAINERS: Specify IRC channel for Renesas ARM32 port
arm64: dts: renesas: ulcb-kf: fix wrong comment
Link: https://lore.kernel.org/r/cover.1645784466.git.geert+renesas@glider.be
Signed-off-by: Arnd Bergmann <arnd@arndb.de>
|
|
git://git.kernel.org/pub/scm/linux/kernel/git/mmind/linux-rockchip into arm/dt
Remove an unneeded status property from the crypto-node
on rk3288.
* tag 'v5.18-rockchip-dts32-1' of git://git.kernel.org/pub/scm/linux/kernel/git/mmind/linux-rockchip:
ARM: dts: rockchip: remove status from rk3288 crypto node
Link: https://lore.kernel.org/r/19595245.eudUkVceaq@phil
Signed-off-by: Arnd Bergmann <arnd@arndb.de>
|
|
git://git.kernel.org/pub/scm/linux/kernel/git/sunxi/linux into arm/dt
Usual round of DT patches for the 5.18 merge window, with:
- DT fixes
- ethernet0 alias for Nanopi NEO
- r_uart node for H3/H5
- eMMC and bluetooth nodes for Nanopi NEO air
- updated maintainers for Allwinner SoCs
- new board: A20-Marsboard
* tag 'sunxi-dt-for-5.18-1' of git://git.kernel.org/pub/scm/linux/kernel/git/sunxi/linux:
MAINTAINERS: Update Allwinner SoCs maintainers
ARM: dts: sun8i-h3: Drop args in 'thermal-sensors'
ARM: dts: sun8i: v3s: Move the csi1 block to follow address order
ARM: dts: sun8i: Add ethernet0 alias in Nanopi NEO's device tree
dt-bindings: arm: sunxi: add haoyu,a20-marsboard
ARM: dts: sun7i: Add A20-Marsboard
ARM: dts: sunxi: h3/h5: add r_uart node
ARM: dts: nanopi-neo-air: Add eMMC and bluetooth
Link: https://lore.kernel.org/r/YhgMJ0AqaHopzaW3@kista.localdomain
Signed-off-by: Arnd Bergmann <arnd@arndb.de>
|
|
git://git.kernel.org/pub/scm/linux/kernel/git/tmlind/linux-omap into arm/dt
Devicetree changes for omaps for v5.18
Devicetree changes for omaps for v5.18:
- The devicetree node naming for pdu001 RTC name gets corrected
- For logicpd-torpedo baseboard, isp1763 USB controller gets added
- New board variant for SanCloud BBE Extended WiFi gets added
* tag 'omap-for-v5.18/dt-signed' of git://git.kernel.org/pub/scm/linux/kernel/git/tmlind/linux-omap:
ARM: dts: am335x-sancloud-bbe-extended-wifi: New devicetree
ARM: dts: logicpd-torpedo: Add isp1763 support to baseboard
ARM: dts: am334x: pdu001: Use correct node name for RTC
Link: https://lore.kernel.org/r/pull-1645606669-127734@atomide.com
Signed-off-by: Arnd Bergmann <arnd@arndb.de>
|
|
git://git.kernel.org/pub/scm/linux/kernel/git/shawnguo/linux into arm/dt
i.MX arm device tree change for 5.18:
- A series from Alexander Stein to update imx6qdl based TQMA6 and MBA6
devices, adding I2C bus recovery, marking GPIO buttons as wakeup
source etc.
- A set of maintenance patches from Oleksij Rempel adding display,
CAN termination and thermal support for i.MX6 based boards from
Plymovent, Protonic and from Kverneland.
- A couple of patches from Thierry Reding to correct i.MX28 RTC
compatbile, and rename RTC device nodes for i.MX SoCs.
- Update i.MX7 device tree to use audio_mclk_post_div clock instead of
audio_mclk_root_clk, and move PCIe out of AIPS3 bus.
- A couple of patches on imx6qdl-phytec to support PMIC MFD subdevices.
- Add pinctrl header support for i.MXRT1050 SoC.
- Other small and random changes.
* tag 'imx-dt-5.18' of git://git.kernel.org/pub/scm/linux/kernel/git/shawnguo/linux: (22 commits)
ARM: dts: imx6qp-sabresd: Enable PCIe support
ARM: dts: imx6dl: plym2m, prtvt7, victgo: add thermal zones and hwmon
ARM: dts: imx6dl: plym2m, prtvt7, victgo: make use of new resistive-adc-touch driver
ARM: dts: imx6qdl-vicut1: add CAN termination support
ARM: dts: imx6dl-prtvt7: Add missing tvp5150 video decoder node
ARM: dts: imx6dl-prtvt7: Add display and panel nodes
ARM: dts: imx6qdl-mba6: Move pinmux to regulator node
ARM: dts: imx6qdl: tqma6: Remove obsolete comment
ARM: dts: imx6qdl: tqma6: Mark gpio-buttons as wakeup-source
ARM: dts: imx6qdl: tqma6: Add i2c bus recovery
ARM: dts: imx6qdl-mba6: Move rtc alias to common location
ARM: dts: imx7: Move PCIe out of AIPS3
ARM: dts: imx: Add missing LVDS decoder on M53Menlo
ARM: dts: imx6qdl-phytec: handle unneeded MFD-subdevices correctly
ARM: dts: imx6qdl-phytec: add missing pmic MFD subdevices
ARM: dts: imx7: Use audio_mclk_post_div instead audio_mclk_root_clk
ARM: dts: imx28: reparent gpmi clock to ref_gpmi
ARM: dts: imxrt1050-pinfunc: Add pinctrl binding header
ARM: dts: imx6sx-udoo-neo: Add HDMI support
ARM: dts: imx6qdl-dhcom-pdk2: Include missing headers
...
Link: https://lore.kernel.org/r/20220222075226.160187-4-shawnguo@kernel.org
Signed-off-by: Arnd Bergmann <arnd@arndb.de>
|
|
git://git.kernel.org/pub/scm/linux/kernel/git/joel/bmc into arm/dt
Nuvoton device tree updates for 5.18
* Additions to wpcm450 following the upstremaing of the pinctrl/gpio
driver for this platform
* Match more of the platform in MAINTAINERS
* tag 'nuvoton-5.18-devicetree' of git://git.kernel.org/pub/scm/linux/kernel/git/joel/bmc:
MAINTAINERS: ARM/WPCM450: Add 'W:' line with wiki
ARM: dts: wpcm450: Add pinmux information to UART0
ARM: dts: wpcm450-supermicro-x9sci-ln4f: Add GPIO LEDs and buttons
ARM: dts: wpcm450: Add pin functions
ARM: dts: wpcm450: Add pinctrl and GPIO nodes
ARM: dts: wpcm450: Add global control registers (GCR) node
MAINTAINERS: Match all of bindings/arm/npcm/ as part of NPCM architecture
dt-bindings: arm/npcm: Add binding for global control registers (GCR)
Link: https://lore.kernel.org/r/CACPK8XdjF6dG04hR+iMpUP8=LSJi5x-hRivgCGDaY7o_461eJw@mail.gmail.com
Signed-off-by: Arnd Bergmann <arnd@arndb.de>
|
|
arm/dt
* 'mstar-dt-next' of https://github.com/linux-chenxing/linux:
ARM: mstar: Extend opp_table for infinity2m
ARM: mstar: Add OPP table for infinity3
ARM: mstar: Add OPP table for infinity
ARM: mstar: Link cpupll to second core
ARM: mstar: Link cpupll to cpu
ARM: mstar: Add cpupll to base dtsi
dt-bindings: clk: mstar msc313 cpupll binding description
ARM: dts: mstar: Add board for 100ask DongShanPiOne
dt-bindings: arm: mstar: Add compatible for 100ask DongShanPiOne
dt-bindings: vendor-prefixes: Add prefix for 100ask
ARM: dts: mstar: Add a dts for Miyoo Mini
dt-bindings: arm: mstar: Add compatible for Miyoo Mini
dt-bindings: vendor-prefixes: Add prefix for Miyoo
ARM: dts: mstar: Add the Wireless Tag IDO-SBC2D06-V1B-22W
dt-bindings: add vendor prefix for Wireless Tag
ARM: dts: mstar: Set gpio compatible for ssd20xd
Link: https://lore.kernel.org/r/20220216193131.59794-1-romain.perier@gmail.com
Signed-off-by: Arnd Bergmann <arnd@arndb.de>
|
|
git://git.kernel.org/pub/scm/linux/kernel/git/pchotard/sti into arm/dt
STi DT update:
- various DT fixes to avoid warnings when build with W=1
- DT clean-up
Signed-off-by: Arnd Bergmann <arnd@arndb.de>
|
|
git://git.kernel.org/pub/scm/linux/kernel/git/linusw/linux-nomadik into arm/dt
IXP4xx patches for the v5.18 kernel cycle:
- Fix up the WG302 to support the v1 version (also tested)
- Fix up the syscon size
- Drop the alias for UART1 in GW7001
* tag 'ixp4xx-dts-v5.18' of git://git.kernel.org/pub/scm/linux/kernel/git/linusw/linux-nomadik:
ARM: dts: Drop serial 1 alias on GW7001
ARM: dts: ixp42x: Expand syscon register range
ARM: dts: ixp4xx: Fix up the Netgear WG302 device tree
Link: https://lore.kernel.org/r/CACRpkdaMk+XECwhXJYeiF8SMU6cQsj_dk8gGMoPE3zAURAPqTw@mail.gmail.com
Signed-off-by: Arnd Bergmann <arnd@arndb.de>
|
|
git://git.kernel.org/pub/scm/linux/kernel/git/linusw/linux-nomadik into arm/dt
Ux500 DTS updates for the v5.18 kernel cycle:
- Add battery thermal zones so we can monitor the battery temperature
- Enable charging options on AB8505
- Fix up all the AB8500 and AB8505 nodes in accordance with the new
schema.
- Fix the mounting matrix for the Janice phone.
* tag 'ux500-dts-v5.18-1' of git://git.kernel.org/pub/scm/linux/kernel/git/linusw/linux-nomadik:
ARM: dts: ux500: Correct Janice accel mount matrix
ARM: dts: ux500: Update AB850[05] nodes
ARM: dts: AB8505: Enable charging options
ARM: dts: ux500: Add battery thermal zones and NTCs
Link: https://lore.kernel.org/r/CACRpkdaDcEqtSnWzRBnBHVweh2n=Dj3meHG9LND+K0Czb9ORGg@mail.gmail.com
Signed-off-by: Arnd Bergmann <arnd@arndb.de>
|
|
git://git.kernel.org/pub/scm/linux/kernel/git/geert/renesas-devel into arm/dt
Renesas ARM DT updates for v5.18
- External interrupt (INTC-EX) support for the R-Car V3U SoC,
- Initial support for the RZ/G2LC and RZ/V2L SoCs, and the RZ/G2LC and
RZ/V2L SMARC EVK development boards,
- Support for MAX9286 GMSL deserializers and GSML cameras on the Eagle
and Condor development boards,
- NAND support for the RZ/N1D SoC,
- DMA engine (SYS-DMAC) support for the R-Car S4-8 SoC,
- LVDS support for the R-Car M3-W+ SoC,
- HDMI output and 9-axis sensor support for the Kingfisher (ULCB
extension) board,
- MAX96712 GMSL serializer support for the Falcon development board,
- MOST network support for the R-Car H3, M3-W, M3-W+, M3-N, E3, and D3
SoCs,
- Miscellaneous fixes and improvements.
* tag 'renesas-arm-dt-for-v5.18-tag1' of git://git.kernel.org/pub/scm/linux/kernel/git/geert/renesas-devel: (27 commits)
arm64: dts: renesas: rzg2lc-smarc: Use SW_SD0_DEV_SEL macro for eMMC/SDHI device selection
arm64: dts: renesas: rzg2lc-smarc: Enable CANFD channel 1
arm64: dts: renesas: rzg2lc-smarc: Enable SCIF1 on carrier board
arm64: dts: renesas: rzg2lc-smarc: Add macros for DIP-Switch settings
arm64: dts: renesas: rzg2l-smarc: Add common dtsi file
arm64: dts: renesas: rzg2lc-smarc: Enable microSD on SMARC platform
arm64: dts: renesas: rzg2lc-smarc-som: Enable eMMC on SMARC platform
arm64: dts: renesas: Add initial device tree for RZ/V2L SMARC EVK
arm64: dts: renesas: Add initial DTSI for RZ/V2L SoC
dt-bindings: clock: Add R9A07G054 CPG Clock and Reset Definitions
arm64: dts: renesas: ulcb/ulcb-kf: switch to use audio-graph-card2 for sound
arm64: dts: renesas: rcar-gen3: Add MOST devices
arm64: dts: renesas: Miscellaneous whitespace fixes
arm64: dts: renesas: falcon-csi-dsi: Add and connect MAX96712
arm64: dts: renesas: ulcb-kf: Add 9-asix sensor device
arm64: dts: renesas: ulcb-kf: Add KF HDMI output
arm64: dts: renesas: r8a77961: Add lvds0 device node
arm64: dts: renesas: r8a779f0: Add sys-dmac nodes
ARM: dts: r9a06g032: Describe the NAND controller
arm64: dts: renesas: Add GMSL cameras .dtsi
...
Link: https://lore.kernel.org/r/cover.1644587200.git.geert+renesas@glider.be
Signed-off-by: Arnd Bergmann <arnd@arndb.de>
|
|
git://git.kernel.org/pub/scm/linux/kernel/git/krzk/linux into arm/dt
Samsung pinctrl DTS and driver changes for v5.18
Conversion of Samsung pinctrl bindings to dtschema followed up with
alignment of DTS files to the dtschema.
The entire work consists of three parts but everything should be merged
at once to avoid dtschema check errors:
1. Samsung pinctrl driver change necessary to accept new DTS (driver
depends on node names and this has to be adjusted because of dtschema).
2. Conversion to dtschema which brings requirement of different naming
of the GPIO nodes.
3. DTS commits depending on driver (1) above, which convert all GPIO pin
bank names to new naming, required by dtschema.
This also includes few cleanups around DTS which are here to avoid
any merge conflicts.
The Samsung pinctrl driver changes are backwards compatible. However
the DTS changes (renaming nodes) could cause problems in out-of-tree or
other project implementations of the driver.
* tag 'samsung-dt-pinctrl-5.18' of git://git.kernel.org/pub/scm/linux/kernel/git/krzk/linux: (28 commits)
arm64: dts: exynos: use dedicated wake-up pinctrl compatible in ExynosAutov9
ARM: dts: s5pv210: align pinctrl with dtschema
ARM: dts: s3c64xx: align pinctrl with dtschema
ARM: dts: s3c24xx: align pinctrl with dtschema
arm64: dts: exynos: align pinctrl with dtschema in ExynosAutov9
arm64: dts: exynos: align pinctrl with dtschema in Exynos7
arm64: dts: exynos: align pinctrl with dtschema in Exynos5433
ARM: dts: exynos: align pinctrl with dtschema in Exynos542x/5800
ARM: dts: exynos: align pinctrl with dtschema in Exynos5410
ARM: dts: exynos: align pinctrl with dtschema in Exynos5260
ARM: dts: exynos: align pinctrl with dtschema in Exynos5250
ARM: dts: exynos: align pinctrl with dtschema in Exynos4412
ARM: dts: exynos: align pinctrl with dtschema in Exynos4210
ARM: dts: exynos: align pinctrl with dtschema in Exynos3250
ARM: dts: s3c64xx: drop unneeded pinctrl wake-up interrupt mapping
ARM: dts: exynos: simplify PMIC DVS pin configuration in Peach Pi
ARM: dts: exynos: override pins by label in Peach Pi
ARM: dts: exynos: simplify PMIC DVS pin configuration in Peach Pit
ARM: dts: exynos: override pins by label in Peach Pit
ARM: dts: exynos: simplify PMIC DVS pin configuration in Odroid XU
...
Link: https://lore.kernel.org/r/20220129115352.13274-1-krzysztof.kozlowski@canonical.com
Signed-off-by: Arnd Bergmann <arnd@arndb.de>
|
|
git://git.kernel.org/pub/scm/linux/kernel/git/dinguyen/linux into arm/dt
SoCFPGA dts updates for v5.18, part 1
- Cleanup of Altera/Intel ARMv7 and ARMv8 DTS and bindings
* tag 'socfpga_dts_update_for_v5.18_part1' of git://git.kernel.org/pub/scm/linux/kernel/git/dinguyen/linux: (22 commits)
ARM: dts: socfpga: cyclone5: align regulator node with dtschema
ARM: dts: socfpga: arria10: align regulator node with dtschema
arm64: dts: agilex: align pl330 node name with dtschema
arm64: dts: stratix10: align pl330 node name with dtschema
arm64: dts: intel: socfpga_agilex_socdk: align LED node names with dtschema
arm64: dts: agilex: align mmc node names with dtschema
arm64: dts: agilex: add board compatible for N5X DK
arm64: dts: agilex: add board compatible for SoCFPGA DK
arm64: dts: stratix10: align regulator node names with dtschema
arm64: dts: stratix10: align mmc node names with dtschema
arm64: dts: stratix10: move ARM timer out of SoC node
arm64: dts: stratix10: add board compatible for SoCFPGA DK
ARM: dts: arria10: add board compatible for SoCFPGA DK
ARM: dts: arria10: add board compatible for Mercury AA1
ARM: dts: arria5: add board compatible for SoCFPGA DK
dt-bindings: clock: intel,stratix10: convert to dtschema
dt-bindings: intel: document Agilex based board compatibles
dt-bindings: altera: document Stratix 10 based board compatibles
dt-bindings: altera: document VT compatibles
dt-bindings: altera: document Arria 10 based board compatibles
...
Link: https://lore.kernel.org/r/20220211112556.98940-1-dinguyen@kernel.org
Signed-off-by: Arnd Bergmann <arnd@arndb.de>
|
|
This patch fixes the tristate configuration for i2c3 function assigned
to the dtf pins on the Tamonten Tegra20 SoM.
Signed-off-by: Richard Leitner <richard.leitner@skidata.com>
Signed-off-by: Thierry Reding <treding@nvidia.com>
|
|
Add OPPs for SAMA7G5 along with clock for CPU.
Signed-off-by: Claudiu Beznea <claudiu.beznea@microchip.com>
Signed-off-by: Nicolas Ferre <nicolas.ferre@microchip.com>
Link: https://lore.kernel.org/r/20220113144900.906370-9-claudiu.beznea@microchip.com
|
|
Set regulator voltages for standby state to avoid wrong behavior of
system while in standby. The CPU voltage has been chosen as being the
one corresponding to OPP=600MHz. Next commit will set the 600MHz OPP
as the suspend OPP.
Signed-off-by: Claudiu Beznea <claudiu.beznea@microchip.com>
Signed-off-by: Nicolas Ferre <nicolas.ferre@microchip.com>
Link: https://lore.kernel.org/r/20220113144900.906370-8-claudiu.beznea@microchip.com
|
|
Fix low limit for CPU regulator. Otherwise setting voltages lower than
1.125V will not be allowed (CPUFreq will not be allowed to set proper
voltages on proper frequencies).
Signed-off-by: Claudiu Beznea <claudiu.beznea@microchip.com>
Signed-off-by: Nicolas Ferre <nicolas.ferre@microchip.com>
Link: https://lore.kernel.org/r/20220113144900.906370-7-claudiu.beznea@microchip.com
|
|
Enable the can0 and can1 controllers in sama7g5-ek board along with
its pin mux settings.
Signed-off-by: Hari Prasath <Hari.PrasathGE@microchip.com>
Signed-off-by: Nicolas Ferre <nicolas.ferre@microchip.com>
Link: https://lore.kernel.org/r/20220222113924.25799-3-Hari.PrasathGE@microchip.com
|
|
Add support for all the six CAN controllers of sama7g5.The internal SRAM of 128KB
is split among the CAN controllers for the message RAM elements leaving a small
portion reserved for power management. The SRAM split up is as below.
Lower 64K:
PM 13K
can-0 17K
can-1 17K
can-2 17K
Higher 64K:
can-3 17K
can-4 17K
can-5 17K
Signed-off-by: Hari Prasath <Hari.PrasathGE@microchip.com>
Signed-off-by: Nicolas Ferre <nicolas.ferre@microchip.com>
Link: https://lore.kernel.org/r/20220222113924.25799-2-Hari.PrasathGE@microchip.com
|
|
Describe and enable the AES, SHA and TDES crypto IPs. Tested with the
extra run-time self tests of the registered crypto algorithms.
Signed-off-by: Tudor Ambarus <tudor.ambarus@microchip.com>
Reviewed-by: Claudiu Beznea <claudiu.beznea@microchip.com>
Signed-off-by: Nicolas Ferre <nicolas.ferre@microchip.com>
Link: https://lore.kernel.org/r/20220208105646.226623-1-tudor.ambarus@microchip.com
|
|
git://git.kernel.org/pub/scm/linux/kernel/git/tmlind/linux-omap into arm/fixes
Fixes for omaps
Fixes for devkit8000 timer regression. Similar to the earlier beagleboard
fixes, we must not configure the clocksource drivers to use an alternative
timer configuration. It causes unnecessary issues with power management.
Only some old designs based on early beagleboard revisions with a miswired
timer need to use the alternative timer.
* tag 'omap-for-v5.17/fixes-signed' of git://git.kernel.org/pub/scm/linux/kernel/git/tmlind/linux-omap:
ARM: dts: Use 32KiHz oscillator on devkit8000
ARM: dts: switch timer config to common devkit8000 devicetree
Link: https://lore.kernel.org/r/pull-1645606483-876944@atomide.com
Signed-off-by: Arnd Bergmann <arnd@arndb.de>
|
|
Using GIC_CPU_MASK_SIMPLE(x), x should reflect the number of CPUs.
STM32MP151 is a single A7.
STM32MP153/157 is a dual A7.
Signed-off-by: Alexandre Torgue <alexandre.torgue@foss.st.com>
Acked-by: Marc Zyngier <maz@kernel.org>
|
|
Using GIC_CPU_MASK_SIMPLE(x), x should reflect the number of CPUs.
STM32MP13 is a single core A7.
Signed-off-by: Alexandre Torgue <alexandre.torgue@foss.st.com>
Acked-by: Marc Zyngier <maz@kernel.org>
|
|
Remove the following warnings seen when building with W=1.
Warning (unique_unit_address): /soc/timer@40000c00: duplicate unit-address
(also used in node /soc/timers@40000c00)
This approach is based on some discussions[1], to restructure the dtsi
and dts files.
Timer5 is enabled by default on stm32f7 series, to act as clockevent. In
order to get rid of the W=1 warning, and be compliant with dt-schemas
(e.g. dtbs_check):
- In stm32f746.dtsi:
. Keep the more complete timers5 description
. Remove the most simple timer5 node that is duplicate
- In each board:
. adopt "st,stm32-timer" compatible for timers5, also add the interrupt
. use /delete-property/ and /delete-node/ so the it matches the
clockevent bindings
Note: all this is done in one shot (e.g. not split) to keep clockevent
functionality.
[1] https://lore.kernel.org/linux-arm-kernel/Yaf4jiZIp8+ndaXs@robh.at.kernel.org/
Signed-off-by: Fabrice Gasnier <fabrice.gasnier@foss.st.com>
Signed-off-by: Alexandre Torgue <alexandre.torgue@foss.st.com>
|
|
Several unused "timer" are duplicate nodes of "timers" nodes.
There are two dt-schemas:
- timer/st,stm32-timer.yaml: A timer is needed on STM32F7 series, on all
boards, to act as clockevent.
- mfd/st,stm32-timers.yaml: Timers can be used for other purpose.
By default, timer5 is left enabled to be used as clockevent. Remove all
other timer clockevent nodes that are currently unused and duplicated.
This removes several messages: Warning (unique_unit_address): /soc/timer@..
duplicate unit-address (also used in node /soc/timers@...)
Signed-off-by: Fabrice Gasnier <fabrice.gasnier@foss.st.com>
Signed-off-by: Alexandre Torgue <alexandre.torgue@foss.st.com>
|
|
As EXTI/GIC mapping has changed between STM32MP15 and STM32MP13, a new
compatible is needed to choose mp13 mapping table in stm32-exti driver.
Signed-off-by: Alexandre Torgue <alexandre.torgue@foss.st.com>
|
|
DMA configuration is added to uart nodes in stm32mp15x device tree.
Delete uart4 DMA property in stm32mp15xx-dhcor-avenger96 board device
tree to keep console in irq mode, as DMA support for console has been
removed from the driver by commit e359b4411c28 ("serial: stm32: fix
threaded interrupt handling").
Delete also usart2 and uart7 DMA property to keep current behavior.
Signed-off-by: Erwan Le Ray <erwan.leray@foss.st.com>
Signed-off-by: Alexandre Torgue <alexandre.torgue@foss.st.com>
|
|
DMA configuration is added to uart nodes in stm32mp15x device tree.
Delete uart4 DMA property in stm32mp15xx-dhcom-som board device tree
to keep console in irq mode, as DMA support for console has been
removed from the driver by commit e359b4411c28 ("serial: stm32: fix
threaded interrupt handling").
Signed-off-by: Erwan Le Ray <erwan.leray@foss.st.com>
Signed-off-by: Alexandre Torgue <alexandre.torgue@foss.st.com>
|
|
DMA configuration is added to uart nodes in stm32mp15x device tree.
Delete usart3 and uart8 nodes DMA property in stm32mp15xx-dhcom-picoitx
board device tree to keep current behavior.
Signed-off-by: Erwan Le Ray <erwan.leray@foss.st.com>
Signed-off-by: Alexandre Torgue <alexandre.torgue@foss.st.com>
|
|
DMA configuration is added to uart nodes in stm32mp15x device tree.
Delete usart3 and uart8 DMA property in stm32mp15xx-dhcom-pdk2 board
device tree to keep current behavior.
Signed-off-by: Erwan Le Ray <erwan.leray@foss.st.com>
Signed-off-by: Alexandre Torgue <alexandre.torgue@foss.st.com>
|
|
DMA configuration is added to uart nodes in stm32mp15x device tree.
Delete usart3 and uart8 nodes DMA property in stm32mp15xx-dhcom-drc02
board device tree to keep current behavior.
Signed-off-by: Erwan Le Ray <erwan.leray@foss.st.com>
Signed-off-by: Alexandre Torgue <alexandre.torgue@foss.st.com>
|
|
DMA configuration is added to uart nodes in stm32mp15x device tree.
Delete uart4 DMA property in stm32mp157c-odyssey board device tree to
keep console in irq mode, as DMA support for console has been removed
from the driver by commit e359b4411c28 ("serial: stm32: fix threaded
interrupt handling").
Signed-off-by: Erwan Le Ray <erwan.leray@foss.st.com>
Signed-off-by: Alexandre Torgue <alexandre.torgue@foss.st.com>
|
|
DMA configuration is added to uart nodes in stm32mp15x device tree.
Delete uart4 DMA property in stm32mp157c-lxa-mc1 board device tree to
keep console in irq mode, as DMA support for console has been removed
from the driver by commit e359b4411c28 ("serial: stm32: fix threaded
interrupt handling").
Signed-off-by: Erwan Le Ray <erwan.leray@foss.st.com>
Reviewed-by: Ahmad Fatoum <a.fatoum@pengutronix.de>
Signed-off-by: Alexandre Torgue <alexandre.torgue@foss.st.com>
|
|
DMA configuration is added to uart nodes in stm32mp15x device tree.
Delete uart4 DMA property in stm32mp157a-stinger96 board device tree to
keep console in irq mode, as DMA support for console has been removed
from the driver by commit e359b4411c28 ("serial: stm32: fix threaded
interrupt handling").
Delete also usart2 and uart7 DMA property to keep current behavior.
Signed-off-by: Erwan Le Ray <erwan.leray@foss.st.com>
Signed-off-by: Alexandre Torgue <alexandre.torgue@foss.st.com>
|
|
DMA configuration is added to uart nodes in stm32mp15x device tree.
Delete uart4 DMA property in stm32mp1-microdev2.0 board device tree
to keep console in irq mode, as DMA support for console has been
removed from the driver by commit e359b4411c28 ("serial: stm32: fix
threaded interrupt handling").
Delete also uart8 DMA property to keep current behavior.
Signed-off-by: Erwan Le Ray <erwan.leray@foss.st.com>
Signed-off-by: Alexandre Torgue <alexandre.torgue@foss.st.com>
|
|
DMA configuration is added to uart nodes in stm32mp15x device tree.
Delete uart4 DMA property in stm32mp1-microdev2.0-of7 board device tree
to keep console in irq mode, as DMA support for console has been
removed from the driver by commit e359b4411c28 ("serial: stm32: fix
threaded interrupt handling").
Delete also uart8 DMA property to keep current behavior.
Signed-off-by: Erwan Le Ray <erwan.leray@foss.st.com>
Signed-off-by: Alexandre Torgue <alexandre.torgue@foss.st.com>
|
|
DMA configuration is added to uart nodes in stm32mp15x device tree.
Delete uart4 DMA property in stm32mp157a-iot-box board device tree to
keep console in irq mode, as DMA support for console has been removed
from the driver by commit e359b4411c28 ("serial: stm32: fix threaded
interrupt handling").
Signed-off-by: Erwan Le Ray <erwan.leray@foss.st.com>
Signed-off-by: Alexandre Torgue <alexandre.torgue@foss.st.com>
|
|
DMA configuration is added to uart nodes in stm32mp15x device tree.
Delete uart4 DMA property in icore-stm32mp1-edimm2.2 board device tree
to keep console in irq mode, as DMA support for console has been
removed from the driver by commit e359b4411c28 ("serial: stm32: fix
threaded interrupt handling").
Signed-off-by: Erwan Le Ray <erwan.leray@foss.st.com>
Signed-off-by: Alexandre Torgue <alexandre.torgue@foss.st.com>
|
|
DMA configuration is added to uart nodes in stm32mp15x device tree.
Delete uart4 DMA property in icore-stm32mp1-ctouch2 board device tree
to keep console in irq mode, as DMA support for console has been
removed from the driver by commit e359b4411c28 ("serial: stm32: fix
threaded interrupt handling").
Signed-off-by: Erwan Le Ray <erwan.leray@foss.st.com>
Signed-off-by: Alexandre Torgue <alexandre.torgue@foss.st.com>
|
|
DMA configuration is added to uart nodes in stm32mp15x device tree.
Delete uart4 DMA property in stm32mp15xx-dkx board device tree to keep
console in irq mode, as DMA support for console has been removed from
the driver by commit e359b4411c28 ("serial: stm32: fix threaded
interrupt handling").
Delete also uart7 DMA property to keep current behavior.
Signed-off-by: Erwan Le Ray <erwan.leray@foss.st.com>
Signed-off-by: Alexandre Torgue <alexandre.torgue@foss.st.com>
|
|
DMA configuration is added to uart nodes in stm32mp15x device tree.
Delete uart4 DMA property in stm32mp157c-ed1 board device tree to keep
console in irq mode, as DMA support for console has been removed from
the driver by commit e359b4411c28 ("serial: stm32: fix threaded
interrupt handling").
Signed-off-by: Erwan Le Ray <erwan.leray@foss.st.com>
Signed-off-by: Alexandre Torgue <alexandre.torgue@foss.st.com>
|
|
Add DMA configuration in stm32mp15x uart nodes by selecting dma direct
mode and alternate REQ/ACK dma protocol for uart.
DMA direct mode allows to bypass DMA FIFO. Each DMA request immediately
initiates a transfer from/to the memory. This allows USART to get data
transferred, even when the transfer ends before the DMA FIFO completion.
Default REQ/ACK DMA protocol consists in maintaining ACK signal up to the
removal of REQuest and the transfer completion.
In case of alternative REQ/ACK protocol, ACK de-assertion does not wait the
removal of the REQuest, but only the transfer completion.
Due to a possible DMA stream lock when transferring data to/from STM32
USART/UART, select this alternative protocol in STM32 USART/UART nodes.
Signed-off-by: Valentin Caron <valentin.caron@foss.st.com>
Signed-off-by: Erwan Le Ray <erwan.leray@foss.st.com>
Signed-off-by: Alexandre Torgue <alexandre.torgue@foss.st.com>
|
|
stm32mp157
Link between GIC and exti line is now done inside EXTI driver. So in order
to be wake up source exti irqchip has to be used.
Signed-off-by: Alexandre Torgue <alexandre.torgue@st.com>
Cc: Alexandre Torgue <alexandre.torgue@foss.st.com>
Signed-off-by: Alexandre Torgue <alexandre.torgue@foss.st.com>
|