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2020-07-22ARM: dts: mmp2: Add the GPULubomir Rintel1-0/+12
There's a GC860 2D + 3D core. Link: https://lore.kernel.org/r/20200718205019.184927-11-lkundrak@v3.sk Signed-off-by: Lubomir Rintel <lkundrak@v3.sk> Signed-off-by: Arnd Bergmann <arnd@arndb.de>
2020-07-22ARM: dts: mmp2-olpc-xo-1-75: Enable audio supportLubomir Rintel1-18/+47
This enables the audio SRAM, DMA engine, I2S interface, and codec, hooks them together and adds a audio-graph-card instance. It also removes the jack gpios from the gpio-keys instance, because the audio jack driver registers an input device. Link: https://lore.kernel.org/r/20200718205019.184927-10-lkundrak@v3.sk Signed-off-by: Lubomir Rintel <lkundrak@v3.sk> Signed-off-by: Arnd Bergmann <arnd@arndb.de>
2020-07-22ARM: dts: mmp2: Add SSPA nodesLubomir Rintel1-0/+26
There are two I2S-capable audio serial port blocks. Link: https://lore.kernel.org/r/20200718205019.184927-9-lkundrak@v3.sk Signed-off-by: Lubomir Rintel <lkundrak@v3.sk> Signed-off-by: Arnd Bergmann <arnd@arndb.de>
2020-07-22ARM: dts: mmp2: Add Audio Clock controllerLubomir Rintel1-0/+13
This device generates the audio codec master clock and bit clock. Link: https://lore.kernel.org/r/20200718205019.184927-8-lkundrak@v3.sk Signed-off-by: Lubomir Rintel <lkundrak@v3.sk> Signed-off-by: Arnd Bergmann <arnd@arndb.de>
2020-07-22ARM: dts: mmp2: Add DMA nodesLubomir Rintel1-0/+26
There is a 16-channel peripheral DMA controller along with two-channel audio DMA engines. Link: https://lore.kernel.org/r/20200718205019.184927-7-lkundrak@v3.sk Signed-off-by: Lubomir Rintel <lkundrak@v3.sk> Signed-off-by: Arnd Bergmann <arnd@arndb.de>
2020-07-22ARM: dts: mmp2: Add Audio SRAMLubomir Rintel1-0/+9
This memory is region is where the two-channel audio DMA can pump sound samples into the SSPA's internal FIFO. Link: https://lore.kernel.org/r/20200718205019.184927-6-lkundrak@v3.sk Signed-off-by: Lubomir Rintel <lkundrak@v3.sk> Signed-off-by: Arnd Bergmann <arnd@arndb.de>
2020-07-22ARM: dts: mmp2: Extend the MPMU reg rangeLubomir Rintel1-1/+1
The ACGR register is at the offset of 0x1024, beyond the 4k originally assigned to the MPMU range. Link: https://lore.kernel.org/r/20200718205019.184927-5-lkundrak@v3.sk Signed-off-by: Lubomir Rintel <lkundrak@v3.sk> Signed-off-by: Arnd Bergmann <arnd@arndb.de>
2020-07-22ARM: dts: mmp2: Add #power-domain-cells to /clocksLubomir Rintel1-0/+1
The power management unit, described by the soc_clocks node, controls the power to the peripherals by the means of power domains with a single cell -- the domain number. Link: https://lore.kernel.org/r/20200718205019.184927-4-lkundrak@v3.sk Signed-off-by: Lubomir Rintel <lkundrak@v3.sk> Signed-off-by: Arnd Bergmann <arnd@arndb.de>
2020-07-22ARM: dts: mmp2-olpc-xo-1-75: Delete #address-cells from ssp3Lubomir Rintel1-1/+2
On the XO-1.75, this node represents a bus interface that operates in slave mode and thus is only able to accommodate a single subnode; no address cells are necessary. The Documentation/devicetree/bindings/spi/spi-controller.yaml binding prefers that we drop the property instead of setting it to zero. This fixes a DT validation error: arch/arm/boot/dts/mmp2-olpc-xo-1-75.dt.yaml: spi@d4037000: { ... } is valid under each of {'required': ['spi-slave']}, {'required': ['#address-cells']} We also need to drop #size-cells: arch/arm/boot/dts/mmp2-olpc-xo-1-75.dt.yaml: spi@d4037000: '#address-cells' is a dependency of '#size-cells' Link: https://lore.kernel.org/r/20200718205019.184927-3-lkundrak@v3.sk Signed-off-by: Lubomir Rintel <lkundrak@v3.sk> Signed-off-by: Arnd Bergmann <arnd@arndb.de>
2020-07-22ARM: dts: mmp2-olpc-xo-1-75: Fix camera I2C node validationLubomir Rintel1-3/+3
mmp2-olpc-xo-1-75.dt.yaml: camera_i2c: $nodename:0: 'camera_i2c' does not match '^i2c(@.*)?' mmp2-olpc-xo-1-75.dt.yaml: camera_i2c: 'sda-gpios' is a required property mmp2-olpc-xo-1-75.dt.yaml: camera_i2c: 'scl-gpios' is a required property The "gpios" property actually was documented as deprecated, but got dropped in commit 0175ce4a58d6 ("dt-bindings: i2c: Convert i2c-gpio binding to json-schema"). It's probably best kept forgotten though. Link: https://lore.kernel.org/r/20200718205019.184927-2-lkundrak@v3.sk Signed-off-by: Lubomir Rintel <lkundrak@v3.sk> Signed-off-by: Arnd Bergmann <arnd@arndb.de>
2020-07-22Merge tag 'ux500-dts-for-v5.9-1' of ↵Arnd Bergmann5-5/+62
git://git.kernel.org/pub/scm/linux/kernel/git/linusw/linux-stericsson into arm/dt Ux500 DTS changes for the v5.9 kernel series: - Add touchkey to the Samsung Golden. - Fix up the supply nodes for the AB8500 PWM devices. - Fix up the cache controller node names. - Fix the Samsing Skomer accelerometer mounting matrix. * tag 'ux500-dts-for-v5.9-1' of git://git.kernel.org/pub/scm/linux/kernel/git/linusw/linux-stericsson: ARM: dts: ux500-skomer: Correct accel mounting matrix ARM: dts: ste: Align L2 cache-controller nodename with dtschema ARM: dts: ux500: Supply nodes for the other 2 AB8500 PWM devices ARM: dts: ux500: samsung-golden: Add touchkey Link: https://lore.kernel.org/r/CACRpkdZZgZ1LeOK5zFj5Z6Mh=RVz37hZ-7Z4DQNGC1uaiEVTeA@mail.gmail.com Signed-off-by: Arnd Bergmann <arnd@arndb.de>
2020-07-22Merge tag 'stm32-dt-for-v5.9-1' of ↵Arnd Bergmann17-94/+496
git://git.kernel.org/pub/scm/linux/kernel/git/atorgue/stm32 into arm/dt STM32 DT updates for v5.9, round 1 Highlights: ---------- MCU part: -Enable stmpe811 on stm32f429 -Enable l3gd20-gyro on stm32f429 -Enable panel-ilitek-9341 on stm32f429 -Fixes for yaml validation (leds, nodes names, remove useless bindings ...) -Add stm32xxx compatibles for syscon nodes MPU part: -Add support for usb role switch to dwc2 -Add stm32xxx compatibles for syscon nodes -Update uart4 pin configuration for low power mode used by dkx and ed1 ST boards -Fix uart nodes ordering and uart7_pins_a comments -Add the support of uart instances available on STM32MP157 boards: - usart3 on stm32mp157c-ev1, stm32mp157a-dk1, and stm32mp157c-dk2 - uart7 on stm32mp157a-dk1 and stm32mp157c-dk2 - usart2 on stm32mp157c-dk2 -Configure I2C5 on stm32mp15 DK boards * tag 'stm32-dt-for-v5.9-1' of git://git.kernel.org/pub/scm/linux/kernel/git/atorgue/stm32: (38 commits) ARM: dts: stm32: enable usb-role-switch on USB OTG on stm32mp15xx-dkx ARM: dts: stm32: Add compatibles for syscon for stm32mp151 ARM: dts: stm32: Add compatibles for syscon for stm32h743 ARM: dts: stm32: Add compatibles for syscon for stm32f746 ARM: dts: stm32: Add compatibles for syscon for stm32f426 dt-bindings: arm: stm32: Add compatibles for syscon nodes ARM: dts: stm32: Fix spi4 pins in stm32mp15-pinctrl ARM: dts: stm32: configure i2c5 support on stm32mp15xx-dkx ARM: dts: stm32: add usart2 node to stm32mp157c-dk2 ARM: dts: stm32: add uart7 support to stm32mp15xx-dkx boards ARM: dts: stm32: add usart3 node to stm32mp157c-ev1 ARM: dts: stm32: add usart3 node to stm32mp15xx-dkx boards ARM: dts: stm32: add usart2, usart3 and uart7 pins in stm32mp15-pinctrl ARM: dts: stm32: cosmetic updates in stm32mp15-pinctrl ARM: dts: stm32: fix uart7_pins_a comments in stm32mp15-pinctrl ARM: dts: stm32: fix uart nodes ordering in stm32mp15-pinctrl ARM: dts: stm32: Update UART4 pin states on stm32mp15xx-dkx ARM: dts: stm32: Update pin states for uart4 on stm32mp157c-ed1 ARM: dts: stm32: update uart4 pin configuration for low power on stm32mp157 dt-bindings: usb: dwc2: Fix issues for stm32mp15x SoC ... Link: https://lore.kernel.org/r/8a9bb27b-fc08-126a-11f7-01354e8577e1@st.com Signed-off-by: Arnd Bergmann <arnd@arndb.de>
2020-07-22Merge tag 'samsung-dt-5.9' of ↵Arnd Bergmann19-394/+445
git://git.kernel.org/pub/scm/linux/kernel/git/krzk/linux into arm/dt Samsung DTS ARM changes for v5.9 1. Enable Bluetooth on Artik5 (Exynos3250). 2. Enable accelerometer on Aries boards (Samsung Galaxy S family, S5Pv210); multiple fixes. 3. Fix highest frequencies on Exynos5800. 4. Fix rare USB instability on Odroid XU3 family (Exynos5422). 5. Minor DTS fixes and adjustments with dtschema. * tag 'samsung-dt-5.9' of git://git.kernel.org/pub/scm/linux/kernel/git/krzk/linux: ARM: dts: exynos: Replace HTTP links with HTTPS ones ARM: dts: exynos: Disable frequency scaling for FSYS bus on Odroid XU3 family ARM: dts: exynos: Define fixed regulators in root node for consistency in SMDK5420 ARM: dts: exynos: Define fixed regulators in root node for consistency in Arndale ARM: dts: exynos: Define fixed regulators in root node for consistency in Origen ARM: dts: exynos: Remove DMA controller bus node name to fix dtschema warnings ARM: dts: exynos: Fix missing empty reg/ranges property regulators on Trats ARM: dts: exynos: Align L2 cache-controller nodename with dtschema ARM: dts: s5pv210: Correct BCM4329 bluetooth node ARM: dts: s5pv210: Add BMA023 accelerometer support to Aries ARM: dts: s5pv210: Add support for GP2A light sensor on Aries ARM: dts: s5pv210: Correct fuelgauge definition on Aries ARM: dts: s5pv210: Add interrupt-controller property to gph3 ARM: dts: exynos: Enable Bluetooth support for Artik5 board ARM: dts: exynos: Extend all Exynos5800 A15's OPPs with max voltage data Link: https://lore.kernel.org/r/20200721180900.13844-2-krzk@kernel.org Signed-off-by: Arnd Bergmann <arnd@arndb.de>
2020-07-22Merge tag 'qcom-dts-for-5.9' of ↵Arnd Bergmann3-0/+424
git://git.kernel.org/pub/scm/linux/kernel/git/qcom/linux into arm/dt Qualcomm ARM dts updates for v5.9 Add QFPROM and ethernet for ipq8064 and a new DTS for the MikroTik RB3011 using the same platform. * tag 'qcom-dts-for-5.9' of git://git.kernel.org/pub/scm/linux/kernel/git/qcom/linux: ARM: dts: qcom: add qfprom definition to ipq806x ARM: dts: qcom: Add MikroTik RB3011 ARM: dts: qcom: add ethernet definitions to ipq8064 Link: https://lore.kernel.org/r/20200721045032.3430395-1-bjorn.andersson@linaro.org Signed-off-by: Arnd Bergmann <arnd@arndb.de>
2020-07-22Merge tag 'hisi-arm32-dt-for-5.9' of git://github.com/hisilicon/linux-hisi ↵Arnd Bergmann2-2/+2
into arm/dt ARM: DT: Hisilicon ARM32 SoCs updates for v5.9 - Update L2 cache controller nodes to fix dtschema validator warnings for hi3620 and hix5hd2 * tag 'hisi-arm32-dt-for-5.9' of git://github.com/hisilicon/linux-hisi: ARM: dts: hisilicon: Align L2 cache-controller nodename with dtschema Link: https://lore.kernel.org/r/5F165FA1.2030301@hisilicon.com Signed-off-by: Arnd Bergmann <arnd@arndb.de>
2020-07-22Merge tag 'sunxi-dt-for-5.9-1' of ↵Arnd Bergmann3-3/+65
git://git.kernel.org/pub/scm/linux/kernel/git/sunxi/linux into arm/dt Our usual number of patches to improve the Allwinner Device Tree support, including: - CPUFreq / Thermal throttling support for the H5 - Touchscreen support for the Pinephone - New boards: PinePhone v1.2 * tag 'sunxi-dt-for-5.9-1' of git://git.kernel.org/pub/scm/linux/kernel/git/sunxi/linux: arm64: dts: allwinner: h5: bananapi-m2-plus-v1.2: Tie in CPU OPPs arm64: dts: allwinner: h5: libretech-all-h3-cc: Tie in CPU OPPs arm64: dts: allwinner: h5: Add CPU Operating Performance Points table arm64: dts: allwinner: h5: Add trip and cooling maps to CPU thermal zones arm64: dts: allwinner: h5: Add clock to CPU cores ARM: dts: sunxi: bananapi-m2-plus-v1.2: Fix CPU supply voltages ARM: dts: sunxi: bananapi-m2-plus-v1.2: Add regulator supply to all CPU cores ARM: dts: sunxi: libretech-all-h3-cc: Add regulator supply to all CPU cores arm64: dts: sun50i-pinephone: dldo4 must not be >= 1.8V arm64: dts: allwinner: Add support for PinePhone revision 1.2 dt-bindings: arm: sunxi: Add PinePhone 1.2 bindings arm64: dts: sun50i-a64-pinephone: Add touchscreen support arm64: dts: sun50i-a64-pinephone: Enable LCD support on PinePhone ARM: dts: orange-pi-zero-plus2: add leds configuration ARM: dts: orange-pi-zero-plus2: enable USB OTG port Link: https://lore.kernel.org/r/fa48ffcb-3404-41bb-b065-a16717cf5688.lettre@localhost Signed-off-by: Arnd Bergmann <arnd@arndb.de>
2020-07-22Merge tag 'versatile-for-v5.9' of ↵Arnd Bergmann4-4/+4
git://git.kernel.org/pub/scm/linux/kernel/git/linusw/linux-integrator into arm/dt Versatile DTS changes for the v5.9 kernel cycle, essentially just a single patch fixing up the node names for schema. * tag 'versatile-for-v5.9' of git://git.kernel.org/pub/scm/linux/kernel/git/linusw/linux-integrator: ARM: dts: arm-realview: Align L2 cache-controller nodename with dtschema Link: https://lore.kernel.org/r/CACRpkdbkM9ZmuG2FnBmO7upcJfnqq2oSLDCFDXC5b3K+dtps9Q@mail.gmail.com Signed-off-by: Arnd Bergmann <arnd@arndb.de>
2020-07-22Merge tag 'imx-dt-5.9' of ↵Arnd Bergmann105-266/+4462
git://git.kernel.org/pub/scm/linux/kernel/git/shawnguo/linux into arm/dt i.MX device tree update for 5.9: - New board support: Protonic PRTI6Q/WD2/VT7/RVT and MYiR MYS-6ULX SBC. - Update IIM, OCOTP and SD/MMC device node name to match .yaml bindings. - Make tempmon node as child of anatop node according to hardware architecture. - The vf610-zii device update: configure fiber port to 1000BaseX, add switch watchdog, MDIO speed and preamble. - A series from Fabio Estevam to update imx6qdl-sabresd and imx6q-tbs2910 for using MDIO node and reset-assert-us. - Align L2 cache-controller device node name with .yaml schema. - Enable SATA support for imx6qp-sabreauto and imx6qp-sabresd board. - A series of patches from Shengjiu Wang to enable various audio support on i.MX6 devices. - Add Gateworks System Controller support for imx6qdl-gw devices. - Change default #pwm-cells setting to <3> in the SoC dtsi files. - Other small random changes. * tag 'imx-dt-5.9' of git://git.kernel.org/pub/scm/linux/kernel/git/shawnguo/linux: (43 commits) ARM: dts: vf610-zii-ssmb-spu3: Add node for switch watchdog ARM: dts: vf610-zii-ssmb-dtu: Add no-sdio/no-sd properties ARM: dts: imx6q-tbs2910: Pass reset-assert-us ARM: dts: imx6q-tbs2910: Add an mdio node ARM: dts: imx6qdl-sabresd: Pass reset-assert-us ARM: dts: imx6qdl-sabresd: Add an mdio node ARM: dts: imx6qdl-gw: add Gateworks System Controller support ARM: dts: imx6ull: add MYiR MYS-6ULX SBC ARM: dts: vf610-zii-spb4: Add node for switch watchdog ARM: dts: colibri-imx6: remove pinctrl-names orphan ARM: dts: imx: default to #pwm-cells = <3> in the SoC dtsi files ARM: dts: vf610-zii-scu4-aib: Configure fibre ports to 1000BaseX ARM: dts: vf610-zii-dev-rev-c: Configure fiber port to 1000BaseX ARM: dts: ZII: update MDIO speed and preamble ARM: dts: vfxxx: Add node for CAAM ARM: dts: imx6qp-sabresd: enable sata ARM: dts: imx6qp-sabreauto: enable sata ARM: dts: add Protonic RVT board ARM: dts: add Protonic VT7 board ARM: dts: add Protonic WD2 board ... Link: https://lore.kernel.org/r/20200720085536.24138-3-shawnguo@kernel.org Signed-off-by: Arnd Bergmann <arnd@arndb.de>
2020-07-22Merge tag 'socfpga_dts_update_for_v5.9' of ↵Arnd Bergmann3-0/+9
git://git.kernel.org/pub/scm/linux/kernel/git/dinguyen/linux into arm/dt SoCFPGA DTS updates for v5.9 - Populate clock entries for Agilex platform - Add "reset-names" to SPI entries - Add Maxim max1619 temperature sensor to Arria10 devkit * tag 'socfpga_dts_update_for_v5.9' of git://git.kernel.org/pub/scm/linux/kernel/git/dinguyen/linux: ARM: dts: socfpga: add the temperature sensor to the Arria10 devkit arm: dts: socfpga: add reset-names to spi node arm64: dts: agilex: add nand clocks arm64: dts: agilex: populate clock dts entries for Intel SoCFPGA Agilex Link: https://lore.kernel.org/r/20200719011804.15599-1-dinguyen@kernel.org Signed-off-by: Arnd Bergmann <arnd@arndb.de>
2020-07-22Merge tag 'imx-fixes-5.8-3' of ↵Arnd Bergmann3-3/+4
git://git.kernel.org/pub/scm/linux/kernel/git/shawnguo/linux into arm/fixes i.MX fixes for 5.8, round 3: - A couple of FEC2 phy-mode fixes on imx6sx-sabreauto and imx6sx-sdb board. - One fix on imx6qdl-icore pin muxing to get USB OTG_ID and SD card detect work correctly. * tag 'imx-fixes-5.8-3' of git://git.kernel.org/pub/scm/linux/kernel/git/shawnguo/linux: ARM: dts: imx6qdl-icore: Fix OTG_ID pin and sdcard detect ARM: dts: imx6sx-sabreauto: Fix the phy-mode on fec2 ARM: dts: imx6sx-sdb: Fix the phy-mode on fec2 Link: https://lore.kernel.org/r/20200720040148.GA20462@dragon Signed-off-by: Arnd Bergmann <arnd@arndb.de>
2020-07-22Merge tag 'sunxi-fixes-for-5.8-1' of ↵Arnd Bergmann3-3/+3
git://git.kernel.org/pub/scm/linux/kernel/git/sunxi/linux into arm/fixes Two fixes for the Allwinner SoCs, one to relax the CMA allocation ranges that were failing on older SoCs and one to fix Cedrus on the H6. * tag 'sunxi-fixes-for-5.8-1' of git://git.kernel.org/pub/scm/linux/kernel/git/sunxi/linux: arm64: dts: allwinner: h6: Fix Cedrus IOMMU usage ARM: dts sunxi: Relax a bit the CMA pool allocation range Link: https://lore.kernel.org/r/e24f0608-6a4f-4163-b99e-a5f48e796184.lettre@localhost Signed-off-by: Arnd Bergmann <arnd@arndb.de>
2020-07-22ARM: dts: rockchip: Add HDMI out for RockPI N8/N10Jagan Teki2-0/+30
This patch adds support to enable HDMI out for N10 and N8 combinations SBCs. Signed-off-by: Jagan Teki <jagan@amarulasolutions.com> Signed-off-by: Suniel Mahesh <sunil@amarulasolutions.com> Link: https://lore.kernel.org/r/20200720110230.367985-2-jagan@amarulasolutions.com Signed-off-by: Heiko Stuebner <heiko@sntech.de>
2020-07-22ARM: dts: rockchip: Add USB for RockPI N8/N10Jagan Teki2-0/+60
Radxa dalang carrier board has 2x USB 2.0 and 1x USB 3.0 ports. This patch adds support to enable all these USB ports for N10 and N8 combinations SBCs. Note that the USB 3.0 port on RockPI N8 combination works as USB 2.0 OTG since it is driven from RK3288. Signed-off-by: Jagan Teki <jagan@amarulasolutions.com> Link: https://lore.kernel.org/r/20200720110230.367985-1-jagan@amarulasolutions.com Signed-off-by: Heiko Stuebner <heiko@sntech.de>
2020-07-22ARM: dts: rockchip: Add usb host0 ohci node for rk3288Jagan Teki1-1/+10
rk3288 and rk3288w have a usb host0 ohci controller. Although rk3288 ohci doesn't actually work on hardware, but rk3288w ohci can work well. So add usb host0 ohci node in rk3288 dtsi and boards can then enable it if supported. Signed-off-by: Jagan Teki <jagan@amarulasolutions.com> Cc: William Wu <william.wu@rock-chips.com> Link: https://lore.kernel.org/r/20200720105846.367776-1-jagan@amarulasolutions.com Signed-off-by: Heiko Stuebner <heiko@sntech.de>
2020-07-21ARM: davinci: Replace HTTP links with HTTPS onesAlexander A. Klimov1-1/+1
Rationale: Reduces attack surface on kernel devs opening the links for MITM as HTTPS traffic is much harder to manipulate. Deterministic algorithm: For each file: If not .svg: For each line: If doesn't contain `\bxmlns\b`: For each link, `\bhttp://[^# \t\r\n]*(?:\w|/)`: If neither `\bgnu\.org/license`, nor `\bmozilla\.org/MPL\b`: If both the HTTP and HTTPS versions return 200 OK and serve the same content: Replace HTTP with HTTPS. Signed-off-by: Alexander A. Klimov <grandmaster@al2klimov.de> [nsekhar@ti.com: drop obsolete hawkboard.org URL completeley fixup subject line prefix] Signed-off-by: Sekhar Nori <nsekhar@ti.com>
2020-07-21ARM: dts: stm32: enable usb-role-switch on USB OTG on stm32mp15xx-dkxAmelie Delaunay1-1/+1
Now that USB OTG driver supports usb role switch by overriding PHY input signals (A-Valid, B-Valid and Vbus-Valid), enable it on stm32mp15xx-dkx. dr_mode needn't to be forced to Peripheral anymore, it is set to OTG in SoC device tree. USB role (USB_ROLE_NONE, USB_ROLE_DEVICE, USB_ROLE_HOST) will be provided by STUSB1600 Type-C controller driver. This patch depends on "Add STUSB160x Type-C port controller support" series, which is under review. Signed-off-by: Amelie Delaunay <amelie.delaunay@st.com> Signed-off-by: Alexandre Torgue <alexandre.torgue@st.com>
2020-07-21ARM: dts: stm32: Add compatibles for syscon for stm32mp151Benjamin Gaignard1-1/+1
Syscon nodes needs at least 2 compatibles to be compliant why yaml documentation. Signed-off-by: Benjamin Gaignard <benjamin.gaignard@st.com> Signed-off-by: Alexandre Torgue <alexandre.torgue@st.com>
2020-07-21ARM: dts: stm32: Add compatibles for syscon for stm32h743Benjamin Gaignard1-3/+3
Syscon nodes needs at least 2 compatibles to be compliant why yaml documentation. Signed-off-by: Benjamin Gaignard <benjamin.gaignard@st.com> Signed-off-by: Alexandre Torgue <alexandre.torgue@st.com>
2020-07-21ARM: dts: stm32: Add compatibles for syscon for stm32f746Benjamin Gaignard1-3/+3
Syscon nodes needs at least 2 compatibles to be compliant why yaml documentation. Signed-off-by: Benjamin Gaignard <benjamin.gaignard@st.com> Signed-off-by: Alexandre Torgue <alexandre.torgue@st.com>
2020-07-21ARM: dts: stm32: Add compatibles for syscon for stm32f426Benjamin Gaignard1-3/+3
Syscon nodes needs at least 2 compatibles to be compliant why yaml documentation. Signed-off-by: Benjamin Gaignard <benjamin.gaignard@st.com> Signed-off-by: Alexandre Torgue <alexandre.torgue@st.com>
2020-07-21ARM: dts: stm32: Fix spi4 pins in stm32mp15-pinctrlPatrick Delaunay1-14/+14
Move spi4_pins_a nodes from pinctrl_z to pinctrl as the associated pins are not in BANK Z. Fixes: 498a7014989d ("ARM: dts: stm32: Add missing pinctrl entries for STM32MP15") Signed-off-by: Patrick Delaunay <patrick.delaunay@st.com> Reviewed-by: Manivannan Sadhasivam <mani@kernel.org> Signed-off-by: Alexandre Torgue <alexandre.torgue@st.com>
2020-07-21ARM: dts: stm32: configure i2c5 support on stm32mp15xx-dkxFabrice Gasnier1-0/+13
Configure I2C5 on stm32mp15 DK boards. It's available and can be used on: - Arduino connector - GPIO expansion connector Keep it disabled by default, so the pins are kept in their initial state to lower power consumption. This way they can also be used as GPIO. Signed-off-by: Fabrice Gasnier <fabrice.gasnier@st.com> Signed-off-by: Alain Volmat <alain.volmat@st.com> Signed-off-by: Alexandre Torgue <alexandre.torgue@st.com>
2020-07-21ARM: dts: stm32: add usart2 node to stm32mp157c-dk2Erwan Le Ray1-0/+9
Adds the usart2 node to stm32mp157c-dk2 board. usart2 pins are connected to Bluetooth component. usart2 is disabled by default. Signed-off-by: Erwan Le Ray <erwan.leray@st.com> Signed-off-by: Alexandre Torgue <alexandre.torgue@st.com>
2020-07-21ARM: dts: stm32: add uart7 support to stm32mp15xx-dkx boardsErwan Le Ray3-0/+10
Adds uart7 node to stm32mp15xx-dkx and uart7 alias to stm32mp157a-dk1 and stm32mp157c-dk2 boards. uart7 pins are connected to Arduino connector. uart7 is disabled by default. Signed-off-by: Erwan Le Ray <erwan.leray@st.com> Signed-off-by: Alexandre Torgue <alexandre.torgue@st.com>
2020-07-21ARM: dts: stm32: add usart3 node to stm32mp157c-ev1Erwan Le Ray1-0/+15
Adds the usart3 node to stm32mp157c-ev1 board. usart3 pins are connected to GPIO Expansion connector. usart3 is disabled by default. Signed-off-by: Erwan Le Ray <erwan.leray@st.com> Signed-off-by: Alexandre Torgue <alexandre.torgue@st.com>
2020-07-21ARM: dts: stm32: add usart3 node to stm32mp15xx-dkx boardsErwan Le Ray3-0/+11
Adds usart3 node to stm32mp15xx-dkx and usart3 alias to stm32mp157a-dk1 and stm32mp157c-dk2 boards. usart3 pins are connected to GPIO Expansion connector. usart3 is disabled by default. Signed-off-by: Erwan Le Ray <erwan.leray@st.com> Signed-off-by: Alexandre Torgue <alexandre.torgue@st.com>
2020-07-21ARM: dts: stm32: add usart2, usart3 and uart7 pins in stm32mp15-pinctrlErwan Le Ray1-0/+138
Adds usart2_pins_c, usart3_pins_b, usart3_pins_c and uart7_pins_c pins configurations in stm32mp15-pinctrl. - usart2_pins_c pins are connected to Bluetooth chip on dk2 board. - usart3_pins_b pins are connected to GPIO expansion connector on evx board. - usart3_pins_c pins are connected to GPIO expansion connector on dkx board. - uart7_pins_c pins are connected to Arduino Uno connector on dkx board. Signed-off-by: Erwan Le Ray <erwan.leray@st.com> Signed-off-by: Alexandre Torgue <alexandre.torgue@st.com>
2020-07-21ARM: dts: stm32: cosmetic updates in stm32mp15-pinctrlPatrick Delaunay1-5/+4
Use tabs where possible and remove multiple blanks lines. Signed-off-by: Patrick Delaunay <patrick.delaunay@st.com> Signed-off-by: Alexandre Torgue <alexandre.torgue@st.com>
2020-07-20ARM: dts: exynos: Replace HTTP links with HTTPS onesAlexander A. Klimov1-1/+1
Rationale: Reduces attack surface on kernel devs opening the links for MITM as HTTPS traffic is much harder to manipulate. Deterministic algorithm: For each file: If not .svg: For each line: If doesn't contain `\bxmlns\b`: For each link, `\bhttp://[^# \t\r\n]*(?:\w|/)`: If neither `\bgnu\.org/license`, nor `\bmozilla\.org/MPL\b`: If both the HTTP and HTTPS versions return 200 OK and serve the same content: Replace HTTP with HTTPS. Signed-off-by: Alexander A. Klimov <grandmaster@al2klimov.de> Signed-off-by: Krzysztof Kozlowski <krzk@kernel.org>
2020-07-20ARM: dts: sunxi: bananapi-m2-plus-v1.2: Fix CPU supply voltagesChen-Yu Tsai1-3/+3
The Bananapi M2+ uses a GPIO line to change the effective resistance of the CPU supply regulator's feedback resistor network. The voltages described in the device tree were given directly by the vendor. This turns out to be slightly off compared to the real values. The updated voltages are based on calculations of the feedback resistor network, and verified down to three decimal places with a multi-meter. Fixes: 6eeb4180d4b9 ("ARM: dts: sunxi: h3-h5: Add Bananapi M2+ v1.2 device trees") Signed-off-by: Chen-Yu Tsai <wens@csie.org> Signed-off-by: Maxime Ripard <maxime@cerno.tech> Link: https://lore.kernel.org/r/20200717160053.31191-4-wens@kernel.org
2020-07-20ARM: dts: sunxi: bananapi-m2-plus-v1.2: Add regulator supply to all CPU coresChen-Yu Tsai1-0/+12
The device tree currently only assigns the a supply for the first CPU core, when in reality the regulator supply is shared by all four cores. This might cause an issue if the implementation does not realize the sharing of the supply. Assign the same regulator supply to the remaining CPU cores to address this. Fixes: 6eeb4180d4b9 ("ARM: dts: sunxi: h3-h5: Add Bananapi M2+ v1.2 device trees") Signed-off-by: Chen-Yu Tsai <wens@csie.org> Signed-off-by: Maxime Ripard <maxime@cerno.tech> Link: https://lore.kernel.org/r/20200717160053.31191-3-wens@kernel.org
2020-07-20ARM: dts: sunxi: libretech-all-h3-cc: Add regulator supply to all CPU coresChen-Yu Tsai1-0/+12
The device tree currently only assigns the a supply for the first CPU core, when in reality the regulator supply is shared by all four cores. This might cause an issue if the implementation does not realize the sharing of the supply. Assign the same regulator supply to the remaining CPU cores to address this. Signed-off-by: Chen-Yu Tsai <wens@csie.org> Signed-off-by: Maxime Ripard <maxime@cerno.tech> Link: https://lore.kernel.org/r/20200717160053.31191-2-wens@kernel.org
2020-07-20ARM: dts: at91: sama5d3_xplained: change phy-modeAlexandre Belloni1-1/+1
Since commit bcf3440c6dd7 ("net: phy: micrel: add phy-mode support for the KSZ9031 PHY"), networking is broken on sama5d3 xplained. The device tree has phy-mode = "rgmii" and this worked before, because KSZ9031 PHY started with default RGMII internal delays configuration (TX off, RX on 1.2 ns) and MAC provided TX delay. After above commit, the KSZ9031 PHY starts handling phy mode properly and disables RX delay, as result networking is become broken. Fix it by switching to phy-mode = "rgmii-rxid" to reflect previous behavior. Fixes: bcf3440c6dd78bfe ("net: phy: micrel: add phy-mode support for the KSZ9031 PHY") Signed-off-by: Alexandre Belloni <alexandre.belloni@bootlin.com> Link: https://lore.kernel.org/r/20200717233644.841080-1-alexandre.belloni@bootlin.com
2020-07-20ARM: dts: ux500-skomer: Correct accel mounting matrixLinus Walleij1-2/+2
This corrects the mounting matrix for the BMA254 accelerometer to what makes PostmarketOS actually orient the screen the right way on this device. Signed-off-by: Linus Walleij <linus.walleij@linaro.org> Link: https://lore.kernel.org/r/20200719201603.3610389-1-linus.walleij@linaro.org
2020-07-20ARM: dts: exynos: Disable frequency scaling for FSYS bus on Odroid XU3 familyMarek Szyprowski1-6/+0
Commit 1019fe2c7280 ("ARM: dts: exynos: Adjust bus related OPPs to the values correct for Exynos5422 Odroids") changed the parameters of the OPPs for the FSYS bus. Besides the frequency adjustments, it also removed the 'shared-opp' property from the OPP table used for FSYS_APB and FSYS busses. This revealed that in fact the FSYS bus frequency scaling never worked. When one OPP table is marked as 'opp-shared', only the first bus which selects the OPP sets the rate of its clock. Then OPP core assumes that the other busses have been changed to that OPP and no change to their clock rates are needed. Thus when FSYS_APB bus, which was registered first, set the rate for its clock, the OPP core did not change the FSYS bus clock later. The mentioned commit removed that behavior, what introduced a regression on some Odroid XU3 boards. Frequency scaling of the FSYS bus causes instability of the USB host operation, what can be observed as network hangs. To restore old behavior, simply disable frequency scaling for the FSYS bus. Reported-by: Willy Wolff <willy.mh.wolff.ml@gmail.com> Fixes: 1019fe2c7280 ("ARM: dts: exynos: Adjust bus related OPPs to the values correct for Exynos5422 Odroids") Signed-off-by: Marek Szyprowski <m.szyprowski@samsung.com> Signed-off-by: Krzysztof Kozlowski <krzk@kernel.org>
2020-07-20ARM: dts: aspeed: tacoma: Fix gpio-key definitionsJoel Stanley1-59/+0
This patch was applied twice. Signed-off-by: Joel Stanley <joel@jms.id.au>
2020-07-20ARM: dts: rainier: Configure ball Y23 as GPIOP7 for MCLR_VPPAndrew Jeffery1-0/+7
GPIOP7 is used in the Rainier design to manage the state of a microcontroller elsewhere in the system but its ball, Y23, is the driver of the heartbeat LED on the ast2600-evb and the SoC defaults Y23 at power-on to the pulse-train behaviour used to drive the LED. This causes much confusion for the micro in the Rainier system, so hog the line as early as possible. Signed-off-by: Andrew Jeffery <andrew@aj.id.au> Signed-off-by: Joel Stanley <joel@jms.id.au>
2020-07-20ARM: dts: aspeed: rainier: Add second cfam on the hubEddie James1-0/+36
The hub FSI master can access the cfams on two other processors. Reflect this by adding a second cfam to the first hub description. Signed-off-by: Eddie James <eajames@linux.ibm.com> Tested-by: Andrew Geissler <geissonator@yahoo.com> Signed-off-by: Joel Stanley <joel@jms.id.au>
2020-07-20ARM: dts: aspeed: rainier: Add line-name checkstopBen Tyner1-1/+1
Rainier uses GPIO B6 as the checkstop GPIO. Define the line-name so that this GPIO can be found by name. Signed-off-by: Ben Tyner <ben.tyner@ibm.com> Signed-off-by: Joel Stanley <joel@jms.id.au>
2020-07-20ARM: dts: aspeed: tacoma: Remove checkstop gpio-keyBen Tyner1-6/+0
The attention handler will monitor the checkstop gpio via the character device interface so it needs to not be defined. Signed-off-by: Ben Tyner <ben.tyner@ibm.com> Signed-off-by: Joel Stanley <joel@jms.id.au>