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2020-09-15ARM: 9006/1: uncompress: Wait for ready and busy in debug printsLinus Walleij1-5/+10
For some platforms such as Qualcomm we need to wait for the UART to be ready before writing characters to the UART in the same manner as the macro in debug.S used with the main "Uncompressing Linux ..." text. Pass an extra temporary variable to writeb and make it call waituarttxrdy and busyuart just like the other decomression messages. Optionally it will also call waituartcts if and only if CONFIG_DEBUG_UART_FLOW_CONTROL is selected. After this the decompression debug messages work fine on Qualcomm platforms if you compile head.S with -DDEBUG. Cc: Nicolas Pitre <nico@fluxnic.net> Cc: Fabrizio Castro <fabrizio.castro@bp.renesas.com> Cc: Ard Biesheuvel <ardb@kernel.org> Signed-off-by: Linus Walleij <linus.walleij@linaro.org> Signed-off-by: Russell King <rmk+kernel@armlinux.org.uk>
2020-09-15ARM: 9005/1: debug: Select flow control for all debug UARTsLinus Walleij1-0/+2
Instead of a flow control selection mechanism specifically for 8250, make this available for all debug UARTs. If the debug UART supports waiting for CTS to be asserted, then this code can be activated for terminals that need it. We keep the defaults for EBSA110, Footbridge, Gemini and RPC so that this still works as expected for these older platforms: they assume that flow control shall be enabled for debug prints. I switch the location of the check for ifdef CONFIG_DEBUG_UART_FLOW_CONTROL from the actual debug UART drivers: the code would get compiled-out for 8250 and Tegra unless their custom config (or passing -DFLOW_CONTROL in the Tegra case) was not set. Instead this is conditional at the three places where we print debug messages. The idea is that debug UARTs can be implemented without this ifdef boilerplate so they look cleaner, alas the ifdef has to be somewhere. Signed-off-by: Linus Walleij <linus.walleij@linaro.org> Signed-off-by: Russell King <rmk+kernel@armlinux.org.uk>
2020-09-15ARM: 9004/1: debug: Split waituart to CTS and TXRDYLinus Walleij1-1/+2
This patch was triggered by a remark from Russell that introducing a call to the waituart (needed to fix debug prints on the Qualcomm platforms) was dangerous because in some cases this will involve waiting for a modem CTS (clear to send) signal, and debug messages would maybe not work on platforms with no modem connected to the UART port: they will just hang waiting for the modem to assert CTS and this might never happen. Looking through all UART debug drivers implementing the waituart macro I discovered that all users except two actually use this macro to check if the UART is ready for TX, let's call this TXRDY. Only two debug UART drivers actually check for CTS: - arch/arm/include/debug/8250.S - arch/arm/include/debug/tegra.S The former is very significant since the 8250 is possibly the most common UART on the planet. We have the following problem: the semantics of waituart are ambiguous making it dangerous to introduce the macro to debug code fixing debug prints for Qualcomm. To start to pry this problem apart, this patch does the following: - Convert all debug UART drivers to define two macros: - waituartcts with the clear semantic to wait for CTS to be asserted - waituarttxrdy with the clear semantic to wait for the TX capability of the UART to be ready - When doing this take care to assign the right function to each drivers macro, so they now do exactly the above. - Update the three sites in the kernel invoking the waituart macro to call waituartcts/waituarttxrdy in sequence, so that the functional impact on the kernel should be zero. After this we can start to change the code sites using this code to do the right thing. Signed-off-by: Linus Walleij <linus.walleij@linaro.org> Signed-off-by: Russell King <rmk+kernel@armlinux.org.uk>
2020-09-15ARM: 9003/1: uncompress: Delete unused debug macrosLinus Walleij1-30/+0
The debug macros debug_reloc_start and debug_reloc_end were rendered unused in commit 6d7d0ae51574943bf571d269da3243257a2d15db "ARM: 6750/1: improvements to compressed/head.S". Later on a different debug macro named dbgkc was introduced in commit f3c899927e19d1be39818145efc39ea27b8efc69 "ARM: 8786/1: Debug kernel copy by printing". Delete the dead debug code. Cc: Nicolas Pitre <nico@fluxnic.net> Cc: Fabrizio Castro <fabrizio.castro@bp.renesas.com> Cc: Ard Biesheuvel <ardb@kernel.org> Signed-off-by: Linus Walleij <linus.walleij@linaro.org> Signed-off-by: Russell King <rmk+kernel@armlinux.org.uk>
2020-09-15ARM: dts: r8a7742-iwg21d-q7-dbcm-ca: Add can0 support to camera DBLad Prabhakar1-0/+11
This patch enables CAN0 interface exposed through connector J4 on the camera DB. Signed-off-by: Lad Prabhakar <prabhakar.mahadev-lad.rj@bp.renesas.com> Reviewed-by: Chris Paterson <Chris.Paterson2@renesas.com> Link: https://lore.kernel.org/r/20200911083615.17377-1-prabhakar.mahadev-lad.rj@bp.renesas.com Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
2020-09-15ARM: dts: r8a7742: Add VSP supportLad Prabhakar1-0/+36
Add VSP support to R8A7742 (RZ/G1H) SoC dtsi. Signed-off-by: Lad Prabhakar <prabhakar.mahadev-lad.rj@bp.renesas.com> Reviewed-by: Chris Paterson <Chris.Paterson2@renesas.com> Link: https://lore.kernel.org/r/20200911080929.15058-1-prabhakar.mahadev-lad.rj@bp.renesas.com Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
2020-09-14ARM: dts: hisilicon: Fix SP805 clocksAndre Przywara1-2/+3
The SP805 DT binding requires two clocks to be specified, but Hisilicon platform DTs currently only specify one clock. In practice, Linux would pick a clock named "apb_pclk" for the bus clock, and the Linux and U-Boot SP805 driver would use the first clock to derive the actual watchdog counter frequency. Since currently both are the very same clock, we can just double the clock reference, and add the correct clock-names, to match the binding. Signed-off-by: Andre Przywara <andre.przywara@arm.com> Signed-off-by: Wei Xu <xuwei5@hisilicon.com>
2020-09-14ARM: dts: hisilicon: Fix SP804 usersAndre Przywara2-12/+22
The SP804 binding only specifies one or three clocks, but does not allow just two clocks. The HiSi 3620 .dtsi specified two clocks for the two timers, plus gave one "apb_pclk" clock-name to appease the primecell bus driver. Extend the clocks by duplicating the first clock to the end of the clock list, and add two dummy clock-names to make the primecell driver happy. I don't know what the real APB clock for the IP is, but with the current DT the first timer clock was used for that, so this change keeps the current status. Signed-off-by: Andre Przywara <andre.przywara@arm.com> Signed-off-by: Wei Xu <xuwei5@hisilicon.com>
2020-09-14Merge 5.9-rc5 into usb-nextGreg Kroah-Hartman15-47/+34
We need the USB fixes in here as well. Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
2020-09-13Merge tag 'arm-soc/for-5.10/devicetree' of ↵Olof Johansson9-10/+397
https://github.com/Broadcom/stblinux into arm/dt This pull request contains Broadcom ARM-based SoCs changes for 5.10, please pull the following: - Christian adds support for the Cisco Meraki MR32 which is based on the BCM53016 SoC, this requires specifying the PWM, second UART and third PCIe controller in Device Tree before finally adding support for the board. - Adrian updates the status properties from "ok" to "okay". - Andre fixes the SP805 watchdog nodes to have the correct clock names and binding for both the Cygnus and Northstar Plus (NSP). He does the same thing with the SP804 timer node which was missing an "arm,primecell" compatible string. - Maxime enables the BCM2711 (Raspberry Pi 4) display pipeline since all DRM changes are ready. * tag 'arm-soc/for-5.10/devicetree' of https://github.com/Broadcom/stblinux: ARM: dts: broadcom: Fix SP804 node ARM: dts: NSP: Fix SP805 clock-names ARM: dts: Cygnus: Fix SP805 clocks ARM: dts: NSP: replace status value "ok" by "okay" ARM: BCM5301X: Add DT for Meraki MR32 ARM: dts: bcm2711: Enable the display pipeline ARM: dts: BCM5301X: Specify pcie2 in the DT ARM: dts: BCM5301X: Specify uart2 in the DT ARM: dts: BCM5301X: Specify PWM in the DT dt-bindings: ARM: add bindings for the Meraki MR32 Link: https://lore.kernel.org/r/20200912032153.1216354-1-f.fainelli@gmail.com Signed-off-by: Olof Johansson <olof@lixom.net>
2020-09-13Merge tag 'dt-schema-5.10' of ↵Olof Johansson6-6/+6
https://git.kernel.org/pub/scm/linux/kernel/git/krzk/linux into arm/dt Various minor cleanups for ARM DTS Cleanup ARM DTS to remove dtschema validation errors. * tag 'dt-schema-5.10' of https://git.kernel.org/pub/scm/linux/kernel/git/krzk/linux: ARM: dts: alpine: Align GIC nodename with dtschema ARM: dts: zx: Align L2 cache-controller nodename with dtschema ARM: dts: tango: Align L2 cache-controller nodename with dtschema ARM: dts: spear: Align L2 cache-controller nodename with dtschema ARM: dts: qcom: Align L2 cache-controller nodename with dtschema ARM: dts: prima: Align L2 cache-controller nodename with dtschema Link: https://lore.kernel.org/r/20200911155509.1495-2-krzk@kernel.org Signed-off-by: Olof Johansson <olof@lixom.net>
2020-09-13Merge tag 'aspeed-5.10-devicetree' of ↵Olof Johansson11-21/+1193
git://git.kernel.org/pub/scm/linux/kernel/git/joel/aspeed into arm/dt ASPEED device tree updates for 5.10 - New machines * Wistron Mowgli, an AST2500 BMC for a Power9 OpenPower server * Facebook Wedge400, an AST2500 BMC system which we can assume is 4 times better than the existing Wedge100 top of rack network switch - Add a new device, the IBM Operation Panel - Fixes for Facebook's collection of BMCs - eMMC and vuart fixes * tag 'aspeed-5.10-devicetree' of git://git.kernel.org/pub/scm/linux/kernel/git/joel/aspeed: ARM: dts: aspeed: Add Mowgli BMC platform ARM: dts: rainier: Disable internal pull-downs on eMMC pins ARM: aspeed: g5: Do not set sirq polarity ARM: dts: aspeed: rainier: Add IBM Operation Panel I2C device ARM: dts: aspeed: tacoma: Add IBM Operation Panel I2C device ARM: dts: aspeed: rainier: Enable XDMA engine ARM: dts: aspeed: wedge40: Update UART4 pin settings ARM: dts: aspeed: wedge40: Update FMC flash0 label ARM: dts: aspeed: Add Facebook Wedge400 BMC ARM: dts: aspeed: minipack: Update 64MB FMC flash layout ARM: dts: aspeed: yamp: Set 32MB FMC flash layout ARM: dts: aspeed: cmm: Set 32MB FMC flash layout ARM: dts: aspeed: Remove flash layout from Facebook AST2500 Common dtsi Link: https://lore.kernel.org/r/CACPK8XcDNBYAHzW6NYB4LFm3YbN63AprgW75ZqS+6uXn2b3kug@mail.gmail.com Signed-off-by: Olof Johansson <olof@lixom.net>
2020-09-13Merge tag 'juno-updates-5.10' of ↵Olof Johansson9-25/+27
git://git.kernel.org/pub/scm/linux/kernel/git/sudeep.holla/linux into arm/dt ARMv8 Juno/Vexpress/Fast Models updates for v5.10 A few device tree source fixes to make them fully SP804 timer and SP805 watchdog binding compliant. * tag 'juno-updates-5.10' of git://git.kernel.org/pub/scm/linux/kernel/git/sudeep.holla/linux: arm64: dts: arm: Fix SP805 clock-names ARM: dts: arm: Fix SP805 clocks ARM: dts: arm: Fix SP804 users Link: https://lore.kernel.org/r/20200908135028.GA10106@bogus Signed-off-by: Olof Johansson <olof@lixom.net>
2020-09-13Merge tag 'samsung-dt-5.10' of ↵Olof Johansson37-358/+874
https://git.kernel.org/pub/scm/linux/kernel/git/krzk/linux into arm/dt Samsung DTS ARM changes for v5.10 1. Add sound support to Galaxy S3/Midas family (Exynos4412). 2. Add sound support to Galaxy S/Aries family (S5Pv210). 3. Configure L2C-310 cache controller via DTS on Exynos4. 4. Big cleanup of Exynos DTS to fix as many dtschema warnings as possible. This includes adding missing properties (thus e.g. enabling S3C RTC clock), correcting existing nodes, renaming of nodes and using non-deprecated properties or compatibles. Except mentioned bring up of S3C RTC, this should not have visible effect. * tag 'samsung-dt-5.10' of https://git.kernel.org/pub/scm/linux/kernel/git/krzk/linux: (49 commits) ARM: dts: exynos: Silence SATA PHY warning in Exynos5250 ARM: dts: exynos: Remove I2C9 samsung, i2c-slave-addr from Exynos5250 boards ARM: dts: samsung: odroid-xu3: Move assigned-clock* properties to i2s0 node ARM: dts: exynos: Use S2MPS11 clock in S3C RTC in SMDK5420 ARM: dts: exynos: Silence DP HPD pinctrl dtschema warning in Exynos5250 Spring ARM: dts: exynos: Use S5M8767 clock in S3C RTC in Exynos5250 Spring ARM: dts: exynos: Add max77686 clocks for S3C RTC in SMDK5250 ARM: dts: exynos: Override thermal by label in Exynos5250 ARM: dts: exynos: Correct whitespace and indentation issues in Exynos5 ARM: dts: exynos: Silence i2c-gpio dtschema warning in Exynos5250 Arndale ARM: dts: exynos: Correct S3C RTC bindings in SMDK5410 ARM: dts: exynos: Remove unneeded address/size cells in Exynos5260 GIC ARM: dts: exynos: Correct compatible for Exynos5260 GIC ARM: dts: exynos: Correct compatible for Exynos5 GIC ARM: dts: s5pv210: Enable audio on Aries boards ARM: dts: exynos: Correct whitespace and indentation issues ARM: dts: exynos: Correct S3C RTC bindings in Tiny4412 ARM: dts: exynos: Correct S3C RTC bindings in SMDK4412 ARM: dts: exynos: Add CPU cooling in Tiny4412 ARM: dts: exynos: Add CPU cooling in SMDK4412 ... Link: https://lore.kernel.org/r/20200907150425.11077-1-krzk@kernel.org Signed-off-by: Olof Johansson <olof@lixom.net>
2020-09-13Merge tag 'renesas-arm-dt-for-v5.10-tag1' of ↵Olof Johansson4-60/+492
git://git.kernel.org/pub/scm/linux/kernel/git/geert/renesas-devel into arm/dt Renesas ARM DT updates for v5.10 - Increase support for the RZ/G2H SoC on the HopeRun HiHope RZ/G2H board, and its display panel expansion board, - Increase support for the RZ/G1H SoC on the iWave RainboW SoM (G21M) and Qseven board (G21D), - SATA support for the HopeRun HiHope RZ/G2N board, - PCIe endpoint support for the RZ/G2M, RZ/G2E, and RZ/G2H SoCs, - Audio support for the R-Car M3-W+ SoC. - Minor fixes and improvements. * tag 'renesas-arm-dt-for-v5.10-tag1' of git://git.kernel.org/pub/scm/linux/kernel/git/geert/renesas-devel: (39 commits) arm64: dts: renesas: Add HiHope RZ/G2H board with idk-1110wr display arm64: dts: renesas: r8a774e1: Add cpuidle support for CA5x cores arm64: dts: renesas: r8a774e1: Add FDP1 device nodes ARM: dts: r8a7742-iwg21d-q7: Enable PCIe Controller ARM: dts: r8a7742: Add IPMMU DT nodes arm64: dts: renesas: r8a77961: Enable Sound / Audio-DMAC arm64: dts: renesas: r8a774e1: Add PWM device nodes ARM: dts: r8a7742-iwg21m: Add SPI NOR support arm64: dts: renesas: r8a774e1-hihope-rzg2h: Enable HS400 mode ARM: dts: r8a7742-iwg21m: Add RTC support ARM: dts: r8a7742-iwg21m: Sort the nodes alphabetically ARM: dts: r8a7742: Add CAN support arm64: dts: renesas: r8a774c0: Add PCIe EP node arm64: dts: renesas: r8a774b1: Add PCIe EP nodes arm64: dts: renesas: r8a774a1: Add PCIe EP nodes ARM: dts: r8a7742: Add QSPI support arm64: dts: renesas: r8a774e1-hihope-rzg2h: Setup DU clocks arm64: dts: renesas: r8a774e1: Add LVDS device node arm64: dts: renesas: r8a774e1: Populate HDMI encoder node arm64: dts: renesas: r8a774e1: Populate DU device node ... Link: https://lore.kernel.org/r/20200904114819.30254-3-geert+renesas@glider.be Signed-off-by: Olof Johansson <olof@lixom.net>
2020-09-13Merge tag 'arm-soc/for-5.9/devicetree-fixes' of ↵Olof Johansson3-3/+3
https://github.com/Broadcom/stblinux into arm/fixes This pull request contains Broadcom ARM-based SoCs Device Tree fixes for 5.9, please pull the following: - Florian fixes the Broadcom QSPI controller binding such that the most specific compatible string is the left most one, and all existing in-tree users are updated as well. * tag 'arm-soc/for-5.9/devicetree-fixes' of https://github.com/Broadcom/stblinux: arm64: dts: ns2: Fixed QSPI compatible string ARM: dts: BCM5301X: Fixed QSPI compatible string ARM: dts: NSP: Fixed QSPI compatible string ARM: dts: bcm: HR2: Fixed QSPI compatible string dt-bindings: spi: Fix spi-bcm-qspi compatible ordering Link: https://lore.kernel.org/r/20200909211857.4144718-1-f.fainelli@gmail.com Signed-off-by: Olof Johansson <olof@lixom.net>
2020-09-13Merge tag 'imx-fixes-5.9-2' of ↵Olof Johansson1-1/+1
git://git.kernel.org/pub/scm/linux/kernel/git/shawnguo/linux into arm/fixes i.MX fixes for 5.9, round 2: - Fix the misspelling of 'interrupts' property in i.MX8MQ TMU DT node. - Correct 'ahb' clock for i.MX8MP SDMA1 in device tree. - Fix pad QSPI1B_SCLK mux mode for UART3 on i.MX6SX. * tag 'imx-fixes-5.9-2' of git://git.kernel.org/pub/scm/linux/kernel/git/shawnguo/linux: ARM: dts: imx6sx: fix the pad QSPI1B_SCLK mux mode for uart3 arm64: dts: imx8mp: correct sdma1 clk setting arm64: dts: imx8mq: Fix TMU interrupt property Link: https://lore.kernel.org/r/20200909143844.GA25109@dragon Signed-off-by: Olof Johansson <olof@lixom.net>
2020-09-13Merge tag 'omap-for-v5.9/fixes-rc3' of ↵Olof Johansson3-31/+20
git://git.kernel.org/pub/scm/linux/kernel/git/tmlind/linux-omap into arm/fixes Fixes for omaps for v5.9-rc cycle Few fixes for omap based devices: - Fix of_clk_get() error handling for omap-iommu - Fix missing audio pinctrl entries for logicpd boards - Fix video for logicpd-som-lv after switch to generic panels - Fix omap5 DSI clocks base * tag 'omap-for-v5.9/fixes-rc3' of git://git.kernel.org/pub/scm/linux/kernel/git/tmlind/linux-omap: ARM: dts: omap5: Fix DSI base address and clocks ARM: dts: logicpd-som-lv-baseboard: Fix missing video ARM: dts: logicpd-som-lv-baseboard: Fix broken audio ARM: dts: logicpd-torpedo-baseboard: Fix broken audio ARM: OMAP2+: Fix an IS_ERR() vs NULL check in _get_pwrdm() Link: https://lore.kernel.org/r/pull-1599132064-54898@atomide.com Signed-off-by: Olof Johansson <olof@lixom.net>
2020-09-13ARM: dts: imx6qdl-tqma6: fix LM75 compatible stringMatthias Schiffer2-2/+2
Specify the National LM75 sensor including its vendor name, as mandated by the binding docs. Fixes: cac849e9bbc8 ("ARM: dts: imx6qdl: add TQMa6{S,Q,QP} SoM") Signed-off-by: Matthias Schiffer <matthias.schiffer@ew.tq-group.com> Signed-off-by: Shawn Guo <shawnguo@kernel.org>
2020-09-13ARM: dts: imx6qdl-tqma6: remove obsolete fsl,spi-num-chipselectsMatthias Schiffer1-1/+0
This property is unneeded and not supported by the spi-imx driver. Signed-off-by: Matthias Schiffer <matthias.schiffer@ew.tq-group.com> Signed-off-by: Shawn Guo <shawnguo@kernel.org>
2020-09-13ARM: dts: imx6qdl-tqma6: fix indentationMatthias Schiffer1-94/+94
The PMIC configuration is indented one level too deep. Signed-off-by: Matthias Schiffer <matthias.schiffer@ew.tq-group.com> Signed-off-by: Shawn Guo <shawnguo@kernel.org>
2020-09-11ARM: dts: alpine: Align GIC nodename with dtschemaKrzysztof Kozlowski1-1/+1
Fix dtschema validator warnings like: gic@fb001000: $nodename:0: 'gic@fb001000' does not match '^interrupt-controller(@[0-9a-f,]+)*$' Signed-off-by: Krzysztof Kozlowski <krzk@kernel.org>
2020-09-11ARM: dts: zx: Align L2 cache-controller nodename with dtschemaKrzysztof Kozlowski1-1/+1
Fix dtschema validator warnings like: l2-cache-controller@c00000: $nodename:0: 'l2-cache-controller@c00000' does not match '^(cache-controller|cpu)(@[0-9a-f,]+)*$' Signed-off-by: Krzysztof Kozlowski <krzk@kernel.org> Reviewed-by: Jun Nie <jun.nie@linaro.org>
2020-09-11ARM: dts: tango: Align L2 cache-controller nodename with dtschemaKrzysztof Kozlowski1-1/+1
Fix dtschema validator warnings like: l2-cache-controller@20100000: $nodename:0: 'l2-cache-controller@20100000' does not match '^(cache-controller|cpu)(@[0-9a-f,]+)*$' Signed-off-by: Krzysztof Kozlowski <krzk@kernel.org> Acked-by: Mans Rullgard <mans@mansr.com>
2020-09-11ARM: dts: spear: Align L2 cache-controller nodename with dtschemaKrzysztof Kozlowski1-1/+1
Fix dtschema validator warnings like: l2-cache: $nodename:0: 'l2-cache' does not match '^(cache-controller|cpu)(@[0-9a-f,]+)*$' Signed-off-by: Krzysztof Kozlowski <krzk@kernel.org> Acked-by: Viresh Kumar <viresh.kumar@linaro.org>
2020-09-11ARM: dts: qcom: Align L2 cache-controller nodename with dtschemaKrzysztof Kozlowski1-1/+1
Fix dtschema validator warnings like: l2-cache@2040000: $nodename:0: 'l2-cache@2040000' does not match '^(cache-controller|cpu)(@[0-9a-f,]+)*$' Signed-off-by: Krzysztof Kozlowski <krzk@kernel.org>
2020-09-11ARM: dts: prima: Align L2 cache-controller nodename with dtschemaKrzysztof Kozlowski1-1/+1
Fix dtschema validator warnings like: l2-cache-controller@80040000: $nodename:0: 'l2-cache-controller@80040000' does not match '^(cache-controller|cpu)(@[0-9a-f,]+)*$' Signed-off-by: Krzysztof Kozlowski <krzk@kernel.org> Acked-by: Barry Song <baohua@kernel.org>
2020-09-11ARM: dts: exynos: move assigned-clock* properties to i2s0 node in Odroid XU4Krzysztof Kozlowski1-33/+27
The purpose of those assigned-clock-* properties is to configure clock for the I2S device so move them to respective node. This silences the dtschema warnings like: 'clocks' is a dependency of 'assigned-clocks' Signed-off-by: Krzysztof Kozlowski <krzk@kernel.org> Link: https://lore.kernel.org/r/20200906142146.21266-3-krzk@kernel.org
2020-09-11ARM: dts: exynos: add input clock to CMU in Exynos4412 OdroidKrzysztof Kozlowski1-0/+1
Commit 68605101460e ("ARM: dts: exynos: Add support for audio over HDMI for Odroid X/X2/U3") added assigned clocks under Clock Management Unit. However the dtschema expects "clocks" property if "assigned-clocks" are used. Add reference to input clock to silence the dtschema warnings: arch/arm/boot/dts/exynos4412-odroidu3.dt.yaml: clock-controller@10030000: 'clocks' is a dependency of 'assigned-clocks' Signed-off-by: Krzysztof Kozlowski <krzk@kernel.org> Link: https://lore.kernel.org/r/20200906142146.21266-2-krzk@kernel.org
2020-09-11ARM: dts: exynos: add input clock to CMU in Exynos3250Krzysztof Kozlowski3-0/+12
Commit 52005dece527 ("ARM: dts: Add assigned clock parents to CMU node for exynos3250") added assigned clocks under Clock Management Unit to fix hangs when accessing ISP registers. However the dtschema expects "clocks" property if "assigned-clocks" are used. Add reference to input clock to silence the dtschema warnings: arch/arm/boot/dts/exynos3250-artik5-eval.dt.yaml: clock-controller@10030000: 'clocks' is a dependency of 'assigned-clocks' Signed-off-by: Krzysztof Kozlowski <krzk@kernel.org> Link: https://lore.kernel.org/r/20200906142146.21266-1-krzk@kernel.org
2020-09-11ARM: dts: s3c24xx: move fixed clocks under root node in SMDK2416Krzysztof Kozlowski1-12/+5
The fixed clocks are kept under dedicated 'clocks' node but this causes multiple dtschema warnings: clocks: $nodename:0: 'clocks' does not match '^([a-z][a-z0-9\\-]+-bus|bus|soc|axi|ahb|apb)(@[0-9a-f]+)?$' clocks: #size-cells:0:0: 0 is not one of [1, 2] clocks: xti@0:reg:0: [0] is too short clocks: 'ranges' is a required property xti@0: 'reg' does not match any of the regexes: 'pinctrl-[0-9]+' Signed-off-by: Krzysztof Kozlowski <krzk@kernel.org> Link: https://lore.kernel.org/r/20200907183313.29234-12-krzk@kernel.org
2020-09-11ARM: dts: s3c24xx: add address to CPU nodeKrzysztof Kozlowski1-1/+6
The CPU nodes should be described as children of "cpus" bus node with appropriate "reg" properties: cpus: '#address-cells' is a required property cpus: '#size-cells' is a required property cpu: 'device_type' is a required property cpu: 'reg' is a required property Signed-off-by: Krzysztof Kozlowski <krzk@kernel.org> Link: https://lore.kernel.org/r/20200907183313.29234-11-krzk@kernel.org
2020-09-11ARM: dts: s3c24xx: align PWM/timer node name with dtschemaKrzysztof Kozlowski1-1/+1
Although PWM is used on S3C24xx as clocksource/timer, the dtschema expects the node to be named in certain format: timer@51000000: $nodename:0: 'timer@51000000' does not match '^pwm(@.*|-[0-9a-f])*$' Signed-off-by: Krzysztof Kozlowski <krzk@kernel.org> Link: https://lore.kernel.org/r/20200907183313.29234-10-krzk@kernel.org
2020-09-11ARM: dts: s3c24xx: override nodes by labelKrzysztof Kozlowski2-63/+63
Using full paths to extend or override a device tree node is error prone. If there was a typo error, a new node will be created instead of extending the existing node. This will lead to run-time errors that could be hard to detect. A mistyped label on the other hand, will cause a dtc compile error (during build time). Signed-off-by: Krzysztof Kozlowski <krzk@kernel.org> Link: https://lore.kernel.org/r/20200907183313.29234-9-krzk@kernel.org
2020-09-11ARM: dts: s3c24xx: fix number of PWM cellsKrzysztof Kozlowski1-1/+1
The PWM has only three cells, not four, as pointed out by dtschema: timer@51000000: #pwm-cells:0:0: 3 was expected Signed-off-by: Krzysztof Kozlowski <krzk@kernel.org> Link: https://lore.kernel.org/r/20200907183313.29234-8-krzk@kernel.org
2020-09-11ARM: dts: s3c6410: remove additional CPU compatibleKrzysztof Kozlowski1-1/+1
Only the specific compatible (arm,arm1176jzf-s) is allowed by dtschema: cpu@0: compatible: ['arm,arm1176jzf-s', 'arm,arm1176'] is too long cpu@0: compatible: Additional items are not allowed ('arm,arm1176' was unexpected) Signed-off-by: Krzysztof Kozlowski <krzk@kernel.org> Link: https://lore.kernel.org/r/20200907183313.29234-7-krzk@kernel.org
2020-09-11ARM: dts: s3c6410: align node SROM bus node name with dtschema in SMDK6410Krzysztof Kozlowski1-1/+1
The SROM controller is modeled with a bus so align the device node name with dtschema to fix warning: srom-cs1@18000000: $nodename:0: 'srom-cs1@18000000' does not match '^([a-z][a-z0-9\\-]+-bus|bus|soc|axi|ahb|apb)(@[0-9a-f]+)?$' Signed-off-by: Krzysztof Kozlowski <krzk@kernel.org> Link: https://lore.kernel.org/r/20200907183313.29234-6-krzk@kernel.org
2020-09-11ARM: dts: s3c6410: align node SROM bus node name with dtschema in Mini6410Krzysztof Kozlowski1-1/+1
The SROM controller is modeled with a bus so align the device node name with dtschema to fix warning: srom-cs1@18000000: $nodename:0: 'srom-cs1@18000000' does not match '^([a-z][a-z0-9\\-]+-bus|bus|soc|axi|ahb|apb)(@[0-9a-f]+)?$' Signed-off-by: Krzysztof Kozlowski <krzk@kernel.org> Link: https://lore.kernel.org/r/20200907183313.29234-5-krzk@kernel.org
2020-09-11ARM: dts: s3c6410: move fixed clocks under root node in SMDK6410Krzysztof Kozlowski1-19/+11
The fixed clocks are kept under dedicated 'clocks' node but this causes multiple dtschema warnings: clocks: $nodename:0: 'clocks' does not match '^([a-z][a-z0-9\\-]+-bus|bus|soc|axi|ahb|apb)(@[0-9a-f]+)?$' clocks: #size-cells:0:0: 0 is not one of [1, 2] clocks: oscillator@0:reg:0: [0] is too short clocks: oscillator@1:reg:0: [1] is too short clocks: 'ranges' is a required property oscillator@0: 'reg' does not match any of the regexes: 'pinctrl-[0-9]+' Signed-off-by: Krzysztof Kozlowski <krzk@kernel.org> Link: https://lore.kernel.org/r/20200907183313.29234-4-krzk@kernel.org
2020-09-11ARM: dts: s3c6410: move fixed clocks under root node in Mini6410Krzysztof Kozlowski1-19/+11
The fixed clocks are kept under dedicated 'clocks' node but this causes multiple dtschema warnings: clocks: $nodename:0: 'clocks' does not match '^([a-z][a-z0-9\\-]+-bus|bus|soc|axi|ahb|apb)(@[0-9a-f]+)?$' clocks: #size-cells:0:0: 0 is not one of [1, 2] clocks: oscillator@0:reg:0: [0] is too short clocks: oscillator@1:reg:0: [1] is too short clocks: 'ranges' is a required property oscillator@0: 'reg' does not match any of the regexes: 'pinctrl-[0-9]+' Signed-off-by: Krzysztof Kozlowski <krzk@kernel.org> Link: https://lore.kernel.org/r/20200907183313.29234-3-krzk@kernel.org
2020-09-11ARM: dts: s5pv210: correct ethernet unit address in SMDKV210Krzysztof Kozlowski1-1/+1
The SROM bank 5 is at address 0xa8000000, just like the one put in "reg" property of ethernet node. Fix the unit address of ethernet node. Signed-off-by: Krzysztof Kozlowski <krzk@kernel.org> Link: https://lore.kernel.org/r/20200907183313.29234-2-krzk@kernel.org
2020-09-11ARM: dts: renesas: Fix pin controller node namesGeert Uytterhoeven19-19/+19
According to Devicetree Specification v0.2 and later, Section "Generic Names Recommendation", the node name for a pin controller device node should be "pinctrl". Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be> Reviewed-by: Niklas Söderlund <niklas.soderlund+renesas@ragnatech.se> Link: https://lore.kernel.org/r/20200821112351.5518-1-geert+renesas@glider.be
2020-09-11ARM: dts: aspeed: Add Mowgli BMC platformBen Pai2-0/+663
The Mowgli BMC is an ASPEED ast2500 based BMC that is part of an OpenPower Power9 server. Signed-off-by: Ben Pai <Ben_Pai@wistron.com> Reviewed-by: Joel Stanley <joel@jms.id.au> Link: https://lore.kernel.org/r/20200909090818.24021-1-ben_pai@wistron.com Signed-off-by: Joel Stanley <joel@jms.id.au>
2020-09-10Merge tag 'tags/bcm2835-dt-next-2020-09-08' into devicetree/nextFlorian Fainelli2-1/+169
Maxime Ripard enables vc4 on BCM2711 (RPi4), which among other things adds HDMI functionality (no 4K yet). Signed-off-by: Florian Fainelli <f.fainelli@gmail.com>
2020-09-10ARM: dts: broadcom: Fix SP804 nodeAndre Przywara1-2/+2
The DT binding for SP804 requires to have an "arm,primecell" compatible string. Add this string so that the Linux primecell bus driver picks the device up and activates the clock. Signed-off-by: Andre Przywara <andre.przywara@arm.com> Tested-by: Florian Fainelli <f.fainelli@gmail.com> [florian: added compatible to ccbtimer1] Signed-off-by: Florian Fainelli <f.fainelli@gmail.com>
2020-09-10ARM: dts: NSP: Fix SP805 clock-namesAndre Przywara1-1/+1
The SP805 binding sets the name for the actual watchdog clock to "wdog_clk" (with an underscore). Change the name in the DTs for the Broadcom NSP platform to match that. The Linux and U-Boot driver use the *first* clock for this purpose anyway, so it does not break anything. Signed-off-by: Andre Przywara <andre.przywara@arm.com> Reviewed-by: Ray Jui <ray.jui@broadcom.com> Acked-by: Florian Fainelli <f.fainelli@gmail.com> Signed-off-by: Florian Fainelli <f.fainelli@gmail.com>
2020-09-10ARM: dts: Cygnus: Fix SP805 clocksAndre Przywara1-2/+2
The SP805 DT binding requires two clocks to be specified, but the Broadcom Cygnus DT currently only specifies one clock. In practice, Linux would pick a clock named "apb_pclk" for the bus clock, and the Linux and U-Boot SP805 driver would use the first clock to derive the actual watchdog counter frequency. Since currently both are the very same clock, we can just double the clock reference, and add the correct clock-names, to match the binding. Signed-off-by: Andre Przywara <andre.przywara@arm.com> Reviewed-by: Ray Jui <ray.jui@broadcom.com> Acked-by: Florian Fainelli <f.fainelli@gmail.com> Signed-off-by: Florian Fainelli <f.fainelli@gmail.com>
2020-09-10ARM: dts: NSP: replace status value "ok" by "okay"Adrian Schmutzler2-2/+2
While the DT parser recognizes "ok" as a valid value for the "status" property, it is actually mentioned nowhere. Use the proper value "okay" instead, as done in the majority of files already. Signed-off-by: Adrian Schmutzler <freifunk@adrianschmutzler.de> Signed-off-by: Florian Fainelli <f.fainelli@gmail.com>
2020-09-10ARM: BCM5301X: Add DT for Meraki MR32Christian Lamparter2-0/+198
add support for the Cisco Meraki MR32. This is a dual-band enterprise class 802.11ac access point. The unit was donated by Chris Blake. Thank you! SoC: Broadcom BCM53016A1 (1 GHz, 2 cores) RAM: 128 MiB NAND: 128 MiB Spansion S34ML01G2 (~114 MiB useable) ETH: 1GBit Ethernet Port - PoE WIFI1: Broadcom BCM43520 an+ac (2x2:2 - id: 0x4352) WIFI2: Broadcom BCM43520 bgn (2x2:2 - id: 0x4352) WIFI3: Broadcom BCM43428 abgn (1x1:1 - id: 43428) BLE: Broadcom BCM20732 (ttyS1) LEDS: 1 x Programmable RGB Status LED (driven by a PWM) 1 x White LED (GPIO) 1 x Orange LED Fault Indicator (GPIO) 2 x LAN Activity / Speed LEDs (On the RJ45 Port) BUTTON: one Reset button MISC: AT24C64 8KiB EEPROM (i2c - stores Ethernet MAC) ina219 hardware monitor (i2c) Kensington Lock SERIAL: WARNING: The serial port needs a TTL/RS-232 3V3 level converter! The Serial setting is 115200-8-N-1. The board has a populated right angle 1x4 0.1" pinheader. The pinout is: VCC, RX, TX, GND. Odd stuff: - uart0 clock frequency is 62.5 MHz. - The LEDs are labeled as SYS-LED1 through SYS-LED3 because of the silkscreen on the PCB. - the original u-boot has been compiled with most functions and commands disabled. The u-boot env isn't setup properly either and as a result, the bcm47xxpart probing is not working. Hence, the nand partitions are specified through a "fixed-partition" binding. - The "WICED SMART(TM)" Bluetooth LE 4.0 BCM20732 chip is connected to uart2 of the SoC. The BCM20732 does not provide a HCI. So the linux' bluetooth stack is useless. The mock-up node with the compatible binding and enable-gpios property is provided solely as documentation. Signed-off-by: Christian Lamparter <chunkeey@gmail.com> Signed-off-by: Florian Fainelli <f.fainelli@gmail.com>
2020-09-10net: dsa: microchip: look for phy-mode in port nodesHelmut Grohne1-1/+1
Documentation/devicetree/bindings/net/dsa/dsa.txt says that the phy-mode property should be specified on port nodes. However, the microchip drivers read it from the switch node. Let the driver use the per-port property and fall back to the old location with a warning. Fix in-tree users. Signed-off-by: Helmut Grohne <helmut.grohne@intenta.de> Link: https://lore.kernel.org/netdev/20200617082235.GA1523@laureti-dev/ Acked-by: Alexandre Belloni <alexandre.belloni@bootlin.com> Signed-off-by: David S. Miller <davem@davemloft.net>