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2020-09-23ARM: dts: stm32: Enable RTS/CTS for DH PDK2 UART8Marek Vasut1-1/+2
The DH PDK2 has RTS/CTS lines available on UART8, describe them in DT. Signed-off-by: Marek Vasut <marex@denx.de> Cc: Alexandre Torgue <alexandre.torgue@st.com> Cc: Maxime Coquelin <mcoquelin.stm32@gmail.com> Cc: Patrice Chotard <patrice.chotard@st.com> Cc: Patrick Delaunay <patrick.delaunay@st.com> Cc: linux-stm32@st-md-mailman.stormreply.com To: linux-arm-kernel@lists.infradead.org Signed-off-by: Alexandre Torgue <alexandre.torgue@st.com>
2020-09-23ARM: dts: stm32: Drop QSPI CS2 pinmux on DHCOMMarek Vasut1-2/+2
The QSPI CS2 is not used on DHCOM, remove the pinmux settings. Signed-off-by: Marek Vasut <marex@denx.de> Cc: Alexandre Torgue <alexandre.torgue@st.com> Cc: Maxime Coquelin <mcoquelin.stm32@gmail.com> Cc: Patrice Chotard <patrice.chotard@st.com> Cc: Patrick Delaunay <patrick.delaunay@st.com> Cc: linux-stm32@st-md-mailman.stormreply.com To: linux-arm-kernel@lists.infradead.org Signed-off-by: Alexandre Torgue <alexandre.torgue@st.com>
2020-09-23ARM: dts: stm32: Add STM32MP1 UART8 RTS/CTS pinmuxMarek Vasut1-0/+8
Add extra RTS/CTS line pinmux for STM32MP1 UART8. Signed-off-by: Marek Vasut <marex@denx.de> Cc: Alexandre Torgue <alexandre.torgue@st.com> Cc: Maxime Coquelin <mcoquelin.stm32@gmail.com> Cc: Patrice Chotard <patrice.chotard@st.com> Cc: Patrick Delaunay <patrick.delaunay@st.com> Cc: linux-stm32@st-md-mailman.stormreply.com To: linux-arm-kernel@lists.infradead.org Acked-by: Fabrice Gasnier <fabrice.gasnier@st.com> Signed-off-by: Alexandre Torgue <alexandre.torgue@st.com>
2020-09-23ARM: dts: stm32: add initial support for stm32mp157-odyssey boardMarcin Sloniewski4-1/+376
Add support for Seeed Studio's stm32mp157c odyssey board. Board consists of SoM with stm32mp157c with 4GB eMMC and 512 MB DDR3 RAM and carrier board with USB and ETH interfaces, SD card connector, wifi and BT chip AP6236. In this patch only basic kernel boot is supported and interfacing SD card and on-board eMMC. Signed-off-by: Marcin Sloniewski <marcin.sloniewski@gmail.com> Reviewed-by: Ahmad Fatoum <a.fatoum@pengutronix.de> Signed-off-by: Alexandre Torgue <alexandre.torgue@st.com>
2020-09-23ARM: dts: stm32: lxa-mc1: Fix kernel warning about PHY delaysHolger Assmann1-2/+0
The KSZ9031 PHY skew timings for rxc/txc, originally set to achieve the desired phase shift between clock- and data-signal, now trigger a kernel warning when used in rgmii-id mode: *-skew-ps values should be used only with phy-mode = "rgmii" This is because commit bcf3440c6dd7 ("net: phy: micrel: add phy-mode support for the KSZ9031 PHY") now configures own timings when phy-mode = "rgmii-id". Device trees wanting to set their own delays should use phy-mode "rgmii" instead as the warning prescribes. The "standard" timings now used with "rgmii-id" work fine on this board, so drop the explicit timings in the device tree and thereby silence the warning. Fixes: 666b5ca85cd3 ("ARM: dts: stm32: add STM32MP1-based Linux Automation MC-1 board") Signed-off-by: Holger Assmann <h.assmann@pengutronix.de> Acked-by: Ahmad Fatoum <a.fatoum@pengutronix.de> Signed-off-by: Alexandre Torgue <alexandre.torgue@st.com>
2020-09-23ARM: dts: stm32: Add USB OTG support to DH PDK2Marek Vasut1-2/+5
The DH PDK2 board is capable of USB OTG on the X14 USB Mini-AB connector, fill in the missing bits to make USB OTG possible instead of peripheral. Signed-off-by: Marek Vasut <marex@denx.de> Cc: Alexandre Torgue <alexandre.torgue@st.com> Cc: Maxime Coquelin <mcoquelin.stm32@gmail.com> Cc: Patrice Chotard <patrice.chotard@st.com> Cc: Patrick Delaunay <patrick.delaunay@st.com> Cc: linux-stm32@st-md-mailman.stormreply.com To: linux-arm-kernel@lists.infradead.org Signed-off-by: Alexandre Torgue <alexandre.torgue@st.com>
2020-09-23ARM: dts: stm32: Fix sdmmc2 pins on AV96Marek Vasut1-3/+3
The AV96 uses sdmmc2_d47_pins_c and sdmmc2_d47_sleep_pins_c, which differ from sdmmc2_d47_pins_b and sdmmc2_d47_sleep_pins_b in one pin, SDMMC2_D5, which is PA15 in the former and PA9 in the later. The PA15 is correct on AV96, so fix this. This error is likely a result of rebasing across the stm32mp1 DT pinctrl rework. Fixes: 611325f68102 ("ARM: dts: stm32: Add eMMC attached to SDMMC2 on AV96") Signed-off-by: Marek Vasut <marex@denx.de> Cc: Alexandre Torgue <alexandre.torgue@st.com> Cc: Maxime Coquelin <mcoquelin.stm32@gmail.com> Cc: Patrice Chotard <patrice.chotard@st.com> Cc: Patrick Delaunay <patrick.delaunay@st.com> Cc: linux-stm32@st-md-mailman.stormreply.com To: linux-arm-kernel@lists.infradead.org Signed-off-by: Alexandre Torgue <alexandre.torgue@st.com>
2020-09-23ARM: dts: stm32: Add DHSOM based DRC02 boardMarek Vasut4-2/+195
Add DT for DH DRC02 unit, which is a universal controller device. The system has two ethernet ports, two CANs, RS485 and RS232, USB, capacitive buttons and an OLED display. Signed-off-by: Marek Vasut <marex@denx.de> Cc: Alexandre Torgue <alexandre.torgue@st.com> Cc: Maxime Coquelin <mcoquelin.stm32@gmail.com> Cc: Patrice Chotard <patrice.chotard@st.com> Cc: Patrick Delaunay <patrick.delaunay@st.com> Cc: linux-stm32@st-md-mailman.stormreply.com To: linux-arm-kernel@lists.infradead.org Signed-off-by: Alexandre Torgue <alexandre.torgue@st.com>
2020-09-23ARM: dts: stm32: Move ethernet PHY into DH SoM DTMarek Vasut2-33/+36
The PHY and the VIO regulator is populated on the SoM, move it into the SoM DT. Signed-off-by: Marek Vasut <marex@denx.de> Cc: Alexandre Torgue <alexandre.torgue@st.com> Cc: Maxime Coquelin <mcoquelin.stm32@gmail.com> Cc: Patrice Chotard <patrice.chotard@st.com> Cc: Patrick Delaunay <patrick.delaunay@st.com> Cc: linux-stm32@st-md-mailman.stormreply.com To: linux-arm-kernel@lists.infradead.org Signed-off-by: Alexandre Torgue <alexandre.torgue@st.com>
2020-09-23Merge git://git.kernel.org/pub/scm/linux/kernel/git/netdev/netLinus Torvalds1-1/+1
Pull networking fixes from Jakub Kicinski: - fix failure to add bond interfaces to a bridge, the offload-handling code was too defensive there and recent refactoring unearthed that. Users complained (Ido) - fix unnecessarily reflecting ECN bits within TOS values / QoS marking in TCP ACK and reset packets (Wei) - fix a deadlock with bpf iterator. Hopefully we're in the clear on this front now... (Yonghong) - BPF fix for clobbering r2 in bpf_gen_ld_abs (Daniel) - fix AQL on mt76 devices with FW rate control and add a couple of AQL issues in mac80211 code (Felix) - fix authentication issue with mwifiex (Maximilian) - WiFi connectivity fix: revert IGTK support in ti/wlcore (Mauro) - fix exception handling for multipath routes via same device (David Ahern) - revert back to a BH spin lock flavor for nsid_lock: there are paths which do require the BH context protection (Taehee) - fix interrupt / queue / NAPI handling in the lantiq driver (Hauke) - fix ife module load deadlock (Cong) - make an adjustment to netlink reply message type for code added in this release (the sole change touching uAPI here) (Michal) - a number of fixes for small NXP and Microchip switches (Vladimir) [ Pull request acked by David: "you can expect more of this in the future as I try to delegate more things to Jakub" ] * git://git.kernel.org/pub/scm/linux/kernel/git/netdev/net: (167 commits) net: mscc: ocelot: fix some key offsets for IP4_TCP_UDP VCAP IS2 entries net: dsa: seville: fix some key offsets for IP4_TCP_UDP VCAP IS2 entries net: dsa: felix: fix some key offsets for IP4_TCP_UDP VCAP IS2 entries inet_diag: validate INET_DIAG_REQ_PROTOCOL attribute net: bridge: br_vlan_get_pvid_rcu() should dereference the VLAN group under RCU net: Update MAINTAINERS for MediaTek switch driver net/mlx5e: mlx5e_fec_in_caps() returns a boolean net/mlx5e: kTLS, Avoid kzalloc(GFP_KERNEL) under spinlock net/mlx5e: kTLS, Fix leak on resync error flow net/mlx5e: kTLS, Add missing dma_unmap in RX resync net/mlx5e: kTLS, Fix napi sync and possible use-after-free net/mlx5e: TLS, Do not expose FPGA TLS counter if not supported net/mlx5e: Fix using wrong stats_grps in mlx5e_update_ndo_stats() net/mlx5e: Fix multicast counter not up-to-date in "ip -s" net/mlx5e: Fix endianness when calculating pedit mask first bit net/mlx5e: Enable adding peer miss rules only if merged eswitch is supported net/mlx5e: CT: Fix freeing ct_label mapping net/mlx5e: Fix memory leak of tunnel info when rule under multipath not ready net/mlx5e: Use synchronize_rcu to sync with NAPI net/mlx5e: Use RCU to protect rq->xdp_prog ...
2020-09-22ARM: dts: owl-s500: Add RoseapplePiCristian Ciocaltea2-0/+48
Add a Device Tree for the RoseapplePi SBC. Signed-off-by: Cristian Ciocaltea <cristian.ciocaltea@gmail.com> Reviewed-by: Peter Korsgaard <peter@korsgaard.com> Reviewed-by: Manivannan Sadhasivam <manivannan.sadhasivam@linaro.org> Signed-off-by: Manivannan Sadhasivam <manivannan.sadhasivam@linaro.org>
2020-09-22ARM: dts: owl-s500: Fix incorrect PPI interrupt specifiersCristian Ciocaltea1-3/+3
The PPI interrupts for cortex-a9 were incorrectly specified, fix them. Fixes: fdfe7f4f9d85 ("ARM: dts: Add Actions Semi S500 and LeMaker Guitar") Signed-off-by: Cristian Ciocaltea <cristian.ciocaltea@gmail.com> Reviewed-by: Peter Korsgaard <peter@korsgaard.com> Reviewed-by: Manivannan Sadhasivam <manivannan.sadhasivam@linaro.org> Signed-off-by: Manivannan Sadhasivam <manivannan.sadhasivam@linaro.org>
2020-09-22ARM: dts: Add Caninos Loucos Labrador v2Matheus Castello3-0/+58
Add Device Trees for Caninos Loucos Labrador CoM Core v2 and base board M v1. Based on the work of Andreas Färber on Lemaker Guitar device tree. Signed-off-by: Matheus Castello <matheus@castello.eng.br> Reviewed-by: Manivannan Sadhasivam <manivannan.sadhasivam@linaro.org> Reviewed-by: Andreas Färber <afaerber@suse.de> Signed-off-by: Manivannan Sadhasivam <manivannan.sadhasivam@linaro.org>
2020-09-22ARM: dts: imx6qdl-gw5xxx: correct interrupt flagsKrzysztof Kozlowski14-14/+28
GPIO_ACTIVE_x flags are not correct in the context of interrupt flags. These are simple defines so they could be used in DTS but they will not have the same meaning: 1. GPIO_ACTIVE_HIGH = 0 = IRQ_TYPE_NONE 2. GPIO_ACTIVE_LOW = 1 = IRQ_TYPE_EDGE_RISING Correct the interrupt flags, assuming the author of the code wanted same logical behavior behind the name "ACTIVE_xxx", this is: ACTIVE_LOW => IRQ_TYPE_LEVEL_LOW Signed-off-by: Krzysztof Kozlowski <krzk@kernel.org> Acked-By: Tim Harvey <tharvey@gateworks.com> Signed-off-by: Shawn Guo <shawnguo@kernel.org>
2020-09-22ARM: dts: imx6q-logicpd: Use GPIO chipselectFabio Estevam1-1/+2
Using the native SPI chipselect on i.MX6 is known to be problematic. Doing it on a imx6q-sabresd causes the SPI NOR probe to fail: [ 5.388704] spi-nor spi0.0: unrecognized JEDEC id bytes: 00 00 00 00 00 00 Use the GPIO chipselect to avoid such problem. Signed-off-by: Fabio Estevam <festevam@gmail.com> Signed-off-by: Shawn Guo <shawnguo@kernel.org>
2020-09-22ARM: dts: imx: Add an entry for imx6q-logicpd.dtbFabio Estevam1-0/+1
Add an entry for imx6q-logicpd.dtb so that it can be built by default. Signed-off-by: Fabio Estevam <festevam@gmail.com> Signed-off-by: Shawn Guo <shawnguo@kernel.org>
2020-09-22ARM: dts: imx6q-logicpd: Add a specific board compatible stringFabio Estevam1-1/+1
It is standard practice to have a specific board compatible string, so pass "logicpd,imx6q-logicpd". Signed-off-by: Fabio Estevam <festevam@gmail.com> Signed-off-by: Shawn Guo <shawnguo@kernel.org>
2020-09-22ARM: dts: imx6q: align GPIO hog names with dtschemaKrzysztof Kozlowski4-21/+21
dtschema for pca95xx expects GPIO hogs to end with 'hog' prefix. While touching the hogs, fix indentation (spaces -> tabs). Signed-off-by: Krzysztof Kozlowski <krzk@kernel.org> Signed-off-by: Shawn Guo <shawnguo@kernel.org>
2020-09-21arm: dts: mt7623: add missing pause for switchportFrank Wunderlich1-0/+1
port6 of mt7530 switch (= cpu port 0) on bananapi-r2 misses pause option which causes rx drops on running iperf. Fixes: f4ff257cd160 ("arm: dts: mt7623: add support for Bananapi R2 (BPI-R2) board") Signed-off-by: Frank Wunderlich <frank-w@public-files.de> Cc: stable@vger.kernel.org Link: https://lore.kernel.org/r/20200907070517.51715-1-linux@fw-web.de Signed-off-by: Matthias Brugger <matthias.bgg@gmail.com>
2020-09-17ARM: dts: sun8i: v3s: Enable crypto engineMartin Cerveny1-0/+11
V3s contains crypto engine that is compatible with A33. Add device tree node. Signed-off-by: Martin Cerveny <m.cerveny@computer.org> Signed-off-by: Maxime Ripard <maxime@cerno.tech> Link: https://lore.kernel.org/r/20200907162458.23730-3-m.cerveny@computer.org
2020-09-17ARM: dts: sun8i: a33: Update codec widget namesSamuel Holland2-4/+4
The sun8i-codec driver introduced a new set of DAPM widgets that more accurately describe the hardware topology. Update the various device trees to use the new widget names. Signed-off-by: Samuel Holland <samuel@sholland.org> Signed-off-by: Maxime Ripard <maxime@cerno.tech> Link: https://lore.kernel.org/r/20200726012557.38282-6-samuel@sholland.org
2020-09-17ARM: dts: sun8i: r40: Add video engine nodeJernej Skrabec1-0/+11
Allwinner R40 SoC has a video engine. Add a node for it. Signed-off-by: Jernej Skrabec <jernej.skrabec@siol.net> Signed-off-by: Maxime Ripard <maxime@cerno.tech> Link: https://lore.kernel.org/r/20200825173523.1289379-6-jernej.skrabec@siol.net
2020-09-17ARM: tegra: nexus7: Add SMB347 battery chargerDavid Heidelberg1-1/+23
SMB347 is a battery charger controller which is found on the Nexus 7 device. Signed-off-by: David Heidelberg <david@ixit.cz> Signed-off-by: Dmitry Osipenko <digetx@gmail.com> Signed-off-by: Thierry Reding <treding@nvidia.com>
2020-09-17ARM: tegra: nexus7: Add touchscreenDmitry Osipenko1-0/+18
Nexus 7 2012 has Elantech EKTF3624 touchscreen, this patch adds TS node to the device-tree. Signed-off-by: Dmitry Osipenko <digetx@gmail.com> Signed-off-by: Thierry Reding <treding@nvidia.com>
2020-09-17ARM: tegra: nexus7: Use PLLC for WiFi MMC clock parentDmitry Osipenko1-0/+5
The default parent for all MMCs is PLLP, which is running at 408 MHz on Tegra30 and 50 MHz clock can't be derived from PLLP. The maximum SDIO clock rate is 50 MHz, but this rate isn't achievable using PLLP. Let's switch the WiFi MMC clock parent to PLLC in order to get true 50 MHz. This patch doesn't fix any problems, it's just a minor improvement. Signed-off-by: Dmitry Osipenko <digetx@gmail.com> Signed-off-by: Thierry Reding <treding@nvidia.com>
2020-09-17ARM: tegra: acer-a500: Use PLLC for WiFi MMC clock parentDmitry Osipenko1-0/+4
The default parent for all MMCs is PLLP, which is running at 216 MHz on Tegra20 and 50 MHz clock can't be derived from PLLP. The maximum SDIO clock rate is 50 MHz, but this rate isn't achievable using PLLP. Let's switch the WiFi MMC clock parent to PLLC in order to get true 50 MHz. This patch doesn't fix any problems, it's just a minor improvement. Signed-off-by: Dmitry Osipenko <digetx@gmail.com> Signed-off-by: Thierry Reding <treding@nvidia.com>
2020-09-17ARM: tegra: acer-a500: Set WiFi MMC clock rate to 50 MHzDmitry Osipenko1-1/+1
Previously 50MHz clock rate didn't work because of the wrong PINCTRL configuration used for SDIO pins. Now the PINCTRL config is corrected and the MMC clock rate could be bumped safely to 50MHz, increasing WiFi TX throughput by 20 Mbit/s and allowing to hit the maximum 40 Mbit/s. Signed-off-by: Dmitry Osipenko <digetx@gmail.com> Signed-off-by: Thierry Reding <treding@nvidia.com>
2020-09-17ARM: tegra: acer-a500: Correct PINCTRL configurationDmitry Osipenko1-2/+10
The low-power-mode drive was set to DIV_4 for some of PINCTRL groups, while these groups should use DIV_1. This patch fixes the wrong PINCTRL configurations and adds a full drive-setup for the changed configs, just for completeness since the added values match the default configuration. Now WiFi SDIO communication works properly using legacy signaling mode if SDIO BUS clocked at 50MHz, which is a maximum SDIO clock rate on Tegra20. Signed-off-by: Dmitry Osipenko <digetx@gmail.com> Signed-off-by: Thierry Reding <treding@nvidia.com>
2020-09-17ARM: tegra: acer-a500: Remove atmel,cfg_name propertyDmitry Osipenko1-2/+0
This property was supposed to be upstreamed, but it was NAKed recently in a favor to a better approach of firmware loading. It also turned out that the firmware loading isn't really necessary because it's stored in a non-volatile memory inside of the touchscreen controller and previously the FW loading was needed in order to get touchscreen working, but it actually was a TS driver problem which is resolved now. Hence remove the unsupported property. Signed-off-by: Dmitry Osipenko <digetx@gmail.com> Signed-off-by: Thierry Reding <treding@nvidia.com>
2020-09-17ARM: tegra: acer-a500: Add aliases for MMCDmitry Osipenko1-3/+7
MMC core now supports binding to a specific ID, which is very handy for embedded devices, like Acer A500, because MMC ID may change depending on kernel version or configuration which affects MMC driver probe order. Signed-off-by: Dmitry Osipenko <digetx@gmail.com> Signed-off-by: Thierry Reding <treding@nvidia.com>
2020-09-17ARM: tegra: nexus7: Add aliases for MMCDmitry Osipenko1-2/+5
MMC core now supports binding to a specific ID, which is very handy for embedded devices, like Nexus 7, because MMC ID may change depending on kernel version or configuration which affects MMC driver probe order. Signed-off-by: Dmitry Osipenko <digetx@gmail.com> Signed-off-by: Thierry Reding <treding@nvidia.com>
2020-09-16ARM: dts: s5pv210: replace deprecated "gpios" i2c-gpio property in GoniKrzysztof Kozlowski1-2/+2
"gpios" property is deprecated. Update the Goni DTS to fix dtbs_checks warnings like: i2c-pmic: 'sda-gpios' is a required property i2c-pmic: 'scl-gpios' is a required property Signed-off-by: Krzysztof Kozlowski <krzk@kernel.org> Link: https://lore.kernel.org/r/20200907161141.31034-24-krzk@kernel.org
2020-09-16ARM: dts: s5pv210: replace deprecated "gpios" i2c-gpio property in AquilaKrzysztof Kozlowski1-2/+2
"gpios" property is deprecated. Update the Aquila DTS to fix dtbs_checks warnings like: i2c-pmic: 'sda-gpios' is a required property i2c-pmic: 'scl-gpios' is a required property Signed-off-by: Krzysztof Kozlowski <krzk@kernel.org> Link: https://lore.kernel.org/r/20200907161141.31034-23-krzk@kernel.org
2020-09-16ARM: dts: s5pv210: move fixed regulators under root node in GoniKrzysztof Kozlowski1-37/+27
The fixed regulators are kept under dedicated "regulators" node but this causes multiple dtschema warnings: regulators: $nodename:0: 'regulators' does not match '^([a-z][a-z0-9\\-]+-bus|bus|soc|axi|ahb|apb)(@[0-9a-f]+)?$' regulators: #size-cells:0:0: 0 is not one of [1, 2] regulators: fixed-regulator@0:reg:0: [0] is too short regulators: fixed-regulator@1:reg:0: [1] is too short regulators: fixed-regulator@2:reg:0: [2] is too short regulators: fixed-regulator@3:reg:0: [3] is too short Signed-off-by: Krzysztof Kozlowski <krzk@kernel.org> Link: https://lore.kernel.org/r/20200907161141.31034-22-krzk@kernel.org
2020-09-16ARM: dts: s5pv210: move fixed regulators under root node in AquilaKrzysztof Kozlowski1-28/+19
The fixed regulators are kept under dedicated "regulators" node but this causes multiple dtschema warnings: regulators: $nodename:0: 'regulators' does not match '^([a-z][a-z0-9\\-]+-bus|bus|soc|axi|ahb|apb)(@[0-9a-f]+)?$' regulators: #size-cells:0:0: 0 is not one of [1, 2] regulators: fixed-regulator@0:reg:0: [0] is too short regulators: fixed-regulator@1:reg:0: [1] is too short regulators: fixed-regulator@2:reg:0: [2] is too short Signed-off-by: Krzysztof Kozlowski <krzk@kernel.org> Link: https://lore.kernel.org/r/20200907161141.31034-21-krzk@kernel.org
2020-09-16ARM: dts: exynos: Align OPP table name with dt-schemaKrzysztof Kozlowski2-9/+9
Device tree nodes should have hyphens instead of underscores. This is also expected by the bindings. Signed-off-by: Krzysztof Kozlowski <krzk@kernel.org> Link: https://lore.kernel.org/r/20200903191438.12781-5-krzk@kernel.org
2020-09-16ARM: dts: at91: sama5d2: add missing flexcom spi node propertiesAlexandre Belloni1-0/+10
SPI nodes require #address-cells and #size-cells add those properties in the flexcom spi nodes. Signed-off-by: Alexandre Belloni <alexandre.belloni@bootlin.com> Reviewed-by: Nicolas Ferre <nicolas.ferre@microchip.com> Link: https://lore.kernel.org/r/20200831171129.3886857-8-alexandre.belloni@bootlin.com
2020-09-16ARM: dts: at91: add unit-address to memory nodeAlexandre Belloni51-51/+51
The memory node requires a unit-address, add it. Signed-off-by: Alexandre Belloni <alexandre.belloni@bootlin.com> Reviewed-by: Nicolas Ferre <nicolas.ferre@microchip.com> Link: https://lore.kernel.org/r/20200831171129.3886857-7-alexandre.belloni@bootlin.com
2020-09-16ARM: dts: at91: move mmc pinctrl-names property to board dtsAlexandre Belloni20-8/+17
Having the pinctrl-names property in the dtsi leads to dtbs_check warnings when the board dts doesn't define pinctrl-0. Instead, move the property to the board dts actually using the mmc node. Signed-off-by: Alexandre Belloni <alexandre.belloni@bootlin.com> Reviewed-by: Nicolas Ferre <nicolas.ferre@microchip.com> Link: https://lore.kernel.org/r/20200831171129.3886857-5-alexandre.belloni@bootlin.com
2020-09-16ARM: tegra: Pass multiple versions in opp-supported-hw propertyViresh Kumar4-1393/+88
We can now pass multiple versions in "opp-supported-hw" property, lets do that and simplify the tables a bit. Reviewed-by: Dmitry Osipenko <digetx@gmail.com> Tested-by: Dmitry Osipenko <digetx@gmail.com> Signed-off-by: Viresh Kumar <viresh.kumar@linaro.org>
2020-09-15ARM: dts: r8a7742-iwg21d-q7-dbcm-ca: Add can0 support to camera DBLad Prabhakar1-0/+11
This patch enables CAN0 interface exposed through connector J4 on the camera DB. Signed-off-by: Lad Prabhakar <prabhakar.mahadev-lad.rj@bp.renesas.com> Reviewed-by: Chris Paterson <Chris.Paterson2@renesas.com> Link: https://lore.kernel.org/r/20200911083615.17377-1-prabhakar.mahadev-lad.rj@bp.renesas.com Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
2020-09-15ARM: dts: r8a7742: Add VSP supportLad Prabhakar1-0/+36
Add VSP support to R8A7742 (RZ/G1H) SoC dtsi. Signed-off-by: Lad Prabhakar <prabhakar.mahadev-lad.rj@bp.renesas.com> Reviewed-by: Chris Paterson <Chris.Paterson2@renesas.com> Link: https://lore.kernel.org/r/20200911080929.15058-1-prabhakar.mahadev-lad.rj@bp.renesas.com Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
2020-09-14ARM: dts: hisilicon: Fix SP805 clocksAndre Przywara1-2/+3
The SP805 DT binding requires two clocks to be specified, but Hisilicon platform DTs currently only specify one clock. In practice, Linux would pick a clock named "apb_pclk" for the bus clock, and the Linux and U-Boot SP805 driver would use the first clock to derive the actual watchdog counter frequency. Since currently both are the very same clock, we can just double the clock reference, and add the correct clock-names, to match the binding. Signed-off-by: Andre Przywara <andre.przywara@arm.com> Signed-off-by: Wei Xu <xuwei5@hisilicon.com>
2020-09-14ARM: dts: hisilicon: Fix SP804 usersAndre Przywara2-12/+22
The SP804 binding only specifies one or three clocks, but does not allow just two clocks. The HiSi 3620 .dtsi specified two clocks for the two timers, plus gave one "apb_pclk" clock-name to appease the primecell bus driver. Extend the clocks by duplicating the first clock to the end of the clock list, and add two dummy clock-names to make the primecell driver happy. I don't know what the real APB clock for the IP is, but with the current DT the first timer clock was used for that, so this change keeps the current status. Signed-off-by: Andre Przywara <andre.przywara@arm.com> Signed-off-by: Wei Xu <xuwei5@hisilicon.com>
2020-09-14Merge 5.9-rc5 into usb-nextGreg Kroah-Hartman15-47/+34
We need the USB fixes in here as well. Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
2020-09-13Merge tag 'arm-soc/for-5.10/devicetree' of ↵Olof Johansson9-10/+397
https://github.com/Broadcom/stblinux into arm/dt This pull request contains Broadcom ARM-based SoCs changes for 5.10, please pull the following: - Christian adds support for the Cisco Meraki MR32 which is based on the BCM53016 SoC, this requires specifying the PWM, second UART and third PCIe controller in Device Tree before finally adding support for the board. - Adrian updates the status properties from "ok" to "okay". - Andre fixes the SP805 watchdog nodes to have the correct clock names and binding for both the Cygnus and Northstar Plus (NSP). He does the same thing with the SP804 timer node which was missing an "arm,primecell" compatible string. - Maxime enables the BCM2711 (Raspberry Pi 4) display pipeline since all DRM changes are ready. * tag 'arm-soc/for-5.10/devicetree' of https://github.com/Broadcom/stblinux: ARM: dts: broadcom: Fix SP804 node ARM: dts: NSP: Fix SP805 clock-names ARM: dts: Cygnus: Fix SP805 clocks ARM: dts: NSP: replace status value "ok" by "okay" ARM: BCM5301X: Add DT for Meraki MR32 ARM: dts: bcm2711: Enable the display pipeline ARM: dts: BCM5301X: Specify pcie2 in the DT ARM: dts: BCM5301X: Specify uart2 in the DT ARM: dts: BCM5301X: Specify PWM in the DT dt-bindings: ARM: add bindings for the Meraki MR32 Link: https://lore.kernel.org/r/20200912032153.1216354-1-f.fainelli@gmail.com Signed-off-by: Olof Johansson <olof@lixom.net>
2020-09-13Merge tag 'dt-schema-5.10' of ↵Olof Johansson6-6/+6
https://git.kernel.org/pub/scm/linux/kernel/git/krzk/linux into arm/dt Various minor cleanups for ARM DTS Cleanup ARM DTS to remove dtschema validation errors. * tag 'dt-schema-5.10' of https://git.kernel.org/pub/scm/linux/kernel/git/krzk/linux: ARM: dts: alpine: Align GIC nodename with dtschema ARM: dts: zx: Align L2 cache-controller nodename with dtschema ARM: dts: tango: Align L2 cache-controller nodename with dtschema ARM: dts: spear: Align L2 cache-controller nodename with dtschema ARM: dts: qcom: Align L2 cache-controller nodename with dtschema ARM: dts: prima: Align L2 cache-controller nodename with dtschema Link: https://lore.kernel.org/r/20200911155509.1495-2-krzk@kernel.org Signed-off-by: Olof Johansson <olof@lixom.net>
2020-09-13Merge tag 'aspeed-5.10-devicetree' of ↵Olof Johansson11-21/+1193
git://git.kernel.org/pub/scm/linux/kernel/git/joel/aspeed into arm/dt ASPEED device tree updates for 5.10 - New machines * Wistron Mowgli, an AST2500 BMC for a Power9 OpenPower server * Facebook Wedge400, an AST2500 BMC system which we can assume is 4 times better than the existing Wedge100 top of rack network switch - Add a new device, the IBM Operation Panel - Fixes for Facebook's collection of BMCs - eMMC and vuart fixes * tag 'aspeed-5.10-devicetree' of git://git.kernel.org/pub/scm/linux/kernel/git/joel/aspeed: ARM: dts: aspeed: Add Mowgli BMC platform ARM: dts: rainier: Disable internal pull-downs on eMMC pins ARM: aspeed: g5: Do not set sirq polarity ARM: dts: aspeed: rainier: Add IBM Operation Panel I2C device ARM: dts: aspeed: tacoma: Add IBM Operation Panel I2C device ARM: dts: aspeed: rainier: Enable XDMA engine ARM: dts: aspeed: wedge40: Update UART4 pin settings ARM: dts: aspeed: wedge40: Update FMC flash0 label ARM: dts: aspeed: Add Facebook Wedge400 BMC ARM: dts: aspeed: minipack: Update 64MB FMC flash layout ARM: dts: aspeed: yamp: Set 32MB FMC flash layout ARM: dts: aspeed: cmm: Set 32MB FMC flash layout ARM: dts: aspeed: Remove flash layout from Facebook AST2500 Common dtsi Link: https://lore.kernel.org/r/CACPK8XcDNBYAHzW6NYB4LFm3YbN63AprgW75ZqS+6uXn2b3kug@mail.gmail.com Signed-off-by: Olof Johansson <olof@lixom.net>
2020-09-13Merge tag 'juno-updates-5.10' of ↵Olof Johansson9-25/+27
git://git.kernel.org/pub/scm/linux/kernel/git/sudeep.holla/linux into arm/dt ARMv8 Juno/Vexpress/Fast Models updates for v5.10 A few device tree source fixes to make them fully SP804 timer and SP805 watchdog binding compliant. * tag 'juno-updates-5.10' of git://git.kernel.org/pub/scm/linux/kernel/git/sudeep.holla/linux: arm64: dts: arm: Fix SP805 clock-names ARM: dts: arm: Fix SP805 clocks ARM: dts: arm: Fix SP804 users Link: https://lore.kernel.org/r/20200908135028.GA10106@bogus Signed-off-by: Olof Johansson <olof@lixom.net>
2020-09-13Merge tag 'samsung-dt-5.10' of ↵Olof Johansson37-358/+874
https://git.kernel.org/pub/scm/linux/kernel/git/krzk/linux into arm/dt Samsung DTS ARM changes for v5.10 1. Add sound support to Galaxy S3/Midas family (Exynos4412). 2. Add sound support to Galaxy S/Aries family (S5Pv210). 3. Configure L2C-310 cache controller via DTS on Exynos4. 4. Big cleanup of Exynos DTS to fix as many dtschema warnings as possible. This includes adding missing properties (thus e.g. enabling S3C RTC clock), correcting existing nodes, renaming of nodes and using non-deprecated properties or compatibles. Except mentioned bring up of S3C RTC, this should not have visible effect. * tag 'samsung-dt-5.10' of https://git.kernel.org/pub/scm/linux/kernel/git/krzk/linux: (49 commits) ARM: dts: exynos: Silence SATA PHY warning in Exynos5250 ARM: dts: exynos: Remove I2C9 samsung, i2c-slave-addr from Exynos5250 boards ARM: dts: samsung: odroid-xu3: Move assigned-clock* properties to i2s0 node ARM: dts: exynos: Use S2MPS11 clock in S3C RTC in SMDK5420 ARM: dts: exynos: Silence DP HPD pinctrl dtschema warning in Exynos5250 Spring ARM: dts: exynos: Use S5M8767 clock in S3C RTC in Exynos5250 Spring ARM: dts: exynos: Add max77686 clocks for S3C RTC in SMDK5250 ARM: dts: exynos: Override thermal by label in Exynos5250 ARM: dts: exynos: Correct whitespace and indentation issues in Exynos5 ARM: dts: exynos: Silence i2c-gpio dtschema warning in Exynos5250 Arndale ARM: dts: exynos: Correct S3C RTC bindings in SMDK5410 ARM: dts: exynos: Remove unneeded address/size cells in Exynos5260 GIC ARM: dts: exynos: Correct compatible for Exynos5260 GIC ARM: dts: exynos: Correct compatible for Exynos5 GIC ARM: dts: s5pv210: Enable audio on Aries boards ARM: dts: exynos: Correct whitespace and indentation issues ARM: dts: exynos: Correct S3C RTC bindings in Tiny4412 ARM: dts: exynos: Correct S3C RTC bindings in SMDK4412 ARM: dts: exynos: Add CPU cooling in Tiny4412 ARM: dts: exynos: Add CPU cooling in SMDK4412 ... Link: https://lore.kernel.org/r/20200907150425.11077-1-krzk@kernel.org Signed-off-by: Olof Johansson <olof@lixom.net>
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