Age | Commit message (Expand) | Author | Files | Lines |
2019-04-17 | ARM: tegra: apalis: Move PLL power supplies to XUSB pad controller | Thierry Reding | 1 | -0/+7 |
2019-04-17 | ARM: tegra: Remove gratuitous parentheses in SPDX license identifier | Thierry Reding | 1 | -1/+1 |
2018-09-26 | ARM: tegra: apalis-tk1: shorten temperature-sensor node | Marcel Ziswiler | 1 | -1/+1 |
2018-09-26 | ARM: tegra: apalis-tk1: get rid of fake clocks simple bus | Marcel Ziswiler | 1 | -11/+4 |
2018-09-26 | ARM: tegra: apalis-tk1: replace underscores in node names with dashes | Marcel Ziswiler | 1 | -145/+145 |
2018-09-26 | ARM: tegra: apalis-tk1: drop module level model and compatible | Marcel Ziswiler | 1 | -4/+0 |
2018-09-26 | ARM: tegra: apalis-tk1: reorder cpu dfll clock properties | Marcel Ziswiler | 1 | -1/+1 |
2018-09-26 | ARM: tegra: apalis-tk1: enable emmc ddr52 mode | Marcel Ziswiler | 1 | -0/+1 |
2018-09-26 | ARM: tegra: apalis-tk1: add proper emmc vmmc and vqmmc supplies | Marcel Ziswiler | 1 | -0/+2 |
2018-09-26 | ARM: tegra: apalis-tk1: white-space clean-up | Marcel Ziswiler | 1 | -3/+0 |
2018-09-26 | ARM: tegra: apalis-tk1: drop unused pinmux label | Marcel Ziswiler | 1 | -1/+1 |
2018-09-26 | ARM: tegra: apalis-tk1: add missing regulators | Marcel Ziswiler | 1 | -1/+13 |
2018-09-26 | ARM: tegra: apalis-tk1: regulator clean-up | Marcel Ziswiler | 1 | -50/+50 |
2018-09-26 | ARM: tegra: apalis-tk1: reorder padctl properties | Marcel Ziswiler | 1 | -11/+11 |
2018-09-26 | ARM: tegra: apalis-tk1: reorder host1x/hdmi properties | Marcel Ziswiler | 1 | -2/+2 |
2018-09-26 | ARM: tegra: apalis-tk1: add local-mac-address property | Marcel Ziswiler | 1 | -0/+5 |
2018-07-09 | ARM: tegra: Fix unit_address_vs_reg DTC warnings for /memory | Krzysztof Kozlowski | 1 | -1/+1 |
2018-05-03 | ARM: tegra: apalis-tk1: Fix high speed UART compatible | Marcel Ziswiler | 1 | -3/+3 |
2018-03-08 | ARM: tegra: apalis-tk1: Support v1.2 hardware revision | Marcel Ziswiler | 1 | -0/+2052 |