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path: root/arch/arm/boot/dts/sun8i-v3s.dtsi
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2020-09-28ARM: dts: sun8i: v3s: Add simple-framebufferMartin Cerveny1-0/+16
2020-09-28ARM: dts: sun8i: V3/V3s/S3/S3L: add pinctrl for I2C1 at PE bankIcenowy Zheng1-0/+6
2020-09-28ARM: dts: sun8i: V3/V3s/S3/S3L: add pinctrl for 8-bit parallel CSIIcenowy Zheng1-0/+14
2020-09-28ARM: dts: sun8i: V3/V3s/S3/S3L: add CSI1 device nodeIcenowy Zheng1-0/+12
2020-09-28ARM: dts: sun8i: V3/V3s/S3/S3L: add pinctrl for UART2 RX/TXIcenowy Zheng1-0/+7
2020-09-28ARM: dts: sun8i: V3/V3s/S3/S3L: add Ethernet supportIcenowy Zheng1-0/+52
2020-09-17ARM: dts: sun8i: v3s: Enable crypto engineMartin Cerveny1-0/+11
2020-03-11ARM: dts: sunxi: Fix DE2 clocks register rangeJernej Skrabec1-1/+1
2019-12-20ARM: dts: sun8i: v3s: Remove redundant assigned-clocksMaxime Ripard1-2/+0
2019-08-23ARM: dts: sunxi: Add missing watchdog clocksMaxime Ripard1-0/+1
2019-08-23ARM: dts: v3s: Change the timers compatibleMaxime Ripard1-2/+3
2019-07-22ARM: dts: sunxi: Unify the DE2 bus clocks orderMaxime Ripard1-4/+4
2019-06-06ARM: dts: sun8i: v3s: Add external crystals accuracyMaxime Ripard1-0/+2
2019-06-06ARM: dts: sun8i: v3s: Fix the RTC nodeMaxime Ripard1-4/+7
2019-03-25ARM: dts: sunxi: Fix the TCON output clockMaxime Ripard1-0/+1
2019-03-25ARM: dts: sunxi: Fix GIC compatibleMaxime Ripard1-1/+1
2019-03-25ARM: dts: sun8i: v3s: Fix Display Engine DTC warningsMaxime Ripard1-8/+2
2018-11-28ARM: dts: sun8i: v3s: Provide default muxing for relevant controllersMaxime Ripard1-0/+2
2018-11-28ARM: dts: sun8i: v3s: Change pinctrl nodes to avoid warningMaxime Ripard1-5/+5
2017-10-20arm: dts: fix unit-address leading 0sRob Herring1-16/+16
2017-06-07ARM: sun8i: v3s: add device nodes for DE2 display pipelineIcenowy Zheng1-0/+83
2017-05-18ARM: sun8i: v3s: enable SPIIcenowy Zheng1-0/+19
2017-05-15ARM: sun8i: v3s: add pinmux for mmc1Icenowy Zheng1-0/+10
2017-05-15ARM: sun8i: v3s: add LRADC device nodeIcenowy Zheng1-0/+7
2017-05-15ARM: sun8i: v3s: restore the usage of CCU definitionsIcenowy Zheng1-31/+33
2017-01-27ARM: dts: sunxi: add dtsi file for V3s SoCIcenowy Zheng1-0/+309