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2022-02-25ARM: dts: stm32: Correct masks for GIC PPI interrupts on stm32mp15Alexandre Torgue1-0/+7
Using GIC_CPU_MASK_SIMPLE(x), x should reflect the number of CPUs. STM32MP151 is a single A7. STM32MP153/157 is a dual A7. Signed-off-by: Alexandre Torgue <alexandre.torgue@foss.st.com> Acked-by: Marc Zyngier <maz@kernel.org>
2020-09-23ARM: dts: stm32: add arm-pmu node on stm32mp15Alexandre Torgue1-0/+6
Add arm-pmu node on stm32mp15. Signed-off-by: Alexandre Torgue <alexandre.torgue@st.com> Signed-off-by: Marek Vasut <marex@denx.de> # update to linux-next Tested-by: Marek Vasut <marex@denx.de> # on DH PDK2 and Avenger96 Signed-off-by: Alexandre Torgue <alexandre.torgue@st.com>
2020-03-13ARM: dts: stm32: add cpu clock-frequency property on stm32mp15xAhmad Fatoum1-0/+1
All of the STM32MP151[1], STM32MP153[2] and STM32MP157[3] have their Cortex-A7 cores running at 650 MHz. Add the clock-frequency property to CPU nodes to avoid warnings about them missing. [1]: https://www.st.com/en/microcontrollers-microprocessors/stm32mp151.html [2]: https://www.st.com/en/microcontrollers-microprocessors/stm32mp153.html [3]: https://www.st.com/en/microcontrollers-microprocessors/stm32mp157.html Signed-off-by: Ahmad Fatoum <a.fatoum@pengutronix.de> Signed-off-by: Alexandre Torgue <alexandre.torgue@st.com>
2019-12-09ARM: dts: stm32: Introduce new STM32MP15 SOCs: STM32MP151 and STM32MP153Alexandre Torgue1-0/+45
STM32MP151 and STM32MP153 were not explicitly supported through stm32mp157c.dts. This commit adds dedicated files to support all STM32MP15 SOCs family. The differences between those SOCs are: -STM32MP151 [1]: common file. -STM32MP153 [2]: STM32MP151 + CANs + a second CortexA7-CPU. -STM32MP157 [3]: STM32MP153 + DSI + GPU. [1] https://www.st.com/resource/en/reference_manual/dm00366349.pdf [2] https://www.st.com/resource/en/reference_manual/dm00366355.pdf [3] https://www.st.com/resource/en/reference_manual/dm00327659.pdf Signed-off-by: Alexandre Torgue <alexandre.torgue@st.com>