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2022-05-27ARM: dts: rockchip: add clocks property to cru node rk3066a/rk3188Johan Jonker1-1/+2
Add clocks property to rk3066a/rk3188 cru node to fix warnings like: 'clocks' is a dependency of 'assigned-clocks' Signed-off-by: Johan Jonker <jbx6244@gmail.com> Link: https://lore.kernel.org/r/20220329111323.3569-2-jbx6244@gmail.com Signed-off-by: Heiko Stuebner <heiko@sntech.de>
2021-10-20ARM: dts: rockchip: remove usb-phy fallback string from rk3066a/rk3188Johan Jonker1-2/+1
With the conversion of rockchip-usb-phy.yaml a long time used fallback string for rk3066a/rk3188 was added. The linux driver doesn't do much with the GRF phy address range, however the u-boot driver rockchip_usb2_phy.c does. The bits in GRF_UOC0_CON2 for rk3066a/rk3188 and rk3288 for example don't match. Remove the usb-phy fallback string for rk3066a/rk3188 to prevent possible strange side effects. Signed-off-by: Johan Jonker <jbx6244@gmail.com> Link: https://lore.kernel.org/r/20210828111218.10026-2-jbx6244@gmail.com Signed-off-by: Heiko Stuebner <heiko@sntech.de>
2021-10-17ARM: dts: rockchip: change gpio nodenamesJohan Jonker1-4/+4
Currently all gpio nodenames are sort of identical to there label. Nodenames should be of a generic type, so change them all. Signed-off-by: Johan Jonker <jbx6244@gmail.com> Reviewed-by: Linus Walleij <linus.walleij@linaro.org> Acked-by: Heiko Stuebner <heiko@sntech.de> Link: https://lore.kernel.org/r/20211007144019.7461-2-jbx6244@gmail.com Signed-off-by: Heiko Stuebner <heiko@sntech.de>
2021-09-20ARM: dts: rockchip: rename opp-table node namesJohan Jonker1-1/+1
After the conversion to YAML of the Operating Performance Points(OPP) binding the operating-points-v2 property expects the nodename to have the '^opp-table(-[a-z0-9]+)?$' format, so rename all Rockchip ARM dts opp-table node names. make ARCH=arm dtbs_check DT_SCHEMA_FILES=Documentation/devicetree/bindings/opp/opp-v2.yaml Signed-off-by: Johan Jonker <jbx6244@gmail.com> Link: https://lore.kernel.org/r/20210828094512.26862-1-jbx6244@gmail.com Signed-off-by: Heiko Stuebner <heiko@sntech.de>
2021-07-16ARM: dts: rockchip: add io-domains node to rk3188.dtsiJohan Jonker1-0/+5
The compatible string below was added to rockchip-io-domain.txt, but never added to the device tree, so add a io-domains node to rk3188.dtsi "rockchip,rk3188-io-voltage-domain" Signed-off-by: Johan Jonker <jbx6244@gmail.com> Link: https://lore.kernel.org/r/20210625111746.6269-3-jbx6244@gmail.com Signed-off-by: Heiko Stuebner <heiko@sntech.de>
2021-07-12ARM: dts: rockchip: add space after &grf on rk3188Johan Jonker1-1/+1
Fix layout by adding a space after &grf. Signed-off-by: Johan Jonker <jbx6244@gmail.com> Link: https://lore.kernel.org/r/20210709103134.1750-1-jbx6244@gmail.com Signed-off-by: Heiko Stuebner <heiko@sntech.de>
2021-07-12ARM: dts: rockchip: rename pcfg_* nodenames for rk3066/rk3188Johan Jonker1-3/+3
Rename pcfg_* nodenames for rk3066/rk3188 to pcfg-*, so that they fit in the regex with the other Rockchip SoCs. Signed-off-by: Johan Jonker <jbx6244@gmail.com> Link: https://lore.kernel.org/r/20210711112154.5287-1-jbx6244@gmail.com Signed-off-by: Heiko Stuebner <heiko@sntech.de>
2021-06-22ARM: dts: rockchip: add vpu nodes for RK3066 and RK3188Alex Bee1-0/+5
Add the vpu node to the common rk3xxx.dtsi and only the powerdomain property to the SoC specific device trees. Signed-off-by: Alex Bee <knaerzche@gmail.com> Link: https://lore.kernel.org/r/20210527154455.358869-12-knaerzche@gmail.com Signed-off-by: Heiko Stuebner <heiko@sntech.de>
2021-06-03ARM: dts: rockchip: remove #phy-cells from usbphy node rk3066/rk3188Johan Jonker1-1/+0
The review process of rockchip-usb-phy.yaml was not finished when the patch in the link below was already applied. Remove the unneeded #phy-cells property. https://lore.kernel.org/r/20210512122346.9463-4-jbx6244@gmail.com Fixes: 6e4e4e2a2558 ("ARM: dts: rockchip: move and restyle grf nodes rk3066/rk3188") Signed-off-by: Johan Jonker <jbx6244@gmail.com> Link: https://lore.kernel.org/r/20210603121010.4315-1-jbx6244@gmail.com Signed-off-by: Heiko Stuebner <heiko@sntech.de>
2021-05-15ARM: dts: rockchip: move and restyle grf nodes rk3066/rk3188Johan Jonker1-24/+29
With grf.txt converted to YAML a lot of compatibles did not have 'simple-mfd' added in the old binding. That implies that if you have child nodes they need to be documented. Make the new layout fit for rk3066/rk3188, move and restyle the grf nodes. Remove rockchip,grf from usbphy node. Add "#phy-cells", because it is a required property by phy-provider.yaml With the conversion of syscon.yaml minItems for compatibles was set to 2. Current Rockchip rk3xxx.dtsi file only uses "syscon" for the grf registers. Add "syscon", "simple-mfd" compatible for rk3066/rk3188 to reduce notifications produced with: make ARCH=arm dtbs_check DT_SCHEMA_FILES=Documentation/devicetree/bindings/mfd/syscon.yaml Changed compatibles: "rockchip,rk3066-grf", "syscon", "simple-mfd" "rockchip,rk3188-grf", "syscon", "simple-mfd" Signed-off-by: Johan Jonker <jbx6244@gmail.com> Link: https://lore.kernel.org/r/20210512122346.9463-4-jbx6244@gmail.com Signed-off-by: Heiko Stuebner <heiko@sntech.de>
2021-05-10ARM: dts: rockchip: add #power-domain-cells to power domain nodesJohan Jonker1-0/+3
Add #power-domain-cells to power domain nodes, because they are required by power-domain.yaml Signed-off-by: Johan Jonker <jbx6244@gmail.com> Link: https://lore.kernel.org/r/20210417112952.8516-5-jbx6244@gmail.com Signed-off-by: Heiko Stuebner <heiko@sntech.de>
2021-05-10ARM: dts: rockchip: Fix power-controller node names for rk3188Elaine Zhang1-3/+3
Use more generic names (as recommended in the device tree specification or the binding documentation) Signed-off-by: Elaine Zhang <zhangqing@rock-chips.com> Reviewed-by: Enric Balletbo i Serra <enric.balletbo@collabora.com> Signed-off-by: Johan Jonker <jbx6244@gmail.com> Link: https://lore.kernel.org/r/20210417112952.8516-3-jbx6244@gmail.com Signed-off-by: Heiko Stuebner <heiko@sntech.de>
2021-05-10ARM: dts: rockchip: Fix the timer clocks orderEzequiel Garcia1-4/+4
Fixed order is the device-tree convention. The timer driver currently gets clocks by name, so no changes are needed there. Signed-off-by: Ezequiel Garcia <ezequiel@collabora.com> Link: https://lore.kernel.org/r/20210506111136.3941-3-ezequiel@collabora.com Signed-off-by: Heiko Stuebner <heiko@sntech.de>
2020-03-17ARM: dts: rockchip: remove #address-cells and #size-cells from i2s nodesJohan Jonker1-2/+0
An experimental test with the command below gives for example this error: arch/arm/boot/dts/rk3036-evb.dt.yaml: i2s@10220000: '#address-cells', '#size-cells' do not match any of the regexes: 'pinctrl-[0-9]+' '#address-cells' and '#size-cells' are not a valid property for i2s nodes, so remove them. make ARCH=arm dtbs_check DT_SCHEMA_FILES=Documentation/devicetree/bindings/sound/rockchip-i2s.yaml Signed-off-by: Johan Jonker <jbx6244@gmail.com> Link: https://lore.kernel.org/r/20200311162524.19748-2-jbx6244@gmail.com Signed-off-by: Heiko Stuebner <heiko@sntech.de>
2020-03-17ARM: dts: rockchip: swap clocks and clock-names values for i2s nodesJohan Jonker1-2/+2
Current dts files with 'i2s' nodes are manually verified. In order to automate this process rockchip-i2s.txt has to be converted to yaml. In the new setup dtbs_check with rockchip-i2s.yaml expect clocks and clock-names values in the same order. Fix this for some older Rockchip models. make ARCH=arm dtbs_check DT_SCHEMA_FILES=Documentation/devicetree/bindings/sound/rockchip-i2s.yaml Signed-off-by: Johan Jonker <jbx6244@gmail.com> Link: https://lore.kernel.org/r/20200311162524.19748-1-jbx6244@gmail.com Signed-off-by: Heiko Stuebner <heiko@sntech.de>
2020-03-17ARM: dts: rockchip: swap clocks and clock-names values for spdif nodesJohan Jonker1-2/+2
Current dts files with 'spdif' nodes are manually verified. In order to automate this process rockchip-spdif.txt has to be converted to yaml. In the new setup dtbs_check with rockchip-spdif.yaml expect clocks and clock-names values in the same order. Fix this for some older Rockchip models. make ARCH=arm dtbs_check DT_SCHEMA_FILES=Documentation/devicetree/bindings/sound/rockchip-spdif.yaml Signed-off-by: Johan Jonker <jbx6244@gmail.com> Link: https://lore.kernel.org/r/20200312172240.21362-2-jbx6244@gmail.com Signed-off-by: Heiko Stuebner <heiko@sntech.de>
2019-04-11ARM: dts: rockchip: bulk convert gpios to their constant counterpartsHeiko Stuebner1-105/+105
Rockchip SoCs use 2 different numbering schemes. Where the gpio- controllers just count 0-31 for their 32 gpios, the underlying iomux controller splits these into 4 separate entities A-D. Device-schematics always use these iomux-values to identify pins, so to make mapping schematics to devicetree easier Andy Yan introduced named constants for the pins but so far we only used them on new additions. Using a sed-script created by Emil Renner Berthing bulk-convert the remaining raw gpio numbers into their descriptive counterparts and also gets rid of the unhelpful RK_FUNC_x -> x and RK_GPIOx -> x mappings: /rockchip,pins *=/bcheck b # to end of script :append-next-line N :check /^[^;]*$/bappend-next-line s/<RK_GPIO\([0-9]\) /<\1 /g s/<\([^ ][^ ]* *\)0 /<\1RK_PA0 /g s/<\([^ ][^ ]* *\)1 /<\1RK_PA1 /g s/<\([^ ][^ ]* *\)2 /<\1RK_PA2 /g s/<\([^ ][^ ]* *\)3 /<\1RK_PA3 /g s/<\([^ ][^ ]* *\)4 /<\1RK_PA4 /g s/<\([^ ][^ ]* *\)5 /<\1RK_PA5 /g s/<\([^ ][^ ]* *\)6 /<\1RK_PA6 /g s/<\([^ ][^ ]* *\)7 /<\1RK_PA7 /g s/<\([^ ][^ ]* *\)8 /<\1RK_PB0 /g s/<\([^ ][^ ]* *\)9 /<\1RK_PB1 /g s/<\([^ ][^ ]* *\)10 /<\1RK_PB2 /g s/<\([^ ][^ ]* *\)11 /<\1RK_PB3 /g s/<\([^ ][^ ]* *\)12 /<\1RK_PB4 /g s/<\([^ ][^ ]* *\)13 /<\1RK_PB5 /g s/<\([^ ][^ ]* *\)14 /<\1RK_PB6 /g s/<\([^ ][^ ]* *\)15 /<\1RK_PB7 /g s/<\([^ ][^ ]* *\)16 /<\1RK_PC0 /g s/<\([^ ][^ ]* *\)17 /<\1RK_PC1 /g s/<\([^ ][^ ]* *\)18 /<\1RK_PC2 /g s/<\([^ ][^ ]* *\)19 /<\1RK_PC3 /g s/<\([^ ][^ ]* *\)20 /<\1RK_PC4 /g s/<\([^ ][^ ]* *\)21 /<\1RK_PC5 /g s/<\([^ ][^ ]* *\)22 /<\1RK_PC6 /g s/<\([^ ][^ ]* *\)23 /<\1RK_PC7 /g s/<\([^ ][^ ]* *\)24 /<\1RK_PD0 /g s/<\([^ ][^ ]* *\)25 /<\1RK_PD1 /g s/<\([^ ][^ ]* *\)26 /<\1RK_PD2 /g s/<\([^ ][^ ]* *\)27 /<\1RK_PD3 /g s/<\([^ ][^ ]* *\)28 /<\1RK_PD4 /g s/<\([^ ][^ ]* *\)29 /<\1RK_PD5 /g s/<\([^ ][^ ]* *\)30 /<\1RK_PD6 /g s/<\([^ ][^ ]* *\)31 /<\1RK_PD7 /g s/<\([^ ][^ ]* *[^ ][^ ]* *\)0 /<\1RK_FUNC_GPIO /g s/<\([^ ][^ ]* *[^ ][^ ]* *\)RK_FUNC_\([1-9]\) /<\1\2 /g Suggested-by: Emil Renner Berthing <esmil@mailme.dk> Signed-off-by: Heiko Stuebner <heiko@sntech.de>
2019-01-07ARM: dts: rockchip: remove qos_cif1 from rk3188 power-domainJohan Jonker1-1/+0
While the rk3066 does have 2 camera interfaces, the rk3188 does not, so there also isn't a QoS block for that non-existing interface, so remove it. Fixes: e6e1869f0b71 ("ARM: dts: rockchip: add rk3066/rk3188 power-domains") Signed-off-by: Johan Jonker <jbx6244@gmail.com> Signed-off-by: Heiko Stuebner <heiko@sntech.de>
2018-11-27ARM: dts: rockchip: add phandles to secondary cpu coresHeiko Stuebner1-3/+3
Add phandles to secondary cpu cores as we may need to reference these down the road as well. Signed-off-by: Heiko Stuebner <heiko.stuebner@bq.com>
2018-11-27ARM: dts: rockchip: add cpu-core resets for rk3188Heiko Stuebner1-0/+4
Specify the reset handles for each cpu core. Signed-off-by: Heiko Stuebner <heiko.stuebner@bq.com>
2018-11-27ARM: dts: rockchip: convert rk3188 to opp-v2Heiko Stuebner1-11/+44
The fact that OPPs specified only on cpu0 work is Linux specific and normally cpu frequencies should be specified for each cpu core. To facilitate this without needing to duplicate the frequency table each time, convert to opp-v2 before adding references to all cores. Signed-off-by: Heiko Stuebner <heiko.stuebner@bq.com>
2018-11-27ARM: dts: rockchip: add #sound-dai-cells to Cortex-A9 i2sHeiko Stuebner1-0/+1
The Rockchip i2s always just requires a sound-dail-cells value of 0, so add them to the core soc dtsi for convenience. Signed-off-by: Heiko Stuebner <heiko.stuebner@bq.com>
2018-11-05ARM: dts: rockchip: add rk3066/rk3188 power-domainsHeiko Stuebner1-0/+51
Add the power-domain nodes to both rk3066 and rk3188 including their clocks and qos connections. Signed-off-by: Heiko Stuebner <heiko@sntech.de>
2018-09-05ARM: dts: rockchip: add rk3188 lcd controller nodesHeiko Stuebner1-0/+82
Add the core display subsystem and vop nodes to rk3188. Vop0 has a fully dedicated set of pins and only vop1 needs to do pinctrl to have display output, so also add the necessary pinctrl entries for it. Signed-off-by: Heiko Stuebner <heiko@sntech.de> Reviewed-by Sandy Huang <hjc@rock-chips.com>
2018-06-17ARM: dts: rockchip: use SPDX-License-IdentifierKlaus Goger1-38/+1
Update all 32bit rockchip devicetree files to use SPDX-License-Identifiers. All files except rk3288-veyron-analog-audio.dtsi (which is GPL 2.0 only) claim to be GPL and X11 while the actual license text is MIT. Use the MIT SPDX tag for them. Signed-off-by: Klaus Goger <klaus.goger@theobroma-systems.com> Acked-by: Brian Norris <briannorris@chromium.org> Acked-by: Matthias Brugger <mbrugger@suse.com> Acked-by: Douglas Anderson <dianders@chromium.org> Signed-off-by: Heiko Stuebner <heiko@sntech.de>
2017-10-10ARM: dts: rockchip: fix mali400 ppmmu interrupt namesHeiko Stuebner1-4/+4
The interrupts were wrongly named as ppXmmu while the binding specifies them as ppmmuX. Fix that for the recently added Utgard mali nodes on Rockchip socs. Signed-off-by: Heiko Stuebner <heiko@sntech.de>
2017-09-22ARM: dts: rockchip: add gpu nodes on rk3066/rk3188Heiko Stuebner1-0/+24
The old Cortex-A9 socs use Mali400 GPUs with 4 pixel processors. This adds the core gpu nodes with the per-soc interrupts but sharing the core node. Rockchip SoCs use only one clock to supply the GPUs Signed-off-by: Heiko Stuebner <heiko@sntech.de>
2017-05-09Merge tag 'armsoc-dt' of ↵Linus Torvalds1-2/+2
git://git.kernel.org/pub/scm/linux/kernel/git/arm/arm-soc Pull ARM Device-tree updates from Olof Johansson: "Device-tree continues to see lots of updates. The majority of patches here are smaller changes for new hardware on existing platforms, and there are a few larger changes worth pointing out. Major new platforms: - Gemini has been ported to DT, so a handful of "new" platforms moved over from board files - Rockchip RK3288 support for Tinkerboard and Phytec phyCORE-RK3288 SoM and RDK - A bunch of embedded platforms, several Linksys platforms, Synology DS116, - Motorola Droid4 (really old OMAP-based phone) support is added. Some refactorings, i.e. Allwinner H3/H5 support is commonalized. And lots of smaller changes, cleanups, etc. See shortlog for more description We're adding ability to cross-include DT files between arm and arm64, by creating appropriate links in the dt-include directory, and using arm/ and arm64/ as include prefixes. This will avoid other local hacks such as per-file links between the two arch trees (this broke for external mirroring of DT contents). Now they can just provide their own appropriate dt-include hierarcy per platform" * tag 'armsoc-dt' of git://git.kernel.org/pub/scm/linux/kernel/git/arm/arm-soc: (349 commits) ARM: dts: exynos: Use - instead of @ for DT OPP entries arm: spear6xx: add DT description of the ADC on SPEAr600 arm: spear6xx: remove unneeded pinctrl properties in spear600-evb arm: spear6xx: switch spear600-evb to the new flash partition DT binding arm: spear6xx: fix spaces in spear600-evb.dts arm: spear6xx: use node labels in spear600-evb.dts arm: spear6xx: add labels to various nodes in spear600.dtsi ARM: dts: vexpress: fix few unit address format warnings ARM: dts: at91: sama5d3_xplained: not all ADC channels are available ARM: dts: at91: sama5d3_xplained: fix ADC vref ARM: dts: at91: add envelope detector mux to the Axentia TSE-850 ARM: dts: armada-38x: label USB and SATA nodes ARM: dts: imx6q-utilite-pro: add hpd gpio ARM: dts: imx6qp-sabresd: Set reg_arm regulator supply ARM: dts: imx6qdl-sabresd: Set LDO regulator supply ARM: dts: imx: add Gateworks Ventana GW5903 support ARM: dts: i.MX25: add AIPS control registers ARM: dts: imx7-colibri: add Carrier Board 3.3V/5V regulators ARM: dts: imx7-colibri: remove 1.8V fixed regulator ARM: dts: imx7-colibri: allow to disable Ethernet rail ...
2017-04-07ARM: dts: rockchip: disable arm-global-timer for rk3188Alexander Kochetkov1-0/+1
The clocksource and the sched_clock provided by the arm_global_timer are quite unstable because their rates depend on the cpu frequency. On the other side, the arm_global_timer has a higher rating than the rockchip_timer, it will be selected by default by the time framework while we want to use the stable rockchip clocksource. Let's disable the arm_global_timer in order to have the rockchip clocksource selected by default. Signed-off-by: Alexander Kochetkov <al.kochet@gmail.com> Signed-off-by: Daniel Lezcano <daniel.lezcano@linaro.org> Reviewed-by: Heiko Stuebner <heiko@sntech.de>
2017-04-07ARM: dts: rockchip: Add timer entries to rk3188 SoCAlexander Kochetkov1-0/+16
The patch add two timers to all rk3188 based boards. The first timer is from alive subsystem and it act as a backup for the local timers at sleep time. It act the same as other SoC rockchip timers already present in kernel. The second timer is from CPU subsystem and act as replacement for the arm-global-timer clocksource and sched clock. It run at stable frequency 24MHz. Signed-off-by: Alexander Kochetkov <al.kochet@gmail.com> Signed-off-by: Daniel Lezcano <daniel.lezcano@linaro.org> Reviewed-by: Heiko Stuebner <heiko@sntech.de>
2017-03-22ARM: dts: rockchip: fix PPI misconfiguration on Cortex-A9 socsHeiko Stuebner1-2/+2
According to [0] pointed out by Marc Zyngier in a report about a similar error message, PPIs 11 and 13 are edge triggered on Cortex-A9 socs including the rk3066 and rk3188 which currently mark them as level triggered. Until some time ago the gic did not care but commit 992345a58e0c ("irqchip/gic: WARN if setting the interrupt type for a PPI fails") introduced a warning for that case. Fix the warning on these socs by describing the interrupts correctly and also using the binding constants for easier reading in the future. [0] http://infocenter.arm.com/help/topic/com.arm.doc.ddi0407f/CCHEIGIC.html Signed-off-by: Heiko Stuebner <heiko@sntech.de>
2017-01-19ARM: dts: rockchip: add soc-specific uart compatibles for rk3066/rk3188Heiko Stuebner1-0/+4
The serial IPs in Rockchip socs are based on Designware uarts and thus bind against the snps,dw-apb-uart compatible. On all newer socs we also carry around per-soc compatibles that allow us to have more specific drivers in the future - if needed. The cortex-a9 socs rk3066 and rk3188 that were added first don't have those yet, so add them for completenes sake. Signed-off-by: Heiko Stuebner <heiko@sntech.de>
2016-10-16ARM: dts: rockchip: update compatible strings for Rockchip efuseFinley Xiao1-1/+1
Signed-off-by: Finley Xiao <finley.xiao@rock-chips.com> Reviewed-by: Douglas Anderson <dianders@chromium.org> Signed-off-by: Heiko Stuebner <heiko@sntech.de>
2016-04-07ARM: dts: rockchip: add missing unitname to cpu_leakage efuseHeiko Stuebner1-1/+1
The cpu_leakage efuse on rk3288 did get it right including the unitname but on both rk3066a and rk3188 it was missing, fix that. Signed-off-by: Heiko Stuebner <heiko@sntech.de> Acked-by: Rob Herring <robh@kernel.org>
2016-04-07ARM: dts: rockchip: fix missing usbphy unit-namesHeiko Stuebner1-2/+2
The usbphy subnodes do have a reg property but no unitname, add them. Signed-off-by: Heiko Stuebner <heiko@sntech.de> Acked-by: Rob Herring <robh@kernel.org>
2016-01-25ARM: dts: rockchip: add clock-cells for usb phy nodesHeiko Stuebner1-0/+2
Add the #clock-cells properties for the usbphy nodes as they provide the pll-clocks now. Signed-off-by: Heiko Stuebner <heiko@sntech.de> Reviewed-by: Douglas Anderson <dianders@chromium.org> Reviewed-by: Michael Turquette <mturquette@baylibre.com> Signed-off-by: Heiko Stuebner <heiko@sntech.de>
2015-12-14ARM: dts: rockchip: add eFuse node for rk3188 SoCsCaesar Wang1-0/+13
This patch add the eFuse dt node for rk3188 SoCs. Signed-off-by: Caesar Wang <wxt@rock-chips.com> Signed-off-by: Heiko Stuebner <heiko@sntech.de>
2015-11-20ARM: dts: rockchip: add channels properties for i2sSugar Zhang1-0/+2
add playback and capture properties to compatible various chips. Signed-off-by: Sugar Zhang <sugar.zhang@rock-chips.com> Signed-off-by: Heiko Stuebner <heiko@sntech.de>
2015-10-13ARM: dts: rockchip: Add SPDIF transceiver for RK3188Sjoerd Simons1-0/+20
Add the SPDIF transceiver controller and pin for RK3188 Signed-off-by: Sjoerd Simons <sjoerd.simons@collabora.co.uk> Signed-off-by: Heiko Stuebner <heiko@sntech.de>
2015-08-08ARM: dts: rockchip: add usb phys to Cortex-A9 socsHeiko Stuebner1-0/+22
This adds the usbphy nodes to rk3066 and rk3188, which share the usb hosts in rk3xxx.dtsi and also enables it on boards based around these socs. The usb-phy itself is the same as used on the rk3288 already. Signed-off-by: Heiko Stuebner <heiko@sntech.de>
2015-05-13ARM: dts: rockchip: relicense rk3188.dtsi under GPLv2/X11Heiko Stuebner1-8/+36
GPLv2-only devicetrees make reuse difficult for software components licensed under a different license. The consensus is that a GPL/X11 dual-license should allow all necessary uses, so relicense the rk3188.dtsi to this combination. CCs were aquired by git shortlog -sne so it should've hopefully catched every contributor. Signed-off-by: Heiko Stuebner <heiko@sntech.de> Acked-by: Beniamino Galvani <b.galvani@gmail.com> Acked-by: Romain Perier <romain.perier@gmail.com> Acked-by: Julien Chauveau <chauveau.julien@gmail.com> Acked-by: Max Schwarz <max.schwarz@online.de>
2014-11-13ARM: dts: rockchip: fix invalid unit-address in rk3188.dtsiJulien CHAUVEAU1-2/+2
Unit addresses, whilst written in hex, don't contain a 0x prefix. Signed-off-by: Julien CHAUVEAU <julien.chauveau@neo-technologies.fr> Signed-off-by: Heiko Stuebner <heiko@sntech.de>
2014-10-20ARM: dts: rockchip: add I2S controllers for rk3066 and rk3188Julien CHAUVEAU1-0/+26
Add the I2S/PCM controller nodes and pin controls for rk3066 and rk3188. Signed-off-by: Julien CHAUVEAU <julien.chauveau@neo-technologies.fr> Signed-off-by: Heiko Stuebner <heiko@sntech.de>
2014-10-20ARM: dts: rockchip: add operating points and armclk referencesHeiko Stuebner1-1/+14
Add basic OPP entries for current supported Rockchip SoCs. The operating points are currently very conservative, so individual boards may opt to redefine them. Signed-off-by: Heiko Stuebner <heiko@sntech.de> Reviewed-by: Kever Yang <kever.yang@rock-chips.com>
2014-10-09Merge git://git.kernel.org/pub/scm/linux/kernel/git/davem/net-nextLinus Torvalds1-0/+22
Pull networking updates from David Miller: "Most notable changes in here: 1) By far the biggest accomplishment, thanks to a large range of contributors, is the addition of multi-send for transmit. This is the result of discussions back in Chicago, and the hard work of several individuals. Now, when the ->ndo_start_xmit() method of a driver sees skb->xmit_more as true, it can choose to defer the doorbell telling the driver to start processing the new TX queue entires. skb->xmit_more means that the generic networking is guaranteed to call the driver immediately with another SKB to send. There is logic added to the qdisc layer to dequeue multiple packets at a time, and the handling mis-predicted offloads in software is now done with no locks held. Finally, pktgen is extended to have a "burst" parameter that can be used to test a multi-send implementation. Several drivers have xmit_more support: i40e, igb, ixgbe, mlx4, virtio_net Adding support is almost trivial, so export more drivers to support this optimization soon. I want to thank, in no particular or implied order, Jesper Dangaard Brouer, Eric Dumazet, Alexander Duyck, Tom Herbert, Jamal Hadi Salim, John Fastabend, Florian Westphal, Daniel Borkmann, David Tat, Hannes Frederic Sowa, and Rusty Russell. 2) PTP and timestamping support in bnx2x, from Michal Kalderon. 3) Allow adjusting the rx_copybreak threshold for a driver via ethtool, and add rx_copybreak support to enic driver. From Govindarajulu Varadarajan. 4) Significant enhancements to the generic PHY layer and the bcm7xxx driver in particular (EEE support, auto power down, etc.) from Florian Fainelli. 5) Allow raw buffers to be used for flow dissection, allowing drivers to determine the optimal "linear pull" size for devices that DMA into pools of pages. The objective is to get exactly the necessary amount of headers into the linear SKB area pre-pulled, but no more. The new interface drivers use is eth_get_headlen(). From WANG Cong, with driver conversions (several had their own by-hand duplicated implementations) by Alexander Duyck and Eric Dumazet. 6) Support checksumming more smoothly and efficiently for encapsulations, and add "foo over UDP" facility. From Tom Herbert. 7) Add Broadcom SF2 switch driver to DSA layer, from Florian Fainelli. 8) eBPF now can load programs via a system call and has an extensive testsuite. Alexei Starovoitov and Daniel Borkmann. 9) Major overhaul of the packet scheduler to use RCU in several major areas such as the classifiers and rate estimators. From John Fastabend. 10) Add driver for Intel FM10000 Ethernet Switch, from Alexander Duyck. 11) Rearrange TCP_SKB_CB() to reduce cache line misses, from Eric Dumazet. 12) Add Datacenter TCP congestion control algorithm support, From Florian Westphal. 13) Reorganize sk_buff so that __copy_skb_header() is significantly faster. From Eric Dumazet" * git://git.kernel.org/pub/scm/linux/kernel/git/davem/net-next: (1558 commits) netlabel: directly return netlbl_unlabel_genl_init() net: add netdev_txq_bql_{enqueue, complete}_prefetchw() helpers net: description of dma_cookie cause make xmldocs warning cxgb4: clean up a type issue cxgb4: potential shift wrapping bug i40e: skb->xmit_more support net: fs_enet: Add NAPI TX net: fs_enet: Remove non NAPI RX r8169:add support for RTL8168EP net_sched: copy exts->type in tcf_exts_change() wimax: convert printk to pr_foo() af_unix: remove 0 assignment on static ipv6: Do not warn for informational ICMP messages, regardless of type. Update Intel Ethernet Driver maintainers list bridge: Save frag_max_size between PRE_ROUTING and POST_ROUTING tipc: fix bug in multicast congestion handling net: better IFF_XMIT_DST_RELEASE support net/mlx4_en: remove NETDEV_TX_BUSY 3c59x: fix bad split of cpu_to_le32(pci_map_single()) net: bcmgenet: fix Tx ring priority programming ...
2014-09-16ARM: dts: rockchip: fix rk3188 emmc pull referencesHeiko Stuebner1-3/+3
Fix a copy'n'paste error making the rk3188 emmc pinctrl nodes reference the pcfg_pull_default setting that is not available on rk3188. Reported-by: Naoki FUKAUMI <naobsd@gmail.com> Signed-off-by: Heiko Stuebner <heiko@sntech.de>
2014-09-13ARM: dts: rockchip: add emmc nodes for rk3066 and rk3188Heiko Stuebner1-0/+21
Add the controller node, pinctrl settings for the customizable pins and sort the controllers like on rk3288 as emmc, sdmmc, sdio for handling convenience. Signed-off-by: Heiko Stuebner <heiko@sntech.de>
2014-09-13ARM: dts: rockchip: add Cortex-A9 SPI controller nodesHeiko Stuebner1-0/+48
This adds basic spi nodes and pinctrl settings to the rk3066 and rk3188 devicetree files. Signed-off-by: Heiko Stuebner <heiko@sntech.de>
2014-09-10ARM: dts: Add emac nodes to the rk3188 device treeRomain Perier1-0/+22
This adds support for EMAC Rockchip driver on RK3188 SoCs. Signed-off-by: Romain Perier <romain.perier@gmail.com> Signed-off-by: David S. Miller <davem@davemloft.net>
2014-07-30ARM: dts: rockchip: add watchdog nodeHeiko Stuebner1-0/+4
This adds the Designware compatible watchdog found on RK3xxx Cortex-A9 SoCs. Signed-off-by: Heiko Stuebner <heiko@sntech.de>
generated by cgit v1.2.3 (git 2.39.0) at 2025-01-16 02:21:26 +0300