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2022-04-11ARM: dts: imx: align SPI NOR node name with dtschemaKrzysztof Kozlowski1-1/+1
The node names should be generic and SPI NOR dtschema expects "flash". Signed-off-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org> Signed-off-by: Shawn Guo <shawnguo@kernel.org>
2021-07-22ARM: dts: imx6qdl: move phy properties into phy device nodeJoakim Zhang1-12/+22
This patch fixes issues found by dtbs_check: make ARCH=arm CROSS_COMPILE=arm-linux-gnueabihf- dtbs_check DT_SCHEMA_FILES=Documentation/devicetree/bindings/net/fsl,fec.yaml According to the Micrel PHY dt-binding: Documentation/devicetree/bindings/net/micrel-ksz90x1.txt, Add clock delay in an Ethernet OF device node is deprecated, so move these properties to PHY OF device node. Suggested-by: Rob Herring <robh@kernel.org> Signed-off-by: Joakim Zhang <qiangqing.zhang@nxp.com> Signed-off-by: David S. Miller <davem@davemloft.net>
2020-08-30ARM: dts: imx: Fix the SPI chipselect polarityFabio Estevam1-1/+1
The conversion of the spi-imx driver to use GPIO descriptors in commit 8cdcd8aeee28 ("spi: imx/fsl-lpspi: Convert to GPIO descriptors") helped to detect the following SPI chipselect polarity mismatch on an imx6q-sabresd: [ 4.854337] m25p80@0 enforce active low on chipselect handle Prior to the above commit, the chipselect polarity passed via cs-gpios property was ignored and considered active-low. The reason for such mismatch is clearly explained in the comments inside drivers/gpio/gpiolib-of.c: * SPI children have active low chip selects * by default. This can be specified negatively * by just omitting "spi-cs-high" in the * device node, or actively by tagging on * GPIO_ACTIVE_LOW as flag in the device * tree. If the line is simultaneously * tagged as active low in the device tree * and has the "spi-cs-high" set, we get a * conflict and the "spi-cs-high" flag will * take precedence. To properly represent the SPI chipselect polarity, change it to active-low when the "spi-cs-high" property is absent. Signed-off-by: Fabio Estevam <festevam@gmail.com> Reviewed-by: Linus Walleij <linus.walleij@linaro.org> Signed-off-by: Shawn Guo <shawnguo@kernel.org>
2020-07-13ARM: dts: imx: default to #pwm-cells = <3> in the SoC dtsi filesUwe Kleine-König1-0/+3
The imx-pwm driver supports 3 cells and this is the more flexible setting. So use it by default and overwrite it back to two for the files that reference the PWMs with just 2 cells to minimize changes. This allows to drop explicit setting to 3 cells for the boards that already depend on this. The boards that are now using 2 cells explicitly can be converted to 3 individually. Signed-off-by: Uwe Kleine-König <u.kleine-koenig@pengutronix.de> Signed-off-by: Shawn Guo <shawnguo@kernel.org>
2018-12-10ARM: dts: imx6qdl: Fix memory node duplicationMarco Franchi1-0/+1
Boards based on imx6qdl have duplicate memory nodes: - One coming from the board device tree file: memory@ - One coming from the imx6qdl.dtsi file. Fix the duplication by removing the memory node from the imx6qdl.dtsi file and by adding 'device_type = "memory";' in the board Device Tree. Converted using the following command: perl -p0777i -e 's/memory\@10000000 \{\n/memory\@10000000 \{\n\t\tdevice_type = \"memory\";\n/m' `find ./arch/arm/boot/dts -name "imx6*"`` Reported-by: Rob Herring <robh@kernel.org> Signed-off-by: Marco Franchi <marco.franchi@nxp.com> Reviewed-by: Fabio Estevam <festevam@gmail.com> Signed-off-by: Shawn Guo <shawnguo@kernel.org>
2018-05-14ARM: dts: imx6qdl-sabre: Remove #address/#size-cells from camera port nodesFabio Estevam1-3/+0
Remove unnecessary #address-cells/#size-cells to fix the following DTC warnings: arch/arm/boot/dts/imx6q-novena.dtb: Warning (avoid_unnecessary_addr_size): /soc/ipu@2400000/port@2: unnecessary #address-cells/#size-cells without "ranges" or child "reg" property arch/arm/boot/dts/imx6q-novena.dtb: Warning (avoid_unnecessary_addr_size): /soc/ipu@2400000/port@3: unnecessary #address-cells/#size-cells without "ranges" or child "reg" property arch/arm/boot/dts/imx6q-novena.dtb: Warning (avoid_unnecessary_addr_size): /soc/ipu@2800000/port@2: unnecessary #address-cells/#size-cells without "ranges" or child "reg" property arch/arm/boot/dts/imx6q-novena.dtb: Warning (avoid_unnecessary_addr_size): /soc/ipu@2800000/port@3: unnecessary #address-cells/#size-cells without "ranges" or child "reg" property Signed-off-by: Fabio Estevam <fabio.estevam@nxp.com> Signed-off-by: Shawn Guo <shawnguo@kernel.org>
2018-02-12ARM: dts: imx: Add memory node unit nameMarco Franchi1-1/+1
Fix the following warnings from dtc by adding the unit name to memory nodes: Warning (unit_address_vs_reg): Node /memory has a reg or ranges property, but no unit name Converted using the following command: perl -p0777i -e 's/memory \{\n\t\treg = \<0x+([0-9a-f])/memory\@$1$\0000000 \{\n\t\treg = <0x$1/m' `find ./arch/arm/boot/dts -name "imx*"` The files below were manually fixed: -imx1-ads.dts -imx1-apf9328.dts -imx6q-pistachio.dts Signed-off-by: Marco Franchi <marco.franchi@nxp.com> Reviewed-by: Fabio Estevam <fabio.estevam@nxp.com> Signed-off-by: Shawn Guo <shawnguo@kernel.org>
2017-10-30Merge tag 'imx-dt-4.15' of ↵Arnd Bergmann1-1/+1
git://git.kernel.org/pub/scm/linux/kernel/git/shawnguo/linux into next/dt Pull "i.MX device tree updates for 4.15" from Shawn Guo: - New board support: i.MX51 ZII RDU1, i.MX53 GE Healthcare PPD, i.MX6 TX modules for MB7 from Ka-Ro Electronics, i.MX6 Wandboard revd1 variants, i.MX6 LWN DISPLAY5 board, Pistachio i.MX6Q board, i.MX6SX Vining-2000 board. - Use the 'vpcie-supply' property for PCIe device for boards imx6qdl-sabresd, imx6q-novena and imx6q-cm-fx6. - A series from Jagan Teki to update imx6qdl-icore board with audio, touch and CAN support. - Switch to nvmem for accessing OCOTP from tempmon for i.MX6SX and add tempmon support for i.MX6UL. - A bunch of patches from Lothar Waßmann updating Ka-Ro i.MX28, i.MX53 and i.MX6 TX modules. - Fix DTC warnings in i.MX device trees, dropping leading zeros from unit address, correcting display nodes notation and display port names, fixing nodes with unit name and no reg property. - Other random device updates for various board support. * tag 'imx-dt-4.15' of git://git.kernel.org/pub/scm/linux/kernel/git/shawnguo/linux: (63 commits) ARM: dts: imx53-tx53: fix interrupt flags ARM: dts: imx28-tx28: fix interrupt flags ARM: dts: display5: Device tree description of LWN's DISPLAY5 board ARM: dts: imx53-qsb-common: Fix 'led_gpio7_7@0' node with unit name and no reg property ARM: dts: imx53-m53evk: Fix 'led_gpio@0' node with unit name and no reg property ARM: dts: imx53: Fix 'usbphy@x' node with unit name and no reg property ARM: dts: imx51-ts4800: Fix 'port@0' node with unit name and no reg property ARM: dts: imx51-apf51dev: Fix 'backlight@bl1' node with unit name and no reg property ARM: dts: imx: add ZII RDU1 board ARM: dts: imx: add support for TX6 modules on MB7 baseboard ARM: dts: imx: add support for TX6QP ARM: dts: imx6-tx6: add a .dtsi file for the MB7 baseboard ARM: dts: imx6-tx6: move display configuration to .dtsi file ARM: dts: imx6-tx6: add support for I2C bus recovery ARM: dts: imx6-tx6: convert to using simple-audio-card ARM: dts: imx6-tx6: specify ethernet phy reset post-delay ARM: dts: imx6-tx6: improve ethernet related pinctrl setup ARM: dts: imx6-tx6: add trickle-charge config for DS1339 ARM: dts: imx6-tx6: remove obsolete ipu1 alias ARM: dts: imx6-tx6: remove obsolete eeti,egalax_ts ... [arnd: made sure we have no new leading zeroes in unit address during merge]
2017-10-20arm: dts: fix unit-address leading 0sRob Herring1-1/+1
Fix dtc warnings for 'simple_bus_reg' due to leading 0s. Converted using the following command: perl -p -i -e 's/\@0+([0-9a-f])/\@$1/g' `find arch/arm/boot/dts -type -f -name '*.dts*' Dropped changes to ARM, Ltd. boards LED nodes and manually fixed up some occurrences of uppercase hex. Signed-off-by: Rob Herring <robh@kernel.org> Signed-off-by: Arnd Bergmann <arnd@arndb.de>
2017-10-13ARM: dts: imx: Fix incorrect display nodes notationMarco Franchi1-1/+1
The following build warnings are seen with W=1: Warning (unit_address_vs_reg): Node /display@di0 has a unit name, but no reg property Warning (unit_address_vs_reg): Node /display@di1 has a unit name, but no reg property Fix all these warnings by changing 'display@diX' to 'dispX'. Signed-off-by: Marco Franchi <marco.franchi@nxp.com> Acked-by: Philipp Zabel <p.zabel@pengutronix.de> Reviewed-by: Fabio Estevam <fabio.estevam@nxp.com> Signed-off-by: Shawn Guo <shawnguo@kernel.org>
2017-07-26ARM: dts: imx6qdl-sabrelite: fix USB PHY resetGary Bisson1-0/+19
Declared as a regulator since the driver doesn't have a reset-gpios property for this. This ensures that the PHY is woken up, not depending on the state the second stage bootloader leaves the pin. This is a workaround until a proper mechanism is provided to reset such devices like the pwrseq library [1] for instance. [1] https://lkml.org/lkml/2017/2/10/779 Signed-off-by: Gary Bisson <gary.bisson@boundarydevices.com> Reviewed-by: Fabio Estevam <fabio.estevam@nxp.com> Signed-off-by: Shawn Guo <shawnguo@kernel.org>
2017-06-14ARM: dts: imx6-sabrelite: add OV5642 and OV5640 camera sensorsSteve Longerbeam1-0/+148
Adds the OV5642 parallel-bus sensor, and the OV5640 MIPI CSI-2 sensor. Both hang off the same i2c2 bus, so they require different (and non- default) i2c slave addresses. The OV5642 connects to the parallel-bus mux input port on ipu1_csi0_mux. The OV5640 connects to the input port on the MIPI CSI-2 receiver on mipi_csi. The OV5642 node is disabled temporarily while the subdev driver is cleaned up and submitted later. Signed-off-by: Steve Longerbeam <steve_longerbeam@mentor.com> Reviewed-by: Fabio Estevam <fabio.estevam@nxp.com> Signed-off-by: Shawn Guo <shawnguo@kernel.org>
2017-06-14ARM: dts: imx6qdl-sabrelite: remove erratum ERR006687 workaroundSteve Longerbeam1-4/+0
There is a pin conflict with GPIO_6. This pin functions as a power input pin to the OV5642 camera sensor, but ENET uses it as the h/w workaround for erratum ERR006687, to wake-up the ARM cores on normal RX and TX packet done events. So we need to remove the h/w workaround to support the OV5642. The result is that the CPUidle driver will no longer allow entering the deep idle states on the sabrelite. This is a partial revert of commit 6261c4c8f13e ("ARM: dts: imx6qdl-sabrelite: use GPIO_6 for FEC interrupt.") commit a28eeb43ee57 ("ARM: dts: imx6: tag boards that have the HW workaround for ERR006687") Signed-off-by: Steve Longerbeam <steve_longerbeam@mentor.com> Reviewed-by: Fabio Estevam <fabio.estevam@nxp.com> Signed-off-by: Shawn Guo <shawnguo@kernel.org>
2017-01-10ARM: dts: imx/vf: Correct license textAlexandre Belloni1-5/+5
The license text has been mangled at some point then copy pasted across multiple files. Restore it to what it should be. Note that this is not intended as a license change. Reviewed-by: Heiko Schocher <hs@denx.de> Acked-by: Marcel Ziswiler <marcel.ziswiler@toradex.com> Acked-by: Uwe Kleine-König <u.kleine-koenig@pengutronix.de> Acked-by: Afzal Mohammed <afzal.mohd.ma@gmail.com> Acked-by: Michael Trimarchi <michael@amarulasolutions.com> Acked-by: Stefan Agner <stefan@agner.ch> Signed-off-by: Alexandre Belloni <alexandre.belloni@free-electrons.com> Signed-off-by: Shawn Guo <shawnguo@kernel.org>
2017-01-02ARM: dts: imx: remove obsoleted property fsl,spi-num-chipselectsVladimir Zapolskiy1-1/+0
Since commit b36581df7e78 ("spi: imx: Using existing properties for chipselects") the device tree property 'fsl,spi-num-chipselects' is unused and it is already marked as obsolete in device tree binding documentation. Remove the property from the existing DTS files to avoid its reoccurence on copying. Signed-off-by: Vladimir Zapolskiy <vz@mleia.com> Reviewed-by: Fabio Estevam <fabio.estevam@nxp.com> Signed-off-by: Shawn Guo <shawnguo@kernel.org>
2017-01-02ARM: dts: boundary: remove hardcoded LVDS bus formatGary Bisson1-2/+0
The bus format is therefore retrieved from the connected panel information. Signed-off-by: Gary Bisson <gary.bisson@boundarydevices.com> Signed-off-by: Shawn Guo <shawnguo@kernel.org>
2016-11-02ARM: dts: imx6qdl-sabrelite: use hyphens for nodes nameGary Bisson1-5/+5
Also aligning the panel nodes name across all platforms. Signed-off-by: Gary Bisson <gary.bisson@boundarydevices.com> Signed-off-by: Shawn Guo <shawnguo@kernel.org>
2016-08-09ARM: dts: imx6qdl: don't configure reserved pad settingsUwe Kleine-König1-12/+12
Several dts files set a bit in the SPEED field for pads RGMII_{R,T}{XC,D0,D1,D2,D3,X_CTL}, but that doesn't exist. Writing there doesn't have an effect and the bit reads as zero. Signed-off-by: Uwe Kleine-König <uwe@kleine-koenig.org> Signed-off-by: Shawn Guo <shawnguo@kernel.org>
2016-06-11ARM: dts: imx6: tag boards that have the HW workaround for ERR006687Lucas Stach1-0/+1
Add the DT property to all boards that have the hardware workaround for erratum ERR006687 present. This allows the CPUidle driver to use the deep idle states, even if the FEC is active. Signed-off-by: Lucas Stach <l.stach@pengutronix.de> Signed-off-by: Shawn Guo <shawnguo@kernel.org>
2016-04-27ARM: dts: imx6: Do not hardcode the CLKO clockFabio Estevam1-1/+1
Using "IMX6QDL_CLK_CKO" for the clock is easier to read instead of the hardcoded clock number. Signed-off-by: Fabio Estevam <fabio.estevam@nxp.com> Signed-off-by: Shawn Guo <shawnguo@kernel.org>
2016-02-29ARM: dts: imx: replace legacy wakeup property with 'wakeup-source'Sudeep Holla1-1/+1
Though the keyboard and other driver will continue to support the legacy "gpio-key,wakeup", "linux,wakeup" and "enable-sdio-wakeup" boolean property to enable the wakeup source, "wakeup-source" is the new standard binding. This patch replaces all the legacy wakeup properties with the unified "wakeup-source" property in order to avoid any futher copy-paste duplication. Cc: Sascha Hauer <kernel@pengutronix.de> Signed-off-by: Sudeep Holla <sudeep.holla@arm.com> Signed-off-by: Shawn Guo <shawnguo@kernel.org>
2015-10-19ARM: dts: imx6qdl-sabrelite: relicense under GPLv2/X11Gary Bisson1-5/+35
Signed-off-by: Gary Bisson <gary.bisson@boundarydevices.com> Signed-off-by: Shawn Guo <shawnguo@kernel.org>
2015-10-19ARM: dts: imx6qdl-sabrelite: add Okaya LCD panelGary Bisson1-1/+75
This patch adds support for the 7" LCD display available for Sabrelite: http://boundarydevices.com/product/7-800x480-display/ Also add label to backlight_lcd and connect it to the panel. Signed-off-by: Gary Bisson <gary.bisson@boundarydevices.com> Signed-off-by: Shawn Guo <shawnguo@kernel.org>
2015-10-19ARM: dts: imx: add "jedec,spi-nor" flash compatible bindingRafał Miłecki1-1/+1
Starting with commit 8947e396a829 ("Documentation: dt: mtd: replace "nor-jedec" binding with "jedec, spi-nor"") we have "jedec,spi-nor" binding indicating support for JEDEC identification. Use it for all flashes that are supposed to support READ ID op according to the datasheets. Signed-off-by: Rafał Miłecki <zajec5@gmail.com> Signed-off-by: Shawn Guo <shawnguo@kernel.org>
2015-09-01Merge tag 'armsoc-dt' of ↵Linus Torvalds1-0/+39
git://git.kernel.org/pub/scm/linux/kernel/git/arm/arm-soc Pull ARM DT updates from Olof Johansson: "Ladies and gentlemen, we proudly announce to you the latest branch of ARM device tree contents for the mainline kernel. Come and see, come and see! No less than twentythree thousand lines of additions! Just imagine the joy you will have of using your mainline kernel on newly supported hardware such as Rockchip Chromebooks, Freescale i.MX6UL boards or UniPhier hardware! For those of you feeling less adventurous, added hardware support on platforms such as TI DM814x and Gumstix Overo platforms might be more of your liking. We've got something for everyone here! Ahem. Cough. So, anyway... This is the usual large batch of DT updates. Lots and lots of smaller changes, some of the larger ones to point out are: - Rockchip veyron (Chromebook) support, as well as several other new boards - DRM support on Atmel AT91SAM9N12EK - USB additions on some Allwinner platforms - Mediatek MT6580 support - Freescale i.MX6UL support - cleanups for Renesas shmobile platforms - lots of added devices on LPC18xx - lots of added devices and boards on UniPhier There's also some dependent code added here, in particular some branches that are primarily merged through the clock tree" * tag 'armsoc-dt' of git://git.kernel.org/pub/scm/linux/kernel/git/arm/arm-soc: (389 commits) ARM: tegra: Add gpio-ranges property ARM: tegra: Fix AHB base address on Tegra20, Tegra30 and Tegra114 ARM: tegra: Add Tegra124 PMU support ARM: tegra: jetson-tk1: Add GK20A GPU DT node ARM: tegra: venice2: Add GK20A GPU DT node ARM: tegra: Add IOMMU node to GK20A ARM: tegra: Add CPU regulator to the Jetson TK1 device tree ARM: tegra: Add entries for cpufreq on Tegra124 ARM: tegra: Enable the DFLL on the Jetson TK1 ARM: tegra: Add the DFLL to Tegra124 device tree ARM: dts: zynq: Add devicetree entry for Xilinx Zynq reset controller. ARM: dts: UniPhier: fix PPI interrupt CPU mask of timer nodes ARM: dts: rockchip: correct regulator power states for suspend ARM: dts: rockchip: correct regulator PM properties ARM: dts: vexpress: Use assigned-clock-parents for sp810 pinctrl: tegra: Only set the gpio range if needed arm: boot: dts: am4372: add ARM timers and SCU nodes ARM: dts: AM4372: Add the am4372-rtc compatible string ARM: shmobile: r8a7794 dtsi: Add CPG/MSTP Clock Domain ARM: shmobile: r8a7793 dtsi: Add CPG/MSTP Clock Domain ...
2015-08-11ARM: dts: imx6qdl-sabrelite: Allow HDMI and LVDS to work simultaneouslyFabio Estevam1-0/+7
Currently it is not possible to have HDMI and LVDS working simultaneously, because both ports try to use PLL5. Move the LVDS clock parent to PLL3_USB_OTG, so that HDMI and LVDS can be driven from independent sources. With this change the LDB pixel clock goes to 68.57 MHz, which is still within the valid range for the HSD100PXN1 LVDS panel. Signed-off-by: Fabio Estevam <fabio.estevam@freescale.com> Tested-by: Gary Bisson <gary.bisson@boundarydevices.com> Acked-by: Philipp Zabel <p.zabel@pengutronix.de> Signed-off-by: Shawn Guo <shawnguo@kernel.org>
2015-07-24dts: imx6: fix sd card gpio polarity specified in device treeDong Aisheng1-3/+3
cd-gpios polarity should be changed to GPIO_ACTIVE_LOW and wp-gpios should be changed to GPIO_ACTIVE_HIGH. Otherwise, the SD may not work properly due to wrong polarity inversion specified in DT after switch to common parsing function mmc_of_parse(). Signed-off-by: Dong Aisheng <aisheng.dong@freescale.com> Acked-by: Shawn Guo <shawnguo@kernel.org> Signed-off-by: Ulf Hansson <ulf.hansson@linaro.org>
2015-07-15ARM: dts: sabrelite: add CAN supportPeter Seiderer1-0/+32
Signed-off-by: Peter Seiderer <ps.report@gmx.net> Tested-by: Eric Nelson <eric.nelson@boundarydevices.com> Signed-off-by: Shawn Guo <shawn.guo@linaro.org>
2015-06-03ARM: dts: sabrelite: use simple-panel instead of display-timings for LVDS0Eric Nelson1-13/+17
Also add label for backlight_lvds and connect it to the LVDS display. Signed-off-by: Eric Nelson <eric.nelson@boundarydevices.com> Signed-off-by: Shawn Guo <shawn.guo@linaro.org>
2015-01-05ARM: dts: sabrelite: add i2c3Eric Nelson1-0/+14
Signed-off-by: Eric Nelson <eric.nelson@boundarydevices.com> Signed-off-by: Shawn Guo <shawn.guo@linaro.org>
2015-01-05ARM: dts: sabrelite: add hdmiEric Nelson1-0/+5
Signed-off-by: Eric Nelson <eric.nelson@boundarydevices.com> Signed-off-by: Shawn Guo <shawn.guo@linaro.org>
2015-01-05ARM: dts: sabrelite: add i2c2Eric Nelson1-0/+14
Signed-off-by: Eric Nelson <eric.nelson@boundarydevices.com> Signed-off-by: Shawn Guo <shawn.guo@linaro.org>
2014-07-18ARM: dts: imx: remove ssi fsl,mode for audio cardsMarkus Pargmann1-1/+0
The DAI mode is and should be configured by the sound card driver as codec and ssi have to be in the right modes to communicate with each other. It is possible to operate the ssi unit or the codec in master mode, sometimes even on the same board in different configurations. With the latest changes in the fsl-ssi driver, the 'fsl,mode' property is only handled as a fallback property. If the sound card sets the DAI mode correctly, this fallback configuration is dropped. Signed-off-by: Markus Pargmann <mpa@pengutronix.de> Signed-off-by: Shawn Guo <shawn.guo@freescale.com>
2014-05-16ARM: dts: Add stdout-path property to i.MX boardsSascha Hauer1-0/+4
This adds the stdout-path property to various i.MX boards. Values of the property have been taken from barebox, so they should be correct. Also, the older linux,stdout-path property is converted to stdout-path. Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de> Signed-off-by: Shawn Guo <shawn.guo@freescale.com>
2014-02-10ARM: dts: imx6qdl-sabrelite: use GPIO_6 for FEC interrupt.Troy Kisky1-0/+3
This works around a hardware bug. From "Chip Errata for the i.MX 6Dual/6Quad" ERR006687 ENET: Only the ENET wake-up interrupt request can wake the system from Wait mode. The ENET block generates many interrupts. Only one of these interrupt lines is connected to the General Power Controller (GPC) block, but a logical OR of all of the ENET interrupts is connected to the General Interrupt Controller (GIC). When the system enters Wait mode, a normal RX Done or TX Done does not wake up the system because the GPC cannot see this interrupt. This impacts performance of the ENET block because its interrupts are serviced only when the chip exits Wait mode due to an interrupt from some other wake-up source. Before this patch, ping times of a Sabre Lite board are quite random: ping 192.168.0.13 -i.5 -c5 PING 192.168.0.13 (192.168.0.13) 56(84) bytes of data. 64 bytes from 192.168.0.13: icmp_req=1 ttl=64 time=15.7 ms 64 bytes from 192.168.0.13: icmp_req=2 ttl=64 time=14.4 ms 64 bytes from 192.168.0.13: icmp_req=3 ttl=64 time=13.4 ms 64 bytes from 192.168.0.13: icmp_req=4 ttl=64 time=12.4 ms 64 bytes from 192.168.0.13: icmp_req=5 ttl=64 time=11.4 ms === 192.168.0.13 ping statistics === 5 packets transmitted, 5 received, 0% packet loss, time 2004ms rtt min/avg/max/mdev = 11.431/13.501/15.746/1.508 ms ____________________________________________________ After this patch: ping 192.168.0.13 -i.5 -c5 PING 192.168.0.13 (192.168.0.13) 56(84) bytes of data. 64 bytes from 192.168.0.13: icmp_req=1 ttl=64 time=0.120 ms 64 bytes from 192.168.0.13: icmp_req=2 ttl=64 time=0.175 ms 64 bytes from 192.168.0.13: icmp_req=3 ttl=64 time=0.169 ms 64 bytes from 192.168.0.13: icmp_req=4 ttl=64 time=0.168 ms 64 bytes from 192.168.0.13: icmp_req=5 ttl=64 time=0.172 ms === 192.168.0.13 ping statistics === 5 packets transmitted, 5 received, 0% packet loss, time 1999ms rtt min/avg/max/mdev = 0.120/0.160/0.175/0.026 ms ____________________________________________________ Also, apply same change to imx6qdl-nitrogen6x. This change may not be appropriate for all boards. Sabre Lite uses GPIO6 as a power down output for a ov5642 camera. As this expansion board does not yet work with mainline, this is not yet a conflict. It would be nice to have an alternative fix for boards where this is a problem. For example Sabre SD uses GPIO6 for I2C3_SDA. It also has long ping times currently. But cannot use this fix without giving up a touchscreen. Its ping times are also random. ping 192.168.0.19 -i.5 -c5 PING 192.168.0.19 (192.168.0.19) 56(84) bytes of data. 64 bytes from 192.168.0.19: icmp_req=1 ttl=64 time=16.0 ms 64 bytes from 192.168.0.19: icmp_req=2 ttl=64 time=15.4 ms 64 bytes from 192.168.0.19: icmp_req=3 ttl=64 time=14.4 ms 64 bytes from 192.168.0.19: icmp_req=4 ttl=64 time=13.4 ms 64 bytes from 192.168.0.19: icmp_req=5 ttl=64 time=12.4 ms === 192.168.0.19 ping statistics --- 5 packets transmitted, 5 received, 0% packet loss, time 2003ms rtt min/avg/max/mdev = 12.451/14.369/16.057/1.316 ms Signed-off-by: Troy Kisky <troy.kisky@boundarydevices.com> CC: Ranjani Vaidyanathan <ra5478@freescale.com> Signed-off-by: Shawn Guo <shawn.guo@linaro.org>
2014-02-09ARM: dts: imx6q-sabrelite: PHY reset is active-lowPhilipp Zabel1-1/+1
Note that the fec driver code currently hard-codes an active-low reset, regardless of the flags in the device tree. Signed-off-by: Philipp Zabel <p.zabel@pengutronix.de> Signed-off-by: Shawn Guo <shawn.guo@linaro.org>
2014-02-09ARM: dts: imx6qdl-sabrelite: add gpio-keysTroy Kisky1-0/+62
Add power, menu, home, back, volume up, and volume down buttons. Also, apply same changes to imx6qdl-nitrogen6x. Signed-off-by: Troy Kisky <troy.kisky@boundarydevices.com> Signed-off-by: Shawn Guo <shawn.guo@linaro.org>
2014-02-09ARM: dts: imx6qdl-sabrelite: Add over-current pin to usbotgTroy Kisky1-0/+1
KEY_COL4 is over-current for usbotg on Sabre Lite. Signed-off-by: Troy Kisky <troy.kisky@boundarydevices.com> Reviewed-by: Marek Vasut <marex@denx.de> Signed-off-by: Shawn Guo <shawn.guo@linaro.org>
2014-02-09ARM: dts: imx6qdl-sabrelite: fix ENET groupTroy Kisky1-10/+9
GPIO16 is used for I2C3, not ENET_REF_CLK. Also, remove pull-ups from tx pins, and ENET_MDIO which has an external pull-up. Signed-off-by: Troy Kisky <troy.kisky@boundarydevices.com> Reviewed-by: Marek Vasut <marex@denx.de> Signed-off-by: Shawn Guo <shawn.guo@linaro.org>
2014-02-09ARM: dts: imx6qdl-sabrelite: add skews for Micrel phyTroy Kisky1-0/+12
Set the data delays to min, and clock delays to max because the traces are equal length on pcb. Signed-off-by: Troy Kisky <troy.kisky@boundarydevices.com> Reviewed-by: Marek Vasut <marex@denx.de> Signed-off-by: Shawn Guo <shawn.guo@linaro.org>
2014-02-09ARM: dts: imx6qdl-sabrelite: add pwms for backlightsTroy Kisky1-0/+54
add pwm1 for lcd backlight add pwm4 for lvds backlight add pwm3 for ov5640 mipi clock Signed-off-by: Troy Kisky <troy.kisky@boundarydevices.com> Signed-off-by: Shawn Guo <shawn.guo@linaro.org>
2014-02-09ARM: dts: imx6qdl-sabrelite: explicitly set pad for SGTL5000 sys_mclkTroy Kisky1-1/+2
Explicitly sets the pad GPIO_0 (sys_mclk) to 0x030b0. Before this patch, it has the value 0x130b0 if using mainline u-boot. So this patch also removes hysteresis. The 100k pulldown remains so that a disabled clock will be low. Signed-off-by: Troy Kisky <troy.kisky@boundarydevices.com> Signed-off-by: Shawn Guo <shawn.guo@linaro.org>
2014-02-09ARM: dts: imx6qdl-sabrelite: move phy reset to pinctrl_enetTroy Kisky1-1/+2
This patch moves pin EIM_D23 (phy reset) from pinctrl_hog to pinctrl_enet. It also explicitly sets the pad to 0x000b0. Before this patch, it has the value 0x1b0b0 if using mainline u-boot. So this patch also removes hysteresis and a 100K pullup since the pad is always an output. Signed-off-by: Troy Kisky <troy.kisky@boundarydevices.com> Signed-off-by: Shawn Guo <shawn.guo@linaro.org>
2014-02-09ARM: dts: imx6qdl-sabrelite: move usbotg power enable to pinctrl_usbotgTroy Kisky1-1/+2
This patch moves pin EIM_D22(power enable) from pinctrl_hog to pinctrl_usbotg. It also explicitly sets the pad to 0x000b0, which is also the value that it has before this patch if using mainline u-boot. Signed-off-by: Troy Kisky <troy.kisky@boundarydevices.com> Signed-off-by: Shawn Guo <shawn.guo@linaro.org>
2014-02-09ARM: dts: imx6qdl-sabrelite: move spi-nor CS to pinctrl_ecspi1Troy Kisky1-1/+1
This patch moves pin EIM_D19 (CS) from pinctrl_hog to pinctrl_ecspi1. It also explicitly sets the pad to 0x000b1. Before this patch, it has the value 0x100b1 if using mainline u-boot. So this patch also removes hysteresis since the pad is always an output. Signed-off-by: Troy Kisky <troy.kisky@boundarydevices.com> Signed-off-by: Shawn Guo <shawn.guo@linaro.org>
2014-02-09ARM: dts: imx6qdl-sabrelite: move USDHC3 CD/WP to pinctrl_usdhc3Troy Kisky1-2/+2
This patch moves pin SD3_DAT5/4 (CD/WP) from pinctrl_hog to pinctrl_usdhc3. It also explicitly sets the pad SD3_DAT5 to 0x1b0b0, which is also the value that it has before this patch if using mainline u-boot. Signed-off-by: Troy Kisky <troy.kisky@boundarydevices.com> Signed-off-by: Shawn Guo <shawn.guo@linaro.org>
2014-02-09ARM: dts: imx6qdl-sabrelite: move USDHC4 CD to pinctrl_usdhc4Troy Kisky1-1/+1
This patch moves pin NANDF_D6 (CD) from pinctrl_hog to pinctrl_usdhc4. It also explicitly sets the pad to 0x1b0b0, which is also the value that it has before this patch if using mainline u-boot. Signed-off-by: Troy Kisky <troy.kisky@boundarydevices.com> Signed-off-by: Shawn Guo <shawn.guo@linaro.org>
2014-02-09ARM: dts: imx6qdl-sabrelite: remove usdhc4 wp-gpioTroy Kisky1-2/+0
On Sabre Lite usdhc4 is a micro sd slot, which has no write protect. Signed-off-by: Troy Kisky <troy.kisky@boundarydevices.com> Reviewed-by: Marek Vasut <marex@denx.de> Signed-off-by: Shawn Guo <shawn.guo@linaro.org>
2014-02-09ARM: dts: imx6qdl-sabrelite: Add uart1 supportTroy Kisky1-0/+13
Uart1 is available on Sabre Lite. Signed-off-by: Troy Kisky <troy.kisky@boundarydevices.com> Reviewed-by: Marek Vasut <marex@denx.de> Signed-off-by: Shawn Guo <shawn.guo@linaro.org>
2014-02-09ARM: dts: imx: sabrelite: add Dual Lite/Solo supportTroy Kisky1-0/+278
This makes the structure of Sabre Lite board files the same as Sabre SD board files so that they are easier to compare. By this, I mean that the majority of the file imx6q-sabrelite.dts is moved to imx6qdl-sabrelite.dtsi so that both imx6q-sabrelite.dts and imx6dl-sabrelite.dts can include it. Now Sabre Lite has support for Dual Lite/Solo processors. Signed-off-by: Troy Kisky <troy.kisky@boundarydevices.com> Reviewed-by: Marek Vasut <marex@denx.de> Signed-off-by: Shawn Guo <shawn.guo@linaro.org>