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Fix the bulk of the unit_address_vs_reg warnings and unnecessary
\#address-cells/#size-cells without "ranges" or child "reg" property
Signed-off-by: Florian Fainelli <f.fainelli@gmail.com>
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Remove the usage of skeleton.dtsi in the remaining dts files. It was
deprecated since commit 9c0da3cc61f1 ("ARM: dts: explicitly mark
skeleton.dtsi as deprecated"). This will make adding a unit-address to
memory nodes easier.
The main tricky part to removing skeleton.dtsi is we could end up with
no /memory node at all when a bootloader depends on one being present. I
hacked up dtc to check for this condition.
Acked-by: Linus Walleij <linus.walleij@linaro.org>
Reviewed-by: Florian Fainelli <f.fainelli@gmail.com>
Reviewed-by: Matthias Brugger <matthias.bgg@gmail.com>
Acked-by: Viresh Kumar <viresh.kumar@linaro.org>
Acked-by: Alexandre Belloni <alexandre.belloni@bootlin.com>
Acked-by: Neil Armstrong <narmstrong@baylibre.com>
Acked-by: Antoine Tenart <antoine.tenart@bootlin.com>
Acked-by: Alexandre TORGUE <alexandre.torgue@st.com>
Acked-by: Robert Jarzmik <robert.jarzmik@free.fr>
Acked-by: Vladimir Zapolskiy <vz@mleia.com>
Tested-by: Kevin Hilman <khilman@baylibre.com>
Reviewed-by: Kevin Hilman <khilman@baylibre.com>
Tested-by: Martin Blumenstingl <martin.blumenstingl@googlemail.com>
Reviewed-by: Martin Blumenstingl <martin.blumenstingl@googlemail.com>
Signed-off-by: Rob Herring <robh@kernel.org>
Reviewed-by: Gregory CLEMENT <gregory.clement@bootlin.com>
Tested-by: Gregory CLEMENT <gregory.clement@bootlin.com>
Signed-off-by: Arnd Bergmann <arnd@arndb.de>
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Currently, the USB 3.0 PHY in bcm5301x.dtsi uses platform driver which
requires register range "ccb-mii" <0x18003000 0x1000>. This range
overlaps with MDIO cmd and param registers (<0x18003000 0x8>).
Essentially, the platform driver partly acts like a MDIO bus driver,
hence to use of this register range.
In some Northstar devices like Linksys EA9500, secondary switch is
connected via external MDIO. The only way to access and configure the
external switch is via MDIO bus. When we enable the MDIO bus in it's
current state, the MDIO bus and any child buses fail to register because
of the register range overlap.
On Northstar, the USB 3.0 PHY is connected at address 0x10 on the
internal MDIO bus. This change moves the usb3_phy node and makes it a
child node of internal MDIO bus.
Thanks to Rafał Miłecki's commit af850e14a7ae ("phy: bcm-ns-usb3: add
MDIO driver using proper bus layer") the same USB 3.0 platform driver
can now act as USB 3.0 PHY MDIO driver.
Tested on Linksys Panamera (EA9500)
Signed-off-by: Vivek Unune <npcomplete13@gmail.com>
Signed-off-by: Florian Fainelli <f.fainelli@gmail.com>
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This matches licensing used by other BCM5301X files and is preferred as:
1) GPL 2.0+ makes is clearly compatible with Linux kernel
2) MIT is also permissive but preferred over ISC
These files were created and ever touched by a group of four people
only: Felix, INAGAKI, Hauke and me.
Signed-off-by: Rafał Miłecki <rafal@milecki.pl>
Acked-by: Felix Fietkau <nbd@nbd.name>
Acked-by: INAGAKI Hiroshi <musashino.open@gmail.com>
Acked-by: Hauke Mehrtens <hauke@hauke-m.de>
Signed-off-by: Florian Fainelli <f.fainelli@gmail.com>
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Buffalo WZR-900DHP has 8 LEDs, but there is not LED definitions in the
dts and cannot configure these LEDs.
I Added missing LED definitions for WZR-900DHP.
Signed-off-by: INAGAKI Hiroshi <musashino.open@gmail.com>
Reviewed-by: Rafał Miłecki <rafal@milecki.pl>
Signed-off-by: Florian Fainelli <f.fainelli@gmail.com>
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It's preferred to have DT source files licensed under BSD compatible
license. All new BCM5301X DTS files use ISC so let's also relicense old
ones to it.
Except for me only Hauke was ever touched these files in his commit
9faa5960eef3 ("ARM: BCM5301X: add NAND flash chip description") and
commit bb1d8fba1965 ("ARM: BCM5301X: add NAND flash chip description for
Asus RT-AC87U").
Signed-off-by: Rafał Miłecki <rafal@milecki.pl>
Acked-by: Hauke Mehrtens <hauke@hauke-m.de>
Signed-off-by: Florian Fainelli <f.fainelli@gmail.com>
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The first 128 MiB of RAM can be accessed using an alias at address 0x0.
In theory we could access whole RAM using 0x80000000 - 0xbfffffff range
(up to 1 GiB) but it doesn't seem to work on Northstar. For some reason
(hardware setup left by the bootloader maybe?) 0x80000000 - 0x87ffffff
range can't be used. I reproduced this problem on:
1) Buffalo WZR-600DHP2 (BCM47081)
2) Netgear R6250 (BCM4708)
3) D-Link DIR-885L (BCM47094)
So it seems we're forced to access first 128 MiB using alias at 0x0 and
the rest using real base address + 128 MiB offset which is 0x88000000.
Signed-off-by: Rafał Miłecki <rafal@milecki.pl>
Acked-by: Jon Mason <jon.mason@broadcom.com>
Signed-off-by: Florian Fainelli <f.fainelli@gmail.com>
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This adds the NAND flash chip description for a standard chip found
connected to this SoC. This makes use of generic Broadcom NAND driver
with the iProc interface.
Signed-off-by: Hauke Mehrtens <hauke@hauke-m.de>
Signed-off-by: Florian Fainelli <f.fainelli@gmail.com>
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Signed-off-by: Rafał Miłecki <zajec5@gmail.com>
Signed-off-by: Hauke Mehrtens <hauke@hauke-m.de>
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