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2022-06-10treewide: Replace GPLv2 boilerplate/reference with SPDX - gpl-2.0_56.RULE ↵Thomas Gleixner1-7/+2
(part 1) Based on the normalized pattern: this file is licensed under the terms of the gnu general public license version 2 this program is licensed as is without any warranty of any kind whether express or implied extracted by the scancode license scanner the SPDX license identifier GPL-2.0-only has been chosen to replace the boilerplate/reference. Reviewed-by: Allison Randal <allison@lohutok.net> Signed-off-by: Thomas Gleixner <tglx@linutronix.de> Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
2018-03-06ARM: dts: artpec: migrate ethernet to stmmac bindingNiklas Cassel1-0/+1
The snps,dwc-qos-ethernet binding is still supported as a glue layer in the stmmac driver. However, since the snps,dwc-qos-ethernet binding is now deprecated, migrate to stmmac's native binding. At the same time, enable features supported by the stmmac driver, such as PTP, LPI, and an additional tx queue. Signed-off-by: Niklas Cassel <niklas.cassel@axis.com> Signed-off-by: Arnd Bergmann <arnd@arndb.de>
2018-03-06ARM: dts: artpec: use 1 GiB RAMNiklas Cassel1-1/+1
There has never been an artpec6 devboard produced with less than 1 GiB RAM. Increase the default value to 1 GiB RAM, so that we can netboot with large initramfs without going OOM. Signed-off-by: Niklas Cassel <niklas.cassel@axis.com> Signed-off-by: Arnd Bergmann <arnd@arndb.de>
2016-11-26ARM: dts: artpec: add pcie supportNiklas Cassel1-0/+4
Add PCIe support to the ARTPEC-6 SoC. This uses the existing pcie-artpec6 driver. So, all that is needed is device tree entries in the DTS. Signed-off-by: Niklas Cassel <niklas.cassel@axis.com> Signed-off-by: Jesper Nilsson <jespern@axis.com>
2016-02-25ARM: dts: artpec: add Artpec-6 development board dtsLars Persson1-0/+64
Signed-off-by: Lars Persson <larper@axis.com> Reviewed-by: Arnd Bergmann <arnd@arndb.de> Signed-off-by: Olof Johansson <olof@lixom.net>