index
:
starfive-tech/linux.git
JH7100_VisionFive_OH_dev
JH7110_VisionFive2_510_devel
JH7110_VisionFive2_6.1.y_devel
JH7110_VisionFive2_6.6.y_devel
JH7110_VisionFive2_devel
JH7110_VisionFive2_upstream
beaglev-5.13.y
beaglev_fedora_devel
buildroot-upstream
esmil_starlight
fedora-vic-7100_5.10.6
master
openwrt-6.1.y
rt-ethercat-release
rt-linux-6.6.y-release
rt-linux-release
rtthread_AMP
starfive-5.13
starfive-5.15-dubhe
starfive-6.1-dubhe
starfive-6.1.65-dubhe
starfive-6.6.10-dubhe
starfive-6.6.31-dubhe
starlight-5.14.y
visionfive
visionfive-5.13.y-devel
visionfive-5.15.y
visionfive-5.15.y-devel
visionfive-5.15.y_fedora_devel
visionfive-5.16.y
visionfive-5.17.y
visionfive-5.18.y
visionfive-5.19.y
visionfive-6.4.y
visionfive_fedora_devel
StarFive Tech Linux Kernel for VisionFive (JH7110) boards (mirror)
Andrey V.Kosteltsev
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path:
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/
arch
/
arc
/
plat-axs10x
Age
Commit message (
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Author
Files
Lines
2017-12-20
ARC: [plat-axs103] refactor the quad core DT quirk code
Eugeniy Paltsev
1
-4
/
+6
2017-12-20
ARC: [plat-axs103]: Set initial core pll output frequency
Eugeniy Paltsev
1
-6
/
+2
2017-11-15
ARC: [plat-axs10x] DTS: Add reset controller node to manage ethernet reset
Eugeniy Paltsev
1
-7
/
+0
2017-10-30
ARC: [plat-axs10x] auto-select AXS101 or AXS103 given the ISA config
Vineet Gupta
1
-0
/
+2
2017-10-04
ARC: [plat-axs103] Add temporary quirk to reset ethernet IP
Eugeniy Paltsev
1
-0
/
+7
2017-09-01
ARC: [plat-axs103] refactor the DT fudging code
Vineet Gupta
1
-24
/
+22
2017-09-01
ARC: [plat-axs103] use clk driver #1: Get rid of platform specific cpu clk se...
Eugeniy Paltsev
1
-113
/
+5
2016-11-30
ARC: move mcip.h into include/soc and adjust the includes
Vineet Gupta
1
-1
/
+1
2016-05-19
Merge tag 'arc-4.7-rc1' of git://git.kernel.org/pub/scm/linux/kernel/git/vgup...
Linus Torvalds
1
-7
/
+20
2016-05-18
arc: axs103_smp: Fix CPU frequency to 100MHz for dual-core
Alexey Brodkin
1
-2
/
+0
2016-05-09
ARC: Don't try to use value of top level clock-frequency in DT
Alexey Brodkin
1
-2
/
+0
2016-05-09
ARC: [dts] Add clk feeding into timers to DTs
Vineet Gupta
1
-1
/
+13
2016-05-09
ARC: [plat-axs] Refactor core freq get/set
Vineet Gupta
1
-5
/
+10
2016-04-26
arc: select GPIOLIB directly
Linus Walleij
1
-1
/
+1
2016-03-10
ARC: Add PCI support
Joao Pinto
1
-0
/
+1
2015-10-28
ARCv2: smp: [plat-*]: No need to explicitly call mcip_init_smp()
Vineet Gupta
1
-3
/
+0
2015-10-28
ARCv2: smp: [plat-*]: No need to explicitly call mcip_init_early_smp()
Vineet Gupta
1
-5
/
+0
2015-09-12
ARCv2: [axs103_smp] Reduce clk for SMP FPGA configs
Vineet Gupta
1
-0
/
+2
2015-08-20
ARC: add/fix some comments in code - no functional change
Vineet Gupta
1
-1
/
+1
2015-08-04
ARCv2: [axs103_smp] Reduce clk for Quad FPGA configs
Vineet Gupta
1
-0
/
+15
2015-06-25
ARCv2: [vdk] dts files and defconfig for HS38 VDK
Ruud Derwig
1
-0
/
+8
2015-06-25
ARCv2: [axs103] Support ARC SDP FPGA platform for HS38x cores
Vineet Gupta
2
-11
/
+200
2015-06-19
ARC: [axs101] Add missing __init annotations
Vineet Gupta
1
-6
/
+6
2015-06-19
ARC: [axs101] Tweak DDR port aperture mappings for performance
Vineet Gupta
1
-4
/
+4
2015-06-19
ARC: [axs101] Add support for AXS101 SDP (software development platform)
Alexey Brodkin
3
-0
/
+342