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2025-05-20dt-bindings: mips: Add EcoNet platform bindingCaleb James DeLisle1-0/+26
Document the top-level device tree binding for EcoNet MIPS-based SoCs. Signed-off-by: Caleb James DeLisle <cjd@cjdns.fr> Reviewed-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org> Signed-off-by: Thomas Bogendoerfer <tsbogend@alpha.franken.de>
2025-05-19dt-bindings: i2c: i2c-rk3x: Add compatible string for RK3528Yao Zi1-0/+1
Document I2C controllers integrated in RK3528, which are compatible with the RK3399 variant. Signed-off-by: Yao Zi <ziyao@disroot.org> Reviewed-by: Heiko Stuebner <heiko@sntech.de> Acked-by: Conor Dooley <conor.dooley@microchip.com> Reviewed-by: Andi Shyti <andi.shyti@kernel.org> Link: https://lore.kernel.org/r/20250417120118.17610-4-ziyao@disroot.org Signed-off-by: Andi Shyti <andi.shyti@kernel.org>
2025-05-19dt-bindings: i2c: renesas,riic: Document RZ/V2N (R9A09G056) supportLad Prabhakar1-0/+1
Document support for the I2C Bus Interface (RIIC) found on the Renesas RZ/V2N (R9A09G056) SoC. The RIIC IP is identical to that on RZ/V2H(P), so `renesas,riic-r9a09g057` will be used as a fallback compatible, enabling reuse of the existing driver without changes. Signed-off-by: Lad Prabhakar <prabhakar.mahadev-lad.rj@bp.renesas.com> Reviewed-by: Wolfram Sang <wsa+renesas@sang-engineering.com> Reviewed-by: Geert Uytterhoeven <geert+renesas@glider.be> Link: https://lore.kernel.org/r/20250501203310.140137-1-prabhakar.mahadev-lad.rj@bp.renesas.com Signed-off-by: Andi Shyti <andi.shyti@kernel.org>
2025-05-19dt-bindings: i2c: dw: Add Sophgo SG2044 SoC I2C controllerInochi Amaoto1-0/+1
Add compatible string for Sophgo SG2044 SoC I2C controller which can be used specifically for the SG2044 SoC. Signed-off-by: Inochi Amaoto <inochiama@gmail.com> Acked-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org> Link: https://lore.kernel.org/r/20250413223507.46480-9-inochiama@gmail.com Signed-off-by: Andi Shyti <andi.shyti@kernel.org>
2025-05-19dt-bindings: i2c: dw: merge duplicate compatible entry.Inochi Amaoto1-7/+4
Each vendor have an items entry of its own compatible, It is needless and some can be merged as it share the same base "snps,designware-i2c" compatible. Merge the duplicate compatible entry into one item entry. Signed-off-by: Inochi Amaoto <inochiama@gmail.com> Reviewed-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org> Link: https://lore.kernel.org/r/20250413223507.46480-2-inochiama@gmail.com Signed-off-by: Andi Shyti <andi.shyti@kernel.org>
2025-05-19dt-bindings: i2c: i2c-mt65xx: Add MediaTek Dimensity 1200 MT6893AngeloGioacchino Del Regno1-0/+1
Add support for the MediaTek Dimensity 1200 (MT6893) SoC; this chip's multiple I2C controller instances are fully compatible with the ones found in the MT8192 SoC. Signed-off-by: AngeloGioacchino Del Regno <angelogioacchino.delregno@collabora.com> Acked-by: Rob Herring (Arm) <robh@kernel.org> Link: https://lore.kernel.org/r/20250416120303.148017-1-angelogioacchino.delregno@collabora.com Signed-off-by: Andi Shyti <andi.shyti@kernel.org>
2025-05-19Documentation: kunit: improve example on testing static functionsRae Moar1-8/+30
The documentation on testing static functions using the KUnit macros VISIBLE_IF_KUNIT and EXPORT_SYMBOL_IF_KUNIT is lacking clarity and missing key steps in the example. This has caused bugs and confusion among developers. Improve wording of description and add missing steps to the example. This entails adding the "#include <kunit/visibility.h>" line and the "MODULE_IMPORT_NS(EXPORTED_FOR_KUNIT_TESTING);" line. Both of which were missing from the original example and key to exposing static functions. Link: https://lore.kernel.org/r/20250516190631.1214081-1-rmoar@google.com Signed-off-by: Rae Moar <rmoar@google.com> Reviewed-by: David Gow <davidgow@google.com> Signed-off-by: Shuah Khan <skhan@linuxfoundation.org>
2025-05-19Merge tag 'thermal-v6.16-rc1' of ↵Rafael J. Wysocki4-4/+52
ssh://gitolite.kernel.org/pub/scm/linux/kernel/git/thermal/linux Merge updates of multiple thermal drivers for 6.16 from Daniel Lezcano: "- Make the Hisilicon driver to compile by default when ARCH_HISI is set (Krzysztof Kozlowski) - Cleanup printk format with use of %pC instead of %pCn in the bcm2835 driver (Luca Ceresoli) - Fix variable naming coding style in the AmLogic driver (Enrique Isidoro Vazquez Ramos) - Fix missing debugfs entry removal on failure by using the devm_ variant in the LVTS driver (AngeloGioacchino Del Regno) - Remove the unused lvts_debugfs_exit() function as the devm variant introduced before takes care of removing the debugfs entry in the LVTS driver (Arnd Bergmann) - Add the Airoha EN7581 thermal sensor support along with its DT bindings (Christian Marangi) - Add ipq5018 compatible string DT binding, cleanup and add its suppot in the QCom Tsens driver driver (Sricharan Ramabadhran and George Moussalem) - Fix comments typos in the Airoha driver (Christian Marangi)" * tag 'thermal-v6.16-rc1' of ssh://gitolite.kernel.org/pub/scm/linux/kernel/git/thermal/linux: thermal/drivers/airoha: Fix spelling mistake thermal/drivers/qcom/tsens: Add support for IPQ5018 tsens thermal/drivers/qcom/tsens: Add support for tsens v1 without RPM thermal/drivers/qcom/tsens: Update conditions to strictly evaluate for IP v2+ dt-bindings: thermal: qcom-tsens: Add ipq5018 compatible thermal/drivers: Add support for Airoha EN7581 thermal sensor dt-bindings: thermal: Add support for Airoha EN7581 thermal sensor thermal/drivers/mediatek/lvts: Remove unused lvts_debugfs_exit thermal/drivers/mediatek/lvts: Fix debugfs unregister on failure thermal/drivers/amlogic: Rename Uptat to uptat to follow kernel coding style vsprintf: remove redundant and unused %pCn format specifier thermal/drivers/bcm2835: Use %pC instead of %pCn thermal/drivers/hisi: Do not enable by default during compile testing
2025-05-19Merge branch 'thermal-intel'Rafael J. Wysocki1-0/+21
Merge an update of the Intel int340x thermal driver adding Platform Temperature Control (PTC) support to it (Srinivas Pandruvada). * thermal-intel: thermal: int340x: processor_thermal: Platform temperature control documentation thermal: intel: int340x: Enable platform temperature control thermal: intel: int340x: Add platform temperature control interface
2025-05-19KVM: SVM: Add support for KVM_CAP_X86_BUS_LOCK_EXIT on SVM CPUsManali Shukla1-0/+5
Add support for KVM_CAP_X86_BUS_LOCK_EXIT on SVM CPUs with Bus Lock Threshold, which is close enough to VMX's Bus Lock Detection VM-Exit to allow reusing KVM_CAP_X86_BUS_LOCK_EXIT. The biggest difference between the two features is that Threshold is fault-like, whereas Detection is trap-like. To allow the guest to make forward progress, Threshold provides a per-VMCB counter which is decremented every time a bus lock occurs, and a VM-Exit is triggered if and only if the counter is '0'. To provide Detection-like semantics, initialize the counter to '0', i.e. exit on every bus lock, and when re-executing the guilty instruction, set the counter to '1' to effectively step past the instruction. Note, in the unlikely scenario that re-executing the instruction doesn't trigger a bus lock, e.g. because the guest has changed memory types or patched the guilty instruction, the bus lock counter will be left at '1', i.e. the guest will be able to do a bus lock on a different instruction. In a perfect world, KVM would ensure the counter is '0' if the guest has made forward progress, e.g. if RIP has changed. But trying to close that hole would incur non-trivial complexity, for marginal benefit; the intent of KVM_CAP_X86_BUS_LOCK_EXIT is to allow userspace rate-limit bus locks, not to allow for precise detection of problematic guest code. And, it's simply not feasible to fully close the hole, e.g. if an interrupt arrives before the original instruction can re-execute, the guest could step past a different bus lock. Suggested-by: Sean Christopherson <seanjc@google.com> Signed-off-by: Manali Shukla <manali.shukla@amd.com> Link: https://lore.kernel.org/r/20250502050346.14274-5-manali.shukla@amd.com [sean: fix typo in comment] Signed-off-by: Sean Christopherson <seanjc@google.com>
2025-05-19dt-bindings: net: wireless: ath12k: describe firmware-name propertyMiaoqing Pan1-0/+6
Introduce 'firmware-name' property to allow end-users and/or integrators to decide which usecase-specific firmware to run on the WCN7850 platform. This is necessary due to resource limitations such as memory capacity and CPU capability, or performance and power optimization for different application scenarios. Two firmwares are supported: 'WCN7850/hw2.0' and 'WCN7850/hw2.0/ncm825'. The former is the default firmware, suitable for most WiFi 7 STA functions. The latter adds support for commercial-quality SAP and optimizes power consumption for IoT applications. Signed-off-by: Miaoqing Pan <quic_miaoqing@quicinc.com> Reviewed-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org> Link: https://patch.msgid.link/20250424005703.2479907-2-quic_miaoqing@quicinc.com Signed-off-by: Jeff Johnson <jeff.johnson@oss.qualcomm.com>
2025-05-19dt-bindings: timer: renesas,tpu: remove binding documentationKuninori Morimoto2-65/+0
commit 1c4b5ecb7ea1 ("remove the h8300 architecture") removes Renesas TPU timer driver. Let's remove its binding documentation. Signed-off-by: Kuninori Morimoto <kuninori.morimoto.gx@renesas.com> Reviewed-by: Geert Uytterhoeven <geert+renesas@glider.be> Link: https://lore.kernel.org/r/87semglt2g.wl-kuninori.morimoto.gx@renesas.com Signed-off-by: Uwe Kleine-König <ukleinek@kernel.org>
2025-05-19docs: ABI: Fix "firwmare" to "firmware"Sumanth Gavini1-1/+1
Fix misspelling reported by codespell Signed-off-by: Sumanth Gavini <sumanth.gavini@yahoo.com> Reviewed-by: Jonathan Cameron <Jonathan.Cameron@huawei.com> Link: https://patch.msgid.link/20250517110332.1289718-1-sumanth.gavini@yahoo.com Signed-off-by: Dave Jiang <dave.jiang@intel.com>
2025-05-19docs: align with scripts/syscall.tbl migrationJesung Yang1-0/+84
Update the documentation to reflect the migration of the following architectures to the centralized syscall table format: arc, arm64, csky, hexagon, loongarch, nios2, openrisc, riscv As of commit 3db80c999debbad ("riscv: convert to generic syscall table"), these architectures no longer rely on include/uapi/asm-generic/unistd.h. Instead, syscall table headers (syscall_table_{32,64}.h) are generated by scripts/syscalltbl.sh based on entries in scripts/syscall.tbl, with ABIs specified in arch/*/kernel/Makefile.syscalls. For the convenience of developers working with older kernel versions, the original documentation is fully retained, with new sections added to cover the scripts/syscall.tbl approach. Verified with `make htmldocs`. Signed-off-by: Jesung Yang <y.j3ms.n@gmail.com> Link: https://lore.kernel.org/lkml/20240704143611.2979589-1-arnd@kernel.org Signed-off-by: Jonathan Corbet <corbet@lwn.net> Message-ID: <20250506194841.1567737-1-y.j3ms.n@gmail.com>
2025-05-19Documentation: NTB: Fix typoUtkarsh Tiwari1-1/+1
Fix 'peace' to 'piece' in the ntb documentation Signed-off-by: Utkarsh Tiwari <utkarsh02t@gmail.com> Signed-off-by: Jonathan Corbet <corbet@lwn.net> Message-ID: <20250519080248.648971-1-utkarsh02t@gmail.com>
2025-05-19Merge branch 'icc-sa8775p' into icc-nextGeorgi Djakov1-0/+1
Add Epoch Subsystem (EPSS) L3 provider support on SA8775P SoCs. Current interconnect framework is based on static IDs for creating node and registering with framework. This becomes a limitation for topologies where there are multiple instances of same interconnect provider. Modified interconnect framework APIs to create and link icc node with dynamic IDs, this will help to overcome the dependency on static IDs. * icc-sa8775p dt-bindings: interconnect: Add EPSS L3 compatible for SA8775P interconnect: core: Add dynamic id allocation support interconnect: qcom: Add multidev EPSS L3 support interconnect: qcom: icc-rpmh: Add dynamic icc node id support interconnect: qcom: sa8775p: Add dynamic icc node id support Link: https://lore.kernel.org/r/20250415095343.32125-1-quic_rlaggysh@quicinc.com Signed-off-by: Georgi Djakov <djakov@kernel.org>
2025-05-19Documentation: ioctl-number: Update table introBagas Sanjaya1-3/+2
Introduction paragraph to the ioctl numbers table states that only ioctls in up to ancient Linux kernel version (v2.6.31) for x86 arch are listed. This is inaccurate as the table also lists ioctls from non-x86 archs and the kernel is continously developed (currently in v6.x). Update the paragraph accordingly. Signed-off-by: Bagas Sanjaya <bagasdotme@gmail.com> Signed-off-by: Jonathan Corbet <corbet@lwn.net> Message-ID: <20250508005838.8381-2-bagasdotme@gmail.com>
2025-05-19docs: conf.py: drop backward support for old Sphinx versionsMauro Carvalho Chehab1-97/+65
Since commit 5e25b972a22b ("docs: changes: update Python minimal version"), the minimal Sphinx version is 3.4.3. Drop support for older versions from the config file. Signed-off-by: Mauro Carvalho Chehab <mchehab+huawei@kernel.org> Signed-off-by: Jonathan Corbet <corbet@lwn.net> Message-ID: <20250507121117.317810-1-mchehab+huawei@kernel.org>
2025-05-19Docs: driver-api/basics: add kobject_event interfacesRandy Dunlap1-0/+3
Add the kernel-doc comments from lib/kobject_uevent.c to the "Kernel objects manipulation" section of driver API Basics. Signed-off-by: Randy Dunlap <rdunlap@infradead.org> Cc: Jonathan Corbet <corbet@lwn.net> Cc: linux-doc@vger.kernel.org Cc: Greg Kroah-Hartman <gregkh@linuxfoundation.org> Cc: Rafael J. Wysocki <rafael@kernel.org> Cc: Danilo Krummrich <dakr@kernel.org> Signed-off-by: Jonathan Corbet <corbet@lwn.net> Message-ID: <20250509005538.685678-1-rdunlap@infradead.org>
2025-05-19Docs: relay: editing cleanupsRandy Dunlap1-13/+13
Cleanup some punctuation, capital letter, and a missing word in relay.rst. Signed-off-by: Randy Dunlap <rdunlap@infradead.org> Cc: Jonathan Corbet <corbet@lwn.net> Cc: linux-doc@vger.kernel.org Cc: Andrew Morton <akpm@linux-foundation.org> Cc: Jens Axboe <axboe@kernel.dk> Cc: Tom Zanussi <tzanussi@gmail.com> Signed-off-by: Jonathan Corbet <corbet@lwn.net> Message-ID: <20250512023233.107582-1-rdunlap@infradead.org>
2025-05-19docs: fix "incase" typo in coresight/panic.rstHendrik Hamerlinck1-2/+2
Corrects a spelling mistake in Documentation/trace/coresight/panic.rst where "incase" was used instead of "in case". Signed-off-by: Hendrik Hamerlinck <hendrik.hamerlinck@hammernet.be> Signed-off-by: Jonathan Corbet <corbet@lwn.net> Message-ID: <20250513110931.15072-1-hendrik.hamerlinck@hammernet.be>
2025-05-19Documentation/driver-api: Update pcim_enable_device()Philipp Stanner1-1/+1
pcim_enable_device() is not related anymore to switching the mode of operation of any functions. It merely sets up a devres callback for automatically disabling the PCI device on driver detach. Adjust the function's documentation. Signed-off-by: Philipp Stanner <phasta@kernel.org> Signed-off-by: Krzysztof Wilczyński <kwilczynski@kernel.org> Reviewed-by: Kuppuswamy Sathyanarayanan <sathyanarayanan.kuppuswamy@linux.intel.com> Reviewed-by: Andy Shevchenko <andriy.shevchenko@linux.intel.com> Link: https://lore.kernel.org/r/20250519112959.25487-4-phasta@kernel.org
2025-05-19dt-bindings: can: microchip,mcp2510: Fix $id pathRob Herring (Arm)1-1/+1
The "$id" value must match the relative path under bindings/ and is missing the "net" sub-directory. Fixes: 09328600c2f9 ("dt-bindings: can: convert microchip,mcp251x.txt to yaml") Signed-off-by: "Rob Herring (Arm)" <robh@kernel.org> Acked-by: Conor Dooley <conor.dooley@microchip.com> Link: https://patch.msgid.link/20250507154201.1589542-1-robh@kernel.org Signed-off-by: Marc Kleine-Budde <mkl@pengutronix.de>
2025-05-19arm64: errata: Work around AmpereOne's erratum AC04_CPU_23D Scott Phillips1-0/+2
On AmpereOne AC04, updates to HCR_EL2 can rarely corrupt simultaneous translations for data addresses initiated by load/store instructions. Only instruction initiated translations are vulnerable, not translations from prefetches for example. A DSB before the store to HCR_EL2 is sufficient to prevent older instructions from hitting the window for corruption, and an ISB after is sufficient to prevent younger instructions from hitting the window for corruption. Signed-off-by: D Scott Phillips <scott@os.amperecomputing.com> Reviewed-by: Oliver Upton <oliver.upton@linux.dev> Acked-by: Catalin Marinas <catalin.marinas@arm.com> Link: https://lore.kernel.org/r/20250513184514.2678288-1-scott@os.amperecomputing.com Signed-off-by: Marc Zyngier <maz@kernel.org>
2025-05-19dt-bindings: mmc: spacemit,sdhci: add support for K1 SoCYixun Lan1-0/+53
Add support for the SD/eMMC Host Controller found in SpacemiT K1 SoC, The controller supports data transmission of MMC, SDIO, SD protocol. Reviewed-by: Rob Herring (Arm) <robh@kernel.org> Signed-off-by: Yixun Lan <dlan@gentoo.org> Link: https://lore.kernel.org/r/20250509-20-k1-sdhci-v3-1-526c35feaa20@gentoo.org Signed-off-by: Ulf Hansson <ulf.hansson@linaro.org>
2025-05-19Fix spelling error for 'parallel'Anish Dabhane1-1/+1
Signed-off-by: Anish Dabhane <anishdabhane71@gmail.com> Signed-off-by: Jonathan Corbet <corbet@lwn.net> Message-ID: <20250518140107.21310-1-anishdabhane71@gmail.com>
2025-05-19docs: admin-guide: fix typos in reporting-issues.rstShivam Sharma1-3/+3
Correct pin-point to pinpoint, If that the case to If that is the case, and its only slightly modified to it's only slightly modified in Documentation/admin-guide/reporting-issues.rst for proper spelling and grammar. Signed-off-by: Shivam Sharma <10sharmashivam@gmail.com> Acked-by: Thorsten Leemhuis <linux@leemhuis.info> Reviewed-by: Randy Dunlap <rdunlap@infradead.org> Signed-off-by: Jonathan Corbet <corbet@lwn.net> Message-ID: <20250518172658.6983-1-10sharmashivam@gmail.com>
2025-05-19ASoC: dt-bindings: qcom,sm8250: Add QCS9100 and QCS9075 sound cardMohammad Rafi Shaik1-0/+2
Document the bindings for the Qualcomm QCS9100 and QCS9075 board specific sound card. The bindings are the same as for other newer Qualcomm ADSP sound cards, thus keep them in existing qcom,sm8250.yaml file, even though Linux driver is separate. Signed-off-by: Mohammad Rafi Shaik <mohammad.rafi.shaik@oss.qualcomm.com> Link: https://patch.msgid.link/20250519083244.4070689-2-mohammad.rafi.shaik@oss.qualcomm.com Signed-off-by: Mark Brown <broonie@kernel.org>
2025-05-19dt-binding: mmc: microchip,sdhci-pic32: convert text based binding to json ↵Charan Pedumuru2-29/+66
schema Update text binding to YAML. Changes during conversion: Add appropriate include statements for interrupts and clock-names to resolve errors identified by `dt_binding_check` and `dtbs_check`. Signed-off-by: Charan Pedumuru <charan.pedumuru@gmail.com> Acked-by: Conor Dooley <conor.dooley@microchip.com> Link: https://lore.kernel.org/r/20250507-mchp-sdhci-v1-2-ed29de05295a@gmail.com Signed-off-by: Ulf Hansson <ulf.hansson@linaro.org>
2025-05-19KVM: arm64: Document NV caps and vcpu flagsMarc Zyngier1-1/+13
Describe the two new vcpu flags that control NV, together with the capabilities that advertise them. Reviewed-by: Oliver Upton <oliver.upton@linux.dev> Reviewed-by: Joey Gouly <joey.gouly@arm.com> Link: https://lore.kernel.org/r/20250514103501.2225951-18-maz@kernel.org Signed-off-by: Marc Zyngier <maz@kernel.org>
2025-05-19dt-bindings: crypto: Convert Marvell CESA to DT schemaRob Herring (Arm)3-76/+133
Convert the Marvell CESA binding to DT schema format. The marvell-cesa.txt and mv_cesa.txt are duplicate bindings. The clock properties are quite varied for each platform hence the if/then schemas. The old binding was fairly accurate with reality. The original binding didn't mention there is 1 interrupt per CESA engine. Based on users, there's a maximum of 2 engines. Signed-off-by: Rob Herring (Arm) <robh@kernel.org> Signed-off-by: Herbert Xu <herbert@gondor.apana.org.au>
2025-05-19dt-bindings: crypto: Convert img,hash-accelerator to DT schemaRob Herring (Arm)2-27/+69
Convert the Imagination Technologies hardware hash accelerator binding to DT schema format. It's a straight forward conversion. Signed-off-by: Rob Herring (Arm) <robh@kernel.org> Signed-off-by: Herbert Xu <herbert@gondor.apana.org.au>
2025-05-19dt-bindings: crypto: Convert hisilicon,hip0{6,7}-sec to DT schemaRob Herring (Arm)2-67/+134
Convert the HiSilicon HIP06/7 Security Accelerator binding to DT schema format. It's a straight forward conversion. Signed-off-by: Rob Herring (Arm) <robh@kernel.org> Signed-off-by: Herbert Xu <herbert@gondor.apana.org.au>
2025-05-19dt-bindings: crypto: Convert brcm,spum-crypto to DT schemaRob Herring (Arm)2-22/+44
Convert the Broadcom SPUM/SPU2 binding to DT schema format. It's a straight forward conversion. Signed-off-by: Rob Herring (Arm) <robh@kernel.org> Signed-off-by: Herbert Xu <herbert@gondor.apana.org.au>
2025-05-19dt-bindings: crypto: Convert axis,artpec6-crypto to DT schemaRob Herring (Arm)2-16/+39
Convert the Axis Crypto engine binding to DT schema format. It's a straight forward conversion. Signed-off-by: Rob Herring (Arm) <robh@kernel.org> Reviewed-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org> Signed-off-by: Herbert Xu <herbert@gondor.apana.org.au>
2025-05-19dt-bindings: crypto: Convert amd,ccp-seattle-v1a to DT schemaRob Herring (Arm)2-17/+38
Convert the AMD Cryptographic Coprocessor binding to DT schema format. It's a straight forward conversion. Signed-off-by: Rob Herring (Arm) <robh@kernel.org> Signed-off-by: Herbert Xu <herbert@gondor.apana.org.au>
2025-05-19dt-bindings: crypto: Drop obsolete mediatek,eip97-cryptoRob Herring (Arm)1-25/+0
The mediatek,eip97-crypto binding is half abandoned. The driver was dropped in 2020 as the Mediatek platforms use InsideSecure block and the driver for it. All the platforms except MT7623 were updated. A patch to update it was submitted, but never addressed the review comments. Link: https://lore.kernel.org/all/20210303080923.16761-1-vic.wu@mediatek.com/ Signed-off-by: Rob Herring (Arm) <robh@kernel.org> Signed-off-by: Herbert Xu <herbert@gondor.apana.org.au>
2025-05-19dt-bindings: crypto: fsl,sec-v4.0: Add fsl,sec-v6.0Rob Herring (Arm)2-158/+9
The fsl,sec-v6.0 binding is the same as the fsl,sec-v4.0 binding, so add it to the existing schema and drop the old .txt binding. The compatibles in the .txt binding don't match the 1 user. Follow the user for the schema. Signed-off-by: Rob Herring (Arm) <robh@kernel.org> Signed-off-by: Herbert Xu <herbert@gondor.apana.org.au>
2025-05-19crypto: qat - enable reporting of error counters for GEN6 devicesSuman Kumar Chakraborty1-4/+4
Enable the reporting of error counters through sysfs for QAT GEN6 devices and update the ABI documentation. This enables the reporting of the following: - errors_correctable - hardware correctable errors that allow the system to recover without data loss. - errors_nonfatal: errors that can be isolated to specific in-flight requests. - errors_fatal: errors that cannot be contained to a request, requiring a Function Level Reset (FLR) upon occurrence. Signed-off-by: Suman Kumar Chakraborty <suman.kumar.chakraborty@intel.com> Reviewed-by: Giovanni Cabiddu <giovanni.cabiddu@intel.com> Signed-off-by: Herbert Xu <herbert@gondor.apana.org.au>
2025-05-19Merge tag 'drm-msm-next-2025-05-16' of ↵Dave Airlie11-22/+755
https://gitlab.freedesktop.org/drm/msm into drm-next Updates for v6.16 CI: - uprev mesa GPU: - ACD (Adaptive Clock Distribution) support for X1-85. This is required enable the higher frequencies. - Drop fictional `address_space_size`. For some older devices, the address space size is limited to 4GB to avoid potential 64b rollover math problems in the fw. For these, an `ADRENO_QUIRK_4GB_VA` quirk is added. For everyone else we get the address space size from the SMMU `ias` (input address sizes), which is usually 48b. - Improve robustness when GMU HFI responses time out - Fix crash when throttling GPU immediately during boot - Fix for rgb565_predicator on Adreno 7c3 - Remove `MODULE_FIRMWARE()`s for GPU, the GPU can load the firmware after probe and having partial set of fw (ie. sqe+gmu but not zap) causes problems MDSS: - Added SAR2130P support to MDSS driver DPU: - Changed to use single CTL path for flushing on DPU 5.x+ - Improved SSPP allocation code to allow sharing of SSPP between planes - Enabled SmartDMA on SM8150, SC8180X, SC8280XP, SM8550 - Added SAR2130P support - Disabled DSC support on MSM8937, MSM8917, MSM8953, SDM660 - Misc fixes DP: - Switch to use new helpers for DP Audio / HDMI codec handling - Fixed LTTPR handling DSI: - Added support for SA8775P - Added SAR2130P support MDP4: - Fixed LCDC / LVDS controller on HDMI: - Switched to use new helpers for ACR data - Fixed old standing issue of HPD not working in some cases Signed-off-by: Dave Airlie <airlied@redhat.com> From: Rob Clark <robdclark@gmail.com> Link: https://lore.kernel.org/r/CAF6AEGv2Go+nseaEwRgeZbecet-h+Pf2oBKw1CobCF01xu2XVg@mail.gmail.com
2025-05-19Merge tag 'amd-drm-next-6.16-2025-05-16' of ↵Dave Airlie1-1/+1
https://gitlab.freedesktop.org/agd5f/linux into drm-next amdgpu: - Misc code cleanups - UserQ fixes - MALL reporting fix - DP AUX fixes - DCN 3.5 fixes - DP MST fixes - DC DMI quirks cleanup - RAS fixes - SR-IOV updates - GC 9.5 updates - Misc display fixes - VCN 4.0.5 powergating race fix - SMU 13.x updates - Paritioning fixes - VCN 5.0.1 SR-IOV updates - JPEG 5.0.1 SR-IOV updates amdkfd: - Fix spurious warning in interrupt code - XNACK fixes radeon: - CIK doorbell cleanup Signed-off-by: Dave Airlie <airlied@redhat.com> From: Alex Deucher <alexander.deucher@amd.com> Link: https://lore.kernel.org/r/20250516204609.2437472-1-alexander.deucher@amd.com
2025-05-19dt-bindings: riscv: sophgo: Add SG2044 compatible stringInochi Amaoto1-0/+4
Add compatible string for the Sophgo SG2044 SoC and the SRD3-10 board. Acked-by: Rob Herring (Arm) <robh@kernel.org> Reviewed-by: Chen Wang <unicorn_wang@outlook.com> Link: https://lore.kernel.org/r/20250413223507.46480-10-inochiama@gmail.com Signed-off-by: Inochi Amaoto <inochiama@gmail.com> Signed-off-by: Chen Wang <unicorn_wang@outlook.com> Signed-off-by: Chen Wang <wangchen20@iscas.ac.cn>
2025-05-19dt-bindings: interrupt-controller: Add Sophgo SG2044 PLICInochi Amaoto1-0/+1
The SG2044 implement a standard T-HEAD C900 PLIC, which is already supported by the kernel. Add compatible string for Sophgo SG2044 plic. Acked-by: Rob Herring (Arm) <robh@kernel.org> Link: https://lore.kernel.org/r/20250413223507.46480-5-inochiama@gmail.com Signed-off-by: Inochi Amaoto <inochiama@gmail.com> Signed-off-by: Chen Wang <unicorn_wang@outlook.com> Signed-off-by: Chen Wang <wangchen20@iscas.ac.cn>
2025-05-19dt-bindings: interrupt-controller: Add Sophgo SG2044 CLINT mswiInochi Amaoto1-0/+1
As SG2044 also implements an enhanced ACLINT as SG2042, add necessary compatible string for SG2044 SoC. Acked-by: Rob Herring (Arm) <robh@kernel.org> Link: https://lore.kernel.org/r/20250413223507.46480-4-inochiama@gmail.com Signed-off-by: Inochi Amaoto <inochiama@gmail.com> Signed-off-by: Chen Wang <unicorn_wang@outlook.com> Signed-off-by: Chen Wang <wangchen20@iscas.ac.cn>
2025-05-17x86/mm/64: Make 5-level paging support unconditionalKirill A. Shutemov2-14/+3
Both Intel and AMD CPUs support 5-level paging, which is expected to become more widely adopted in the future. All major x86 Linux distributions have the feature enabled. Remove CONFIG_X86_5LEVEL and related #ifdeffery for it to make it more readable. Suggested-by: Borislav Petkov <bp@alien8.de> Signed-off-by: Kirill A. Shutemov <kirill.shutemov@linux.intel.com> Signed-off-by: Ingo Molnar <mingo@kernel.org> Reviewed-by: Ard Biesheuvel <ardb@kernel.org> Reviewed-by: Borislav Petkov (AMD) <bp@alien8.de> Cc: Dave Hansen <dave.hansen@linux.intel.com> Cc: H. Peter Anvin <hpa@zytor.com> Cc: Linus Torvalds <torvalds@linux-foundation.org> Link: https://lore.kernel.org/r/20250516123306.3812286-4-kirill.shutemov@linux.intel.com
2025-05-17netlink: specs: rt-link: add C naming info for ovpnJakub Kicinski1-0/+4
C naming info for OVPN which was added since I adjusted the existing attrs. Also add missing reference to a header needed for a bridge struct. Reviewed-by: Donald Hunter <donald.hunter@gmail.com> Link: https://patch.msgid.link/20250515231650.1325372-2-kuba@kernel.org Signed-off-by: Jakub Kicinski <kuba@kernel.org>
2025-05-16irqdomain: Fix kernel-doc and add it to DocumentationJiri Slaby (SUSE)2-2/+20
irqdomain.c's kernel-doc exists, but is not plugged into Documentation/ yet. Before plugging it in, fix it first: irq_domain_get_irq_data() and irq_domain_set_info() were documented twice. Identically, by both definitions for CONFIG_IRQ_DOMAIN_HIERARCHY and !CONFIG_IRQ_DOMAIN_HIERARCHY. Therefore, switch the second kernel-doc into an ordinary comment -- change "/**" to simple "/*". This avoids sphinx's: WARNING: Duplicate C declaration Next, in commit b7b377332b96 ("irqdomain: Fix the kernel-doc and plug it into Documentation"), irqdomain.h's (header) kernel-doc was added into core-api/genericirq.rst. But given the amount of irqdomain functions and structures, move all these to core-api/irq/irq-domain.rst now. Finally, add these newly fixed irqdomain.c's (source) docs there as well. Signed-off-by: Jiri Slaby (SUSE) <jirislaby@kernel.org> Signed-off-by: Thomas Gleixner <tglx@linutronix.de> Link: https://lore.kernel.org/all/20250319092951.37667-58-jirislaby@kernel.org
2025-05-16Documentation: irqdomain: Update itJiri Slaby (SUSE)1-48/+74
The irqdomain documentaion became obsolete over time. Update and extend it a bit with respect to the current code and HW. Most notably the doubled documentation of irq_domain (from .rst and .h) was unified and let only in .rst. A reference link was added to .h. Furthermore: * Add some 'struct' keywords, so that the respective structs are hyperlinked * :c:member: use where appropriate to mark a member of a struct * Rephrase some wording to improve readability/understanding Signed-off-by: Jiri Slaby (SUSE) <jirislaby@kernel.org> Signed-off-by: Thomas Gleixner <tglx@linutronix.de> Link: https://lore.kernel.org/all/20250319092951.37667-57-jirislaby@kernel.org
2025-05-16Documentation: irq-domain.rst: Simple improvementsJiri Slaby (SUSE)1-11/+11
The improvements include: * Capitals in headlines. * Add commas: for easier reading, it is always desired to add commas at some places in text. Like before adverbs or after fronted sentences. * 3rd person -> add 's' to verbs. * End some sentences with period and start a new one. Avoid thus heavy sentences. [ tglx: Fix up subject prefix ] Signed-off-by: Jiri Slaby (SUSE) <jirislaby@kernel.org> Signed-off-by: Thomas Gleixner <tglx@linutronix.de> Link: https://lore.kernel.org/all/20250319092951.37667-56-jirislaby@kernel.org
2025-05-16Documentation: irq/concepts: Minor improvementsJiri Slaby (SUSE)1-5/+7
Just note in the docs: 1) A PCI device as an example for shared interrupts 2) A sparse tree can be used for interrupts too 3) i8259s which have 8 pins [ tglx: Fix up subject prefix ] Signed-off-by: Jiri Slaby (SUSE) <jirislaby@kernel.org> Signed-off-by: Thomas Gleixner <tglx@linutronix.de> Link: https://lore.kernel.org/all/20250319092951.37667-55-jirislaby@kernel.org