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2022-10-18dt-bindings: pinctrl: qcom,mdm9607: drop ref to pinctrl.yamlKrzysztof Kozlowski1-1/+0
The binding references common Qualcomm TLMM pin controller schema, which references pinctrl.yaml. Acked-by: Rob Herring <robh@kernel.org> Acked-by: Linus Walleij <linus.walleij@linaro.org> Link: https://lore.kernel.org/r/20221017230012.47878-2-krzysztof.kozlowski@linaro.org Signed-off-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org>
2022-10-18dt-bindings: pinctrl: qcom,ipq6018: replace maintainerKrzysztof Kozlowski1-1/+1
Emails to codeaurora.org bounce ("Recipient address rejected: undeliverable address: No such user here."). Acked-by: Rob Herring <robh@kernel.org> Link: https://lore.kernel.org/r/20220924081312.15068-1-krzysztof.kozlowski@linaro.org Signed-off-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org>
2022-10-18dt-bindings: pinctrl: qcom,sc7280: use common TLMM pin schemaKrzysztof Kozlowski1-16/+2
The common Qualcomm TLMM pin controller schema for pin mux and config already brings requirement of function for gpio pins and the definition of drive-strength. Acked-by: Rob Herring <robh@kernel.org> Link: https://lore.kernel.org/r/20221016172212.49105-18-krzysztof.kozlowski@linaro.org Signed-off-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org>
2022-10-18dt-bindings: pinctrl: qcom,sc7280: add bias-bus-hold and input-enableKrzysztof Kozlowski1-4/+2
The SC7280 pinctrl driver supports bias-bus-hold and input-enable, and DTS already use it (sc7280-idp). Acked-by: Rob Herring <robh@kernel.org> Reviewed-by: Bjorn Andersson <andersson@kernel.org> Link: https://lore.kernel.org/r/20221016172212.49105-17-krzysztof.kozlowski@linaro.org Signed-off-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org>
2022-10-18dt-bindings: pinctrl: qcom,sc7280: correct number of GPIOsKrzysztof Kozlowski1-3/+3
SC7280 has 175 GPIOs (gpio0-174), so correct size of gpio-line-names and narrow the pattern for matching pin names. Acked-by: Rob Herring <robh@kernel.org> Reviewed-by: Bjorn Andersson <andersson@kernel.org> Link: https://lore.kernel.org/r/20221016172212.49105-16-krzysztof.kozlowski@linaro.org Signed-off-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org>
2022-10-18dt-bindings: pinctrl: qcom,sm8250: add input-enableKrzysztof Kozlowski1-0/+1
The SM8250 pinctrl driver supports input-enable and DTS already use it (sm8250-sony-xperia-edo-pdx203). Acked-by: Rob Herring <robh@kernel.org> Reviewed-by: Bjorn Andersson <andersson@kernel.org> Link: https://lore.kernel.org/r/20221016172212.49105-15-krzysztof.kozlowski@linaro.org Signed-off-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org>
2022-10-18dt-bindings: pinctrl: qcom,sm8250: fix matching pin configKrzysztof Kozlowski1-55/+62
The TLMM pin controller follows generic pin-controller bindings, so should have subnodes with '-state' and '-pins'. Otherwise the subnodes (level one and two) are not properly matched. This method also unifies the bindings with other Qualcomm TLMM and LPASS pinctrl bindings. The change causes indentation decrement, so the diff-hunk looks big, but there are no functional changes in the subnode "properties" section. The only difference there is removal of blank lines between common GPIO pinconf properties. Acked-by: Rob Herring <robh@kernel.org> Reviewed-by: Bjorn Andersson <andersson@kernel.org> Link: https://lore.kernel.org/r/20221016172212.49105-14-krzysztof.kozlowski@linaro.org Signed-off-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org>
2022-10-18dt-bindings: pinctrl: qcom,sm8250: use common TLMM pin schemaKrzysztof Kozlowski1-17/+2
The common Qualcomm TLMM pin controller schema for pin mux and config already brings requirement of function for gpio pins and the definition of drive-strength. Acked-by: Rob Herring <robh@kernel.org> Reviewed-by: Bjorn Andersson <andersson@kernel.org> Link: https://lore.kernel.org/r/20221016172212.49105-13-krzysztof.kozlowski@linaro.org Signed-off-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org>
2022-10-18dt-bindings: pinctrl: qcom,sm8250: add gpio-reserved-ranges and gpio-line-namesKrzysztof Kozlowski1-0/+7
Document common GPIO properties (gpio-reserved-ranges and gpio-line-names), already used on qrb5165-rb5 board. Acked-by: Rob Herring <robh@kernel.org> Reviewed-by: Konrad Dybcio <konrad.dybcio@somainline.org> Reviewed-by: Bjorn Andersson <andersson@kernel.org> Link: https://lore.kernel.org/r/20221016172212.49105-12-krzysztof.kozlowski@linaro.org Signed-off-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org>
2022-10-18dt-bindings: memory: renesas,rpc-if: Document R-Car V4H supportHai Pham1-0/+5
Document support for the SPI Multi I/O Bus Controller (RPC-IF) in the R-Car V4H SoC. Signed-off-by: Hai Pham <hai.pham.ud@renesas.com> Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be> Reviewed-by: Wolfram Sang <wsa+renesas@sang-engineering.com> Reviewed-by: Rob Herring <robh@kernel.org> Link: https://lore.kernel.org/r/c268cb4497cbe79773bb6568f36c37adc6fb5bbe.1665582645.git.geert+renesas@glider.be Signed-off-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org>
2022-10-18dt-bindings: clock: Convert pwm-clock to DT schemaRob Herring2-26/+45
Convert the pwm-clock binding to DT schema format. A straight-forward conversion. Reviewed-by: Stephen Boyd <sboyd@kernel.org> Reviewed-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org> Link: https://lore.kernel.org/r/20221011162919.3025038-1-robh@kernel.org Signed-off-by: Rob Herring <robh@kernel.org>
2022-10-18dt-bindings: misc: Convert IDT 89HPESx to DT schemaRob Herring2-44/+72
Convert the IDT 89HPESx device binding to DT schema format. "onsemi,24c64" was not a documented compatible string, so update the example to "atmel,24c64". It's not clear what's in use here as no upstream dts files have the eeprom child node. Acked-by: Serge Semin <fancer.lancer@gmail.com> Link: https://lore.kernel.org/r/20221005212631.122145-1-robh@kernel.org Signed-off-by: Rob Herring <robh@kernel.org>
2022-10-18dt-bindings: ufs: cdns,ufshc: add missing dma-coherent fieldMatt Ranostay1-0/+2
Add missing dma-coherent property to schema which avoids the following warnings ufs-wrapper@4e80000: ufs@4e84000: Unevaluated properties are not allowed ('dma-coherent' was unexpected) Signed-off-by: Matt Ranostay <mranostay@ti.com> Link: https://lore.kernel.org/r/20221013194559.128643-1-mranostay@ti.com Signed-off-by: Rob Herring <robh@kernel.org>
2022-10-18dt-bindings: display: panel: use spi-peripheral-props.yamlKrzysztof Kozlowski7-8/+12
For devices connectable by SPI bus (e.g. already using "spi-max-frequency" property), reference the "spi-peripheral-props.yaml" schema to allow using all SPI device properties, even these which device bindings author did not tried yet. Change "additionalProperties" to "unevaluatedProperties", so the actual other properties from "spi-peripheral-props.yaml" can be used. This has additional impact of allowing also other properties from panel-common.yaml to be used. Signed-off-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org> Link: https://lore.kernel.org/r/20221004120907.72767-1-krzysztof.kozlowski@linaro.org Signed-off-by: Rob Herring <robh@kernel.org>
2022-10-18Merge drm/drm-next into drm-misc-nextMaxime Ripard1290-9510/+26773
Let's kick-off this release cycle. Signed-off-by: Maxime Ripard <maxime@cerno.tech>
2022-10-18Documentation: document ublk user recovery featureZiyangZhang1-0/+36
Add documentation for user recovery feature of ublk subsystem. Signed-off-by: ZiyangZhang <ZiyangZhang@linux.alibaba.com> Reviewed-by: Ming Lei <ming.lei@redhat.com> Link: https://lore.kernel.org/r/20221018045346.99706-2-ZiyangZhang@linux.alibaba.com Signed-off-by: Jens Axboe <axboe@kernel.dk>
2022-10-18ASoC: add devicetree support for WM8961 codecMark Brown1-0/+40
Merge series from Doug Brown <doug@schmorgal.com>: This series adds devicetree support for the Wolfson WM8961 codec. The first patch adds a schema, the second patch hooks it up in the code, and the third patch allows it to be selected in Kconfig.
2022-10-18Create a new sound card to access MICFIL based on rpmsg channelMark Brown1-2/+34
Merge series from Chancel Liu <chancel.liu@nxp.com>: At a previous time, we have successfully created a virtual sound card based on rpmsg. The sound card works under this mechanism Cortex-A core tells the Cortex-M core the format, rate, channel, .etc configuration of the PCM parameters and Cortex-M controls real hardware devices such as SAI and DMA. From the view of Linux side, the sound card is bound to a rpmsg channel through which it can access SAI. Here these patches are introduced to create a new virtual sound card to access MICFIL based on a new created rpmsg channel. It's easy to create a new rpmsg channel for MICFIL through rpmsg name service announcment. Also the other ASoC components bound to this rpmsg MICFIL sound card will be registered with these patches. If other sound cards using different hardware devices needs to be created over rpmsg in the future, these patches can be referred.
2022-10-18dt-bindings: mtd: rockchip: add rockchip,rk3128-nfcJohan Jonker1-1/+3
Add rockchip,rk3128-nfc compatible string. Signed-off-by: Johan Jonker <jbx6244@gmail.com> Acked-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org> Signed-off-by: Miquel Raynal <miquel.raynal@bootlin.com> Link: https://lore.kernel.org/linux-mtd/f09665c1-9938-38c1-9a31-f196a3ef9cf0@gmail.com
2022-10-18attr: use consistent sgid stripping checksChristian Brauner1-1/+1
Currently setgid stripping in file_remove_privs()'s should_remove_suid() helper is inconsistent with other parts of the vfs. Specifically, it only raises ATTR_KILL_SGID if the inode is S_ISGID and S_IXGRP but not if the inode isn't in the caller's groups and the caller isn't privileged over the inode although we require this already in setattr_prepare() and setattr_copy() and so all filesystem implement this requirement implicitly because they have to use setattr_{prepare,copy}() anyway. But the inconsistency shows up in setgid stripping bugs for overlayfs in xfstests (e.g., generic/673, generic/683, generic/685, generic/686, generic/687). For example, we test whether suid and setgid stripping works correctly when performing various write-like operations as an unprivileged user (fallocate, reflink, write, etc.): echo "Test 1 - qa_user, non-exec file $verb" setup_testfile chmod a+rws $junk_file commit_and_check "$qa_user" "$verb" 64k 64k The test basically creates a file with 6666 permissions. While the file has the S_ISUID and S_ISGID bits set it does not have the S_IXGRP set. On a regular filesystem like xfs what will happen is: sys_fallocate() -> vfs_fallocate() -> xfs_file_fallocate() -> file_modified() -> __file_remove_privs() -> dentry_needs_remove_privs() -> should_remove_suid() -> __remove_privs() newattrs.ia_valid = ATTR_FORCE | kill; -> notify_change() -> setattr_copy() In should_remove_suid() we can see that ATTR_KILL_SUID is raised unconditionally because the file in the test has S_ISUID set. But we also see that ATTR_KILL_SGID won't be set because while the file is S_ISGID it is not S_IXGRP (see above) which is a condition for ATTR_KILL_SGID being raised. So by the time we call notify_change() we have attr->ia_valid set to ATTR_KILL_SUID | ATTR_FORCE. Now notify_change() sees that ATTR_KILL_SUID is set and does: ia_valid = attr->ia_valid |= ATTR_MODE attr->ia_mode = (inode->i_mode & ~S_ISUID); which means that when we call setattr_copy() later we will definitely update inode->i_mode. Note that attr->ia_mode still contains S_ISGID. Now we call into the filesystem's ->setattr() inode operation which will end up calling setattr_copy(). Since ATTR_MODE is set we will hit: if (ia_valid & ATTR_MODE) { umode_t mode = attr->ia_mode; vfsgid_t vfsgid = i_gid_into_vfsgid(mnt_userns, inode); if (!vfsgid_in_group_p(vfsgid) && !capable_wrt_inode_uidgid(mnt_userns, inode, CAP_FSETID)) mode &= ~S_ISGID; inode->i_mode = mode; } and since the caller in the test is neither capable nor in the group of the inode the S_ISGID bit is stripped. But assume the file isn't suid then ATTR_KILL_SUID won't be raised which has the consequence that neither the setgid nor the suid bits are stripped even though it should be stripped because the inode isn't in the caller's groups and the caller isn't privileged over the inode. If overlayfs is in the mix things become a bit more complicated and the bug shows up more clearly. When e.g., ovl_setattr() is hit from ovl_fallocate()'s call to file_remove_privs() then ATTR_KILL_SUID and ATTR_KILL_SGID might be raised but because the check in notify_change() is questioning the ATTR_KILL_SGID flag again by requiring S_IXGRP for it to be stripped the S_ISGID bit isn't removed even though it should be stripped: sys_fallocate() -> vfs_fallocate() -> ovl_fallocate() -> file_remove_privs() -> dentry_needs_remove_privs() -> should_remove_suid() -> __remove_privs() newattrs.ia_valid = ATTR_FORCE | kill; -> notify_change() -> ovl_setattr() // TAKE ON MOUNTER'S CREDS -> ovl_do_notify_change() -> notify_change() // GIVE UP MOUNTER'S CREDS // TAKE ON MOUNTER'S CREDS -> vfs_fallocate() -> xfs_file_fallocate() -> file_modified() -> __file_remove_privs() -> dentry_needs_remove_privs() -> should_remove_suid() -> __remove_privs() newattrs.ia_valid = attr_force | kill; -> notify_change() The fix for all of this is to make file_remove_privs()'s should_remove_suid() helper to perform the same checks as we already require in setattr_prepare() and setattr_copy() and have notify_change() not pointlessly requiring S_IXGRP again. It doesn't make any sense in the first place because the caller must calculate the flags via should_remove_suid() anyway which would raise ATTR_KILL_SGID. While we're at it we move should_remove_suid() from inode.c to attr.c where it belongs with the rest of the iattr helpers. Especially since it returns ATTR_KILL_S{G,U}ID flags. We also rename it to setattr_should_drop_suidgid() to better reflect that it indicates both setuid and setgid bit removal and also that it returns attr flags. Running xfstests with this doesn't report any regressions. We should really try and use consistent checks. Reviewed-by: Amir Goldstein <amir73il@gmail.com> Signed-off-by: Christian Brauner (Microsoft) <brauner@kernel.org>
2022-10-18Revert "dt-bindings: pinctrl-zynqmp: Add output-enable configuration"Sai Krishna Potthuri1-4/+0
This reverts commit 133ad0d9af99bdca90705dadd8d31c20bfc9919f. On systems with older PMUFW (Xilinx ZynqMP Platform Management Firmware) using these pinctrl properties can cause system hang because there is missing feature autodetection. When this feature is implemented, support for these two properties should bring back. Cc: stable@vger.kernel.org Signed-off-by: Sai Krishna Potthuri <sai.krishna.potthuri@amd.com> Acked-by: Michal Simek <michal.simek@amd.com> Link: https://lore.kernel.org/r/20221017130303.21746-3-sai.krishna.potthuri@amd.com Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
2022-10-18dt-bindings: qcom: document preferred compatible namingKrzysztof Kozlowski1-0/+65
Compatibles can come in two formats. Either "vendor,ip-soc" or "vendor,soc-ip". Qualcomm bindings were mixing both of usages, so add a DT schema file documenting preferred policy and enforcing it for all new compatibles, except few existing patterns. Signed-off-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org> Reviewed-by: Rob Herring <robh@kernel.org> Reviewed-by: Dmitry Baryshkov <dmitry.baryshkov@linaro.org> Reviewed-by: Bhupesh Sharma <bhupesh.sharma@linaro.org> Reviewed-by: Bjorn Andersson <andersson@kernel.org> Signed-off-by: Bjorn Andersson <andersson@kernel.org> Link: https://lore.kernel.org/r/20220928152501.490840-1-krzysztof.kozlowski@linaro.org
2022-10-18dt-bindings: arm: qcom: Add Xiaomi Poco F1 EBBG variant bindingsJoel Selvaraj1-0/+1
Add documentation for "xiaomi,beryllium-ebbg" device. Signed-off-by: Joel Selvaraj <joelselvaraj.oss@gmail.com> Acked-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org> Signed-off-by: Bjorn Andersson <andersson@kernel.org> Link: https://lore.kernel.org/r/20220909035447.36674-3-joelselvaraj.oss@gmail.com
2022-10-18dt-bindings: arm: qcom: Document additional skus for sc7180 pazquel360Yunlong Jia1-0/+11
pazquel360 is an extension project based on pazquel. We create 3 sku on pazquel360: sku 20 for LTE with physical SIM _and_ eSIM and WiFi sku 21 for WiFi only sku 22 for LTE with only a physical SIM Both sku20 and sku22 are LTE SKUs. One has the eSIM stuffed and one doesn't. There is a single shared device tree for the two. Signed-off-by: Yunlong Jia <yunlong.jia@ecs.corp-partner.google.com> Acked-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org> Reviewed-by: Douglas Anderson <dianders@chromium.org> Signed-off-by: Bjorn Andersson <andersson@kernel.org> Link: https://lore.kernel.org/r/20220901024827.v3.1.I3aa360986c0e7377ea5e96c116f014ff1ab8c968@changeid
2022-10-18dt-bindings: soc: qcom: aoss: Add sc8280xp compatibleLuca Weiss1-0/+1
Document the aoss-qmp compatible for sc8280xp. Signed-off-by: Luca Weiss <luca@z3ntu.xyz> Reviewed-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org> Signed-off-by: Bjorn Andersson <andersson@kernel.org> Link: https://lore.kernel.org/r/20221016090035.565350-4-luca@z3ntu.xyz
2022-10-18dt-bindings: firmware: document Qualcomm SM6375 SCMKonrad Dybcio1-0/+2
Document the compatible for Qualcomm SM6375 SCM. SCM consumes a single clock (core / RPM_SMD_CE1_CLK), though it does not matter whether Linux enables it, as one of the billion levels of firmware ensures it's on anyway. Still, mark it as used for the sake of correctness. Signed-off-by: Konrad Dybcio <konrad.dybcio@somainline.org> Reviewed-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org> Signed-off-by: Bjorn Andersson <andersson@kernel.org> Link: https://lore.kernel.org/r/20221015115535.150037-1-konrad.dybcio@somainline.org
2022-10-18dt-bindings: pinctrl: qcom,sdm630: convert to dtschemaKrzysztof Kozlowski2-191/+188
Convert Qualcomm SDM630 and SDM660 pin controller bindings to DT schema. Keep the parsing of pin configuration subnodes consistent with other Qualcomm schemas (children named with '-state' suffix, their children with '-pins'). Reviewed-by: Rob Herring <robh@kernel.org> Reviewed-by: Bjorn Andersson <andersson@kernel.org> Link: https://lore.kernel.org/r/20221011190231.76784-4-krzysztof.kozlowski@linaro.org Signed-off-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org>
2022-10-18dt-bindings: pinctrl: qcom,sdm845: convert to dtschemaKrzysztof Kozlowski2-176/+158
Convert Qualcomm SDM845 pin controller bindings to DT schema. Keep the parsing of pin configuration subnodes consistent with other Qualcomm schemas (children named with '-state' suffix, their children with '-pins'). Reviewed-by: Rob Herring <robh@kernel.org> Link: https://lore.kernel.org/r/20220930200529.331223-3-krzysztof.kozlowski@linaro.org Signed-off-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org>
2022-10-18dt-bindings: arm: qcom: Document samsung,matisse-wifi deviceMatti Lehtimäki1-0/+1
Add binding documentation for Samsung Galaxy Tab 4 10.1 (2014) wifi tablet which is based on Snapdragon 400 (apq8026) SoC. Signed-off-by: Matti Lehtimäki <matti.lehtimaki@gmail.com> Acked-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org> Signed-off-by: Bjorn Andersson <andersson@kernel.org> Link: https://lore.kernel.org/r/20220927214940.244480-3-matti.lehtimaki@gmail.com
2022-10-18dma-buf: Document dynamic locking conventionDmitry Osipenko1-0/+6
Add documentation for the dynamic locking convention. The documentation tells dma-buf API users when they should take the reservation lock and when not. Acked-by: Sumit Semwal <sumit.semwal@linaro.org> Reviewed-by: Christian König <christian.koenig@amd.com> Signed-off-by: Dmitry Osipenko <dmitry.osipenko@collabora.com> Link: https://patchwork.freedesktop.org/patch/msgid/20221017172229.42269-20-dmitry.osipenko@collabora.com
2022-10-18dt-bindings: hwlock: qcom-hwspinlock: add syscon to MSM8974Krzysztof Kozlowski1-1/+5
The TCSR_MUTEX region contains two set of registers: mutex and halt. Add syscon, so the TCSR mutex device (hwspinlock) can use MMIO based method and in the same time share regmap with other devices for the halt regs. Signed-off-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org> Acked-by: Rob Herring <robh@kernel.org> Tested-by: Luca Weiss <luca@z3ntu.xyz> # fairphone-fp2 Signed-off-by: Bjorn Andersson <andersson@kernel.org> Link: https://lore.kernel.org/r/20220920150414.637634-2-krzysztof.kozlowski@linaro.org
2022-10-18dt-bindings: memory-controller: st,stm32: Fix ↵Marek Vasut1-1/+1
st,fmc2_ebi-cs-write-address-setup-ns The property st,fmc2_ebi-cs-write-address-setup-ns should really be st,fmc2-ebi-cs-write-address-setup-ns (there is underscore _ between fmc2 and ebi and there should be a dash - instead). This is a remnant from conversion of old non-upstream bindings. Fix it. Signed-off-by: Marek Vasut <marex@denx.de> Acked-by: Rob Herring <robh@kernel.org> Signed-off-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org> Link: https://lore.kernel.org/r/20220926222003.527171-1-marex@denx.de
2022-10-18dt-bindings: pinctrl: convert qcom,mdm9615-pinctrl.txt to dt-schemaNeil Armstrong2-161/+119
Convert the MDM9515 pinctrl bindings to dt-schema. Keep the parsing of pin configuration subnodes consistent with other Qualcomm schemas (children named with '-state' suffix, optional children with '-pins'). Signed-off-by: Neil Armstrong <neil.armstrong@linaro.org> Reviewed-by: Rob Herring <robh@kernel.org> Acked-by: Linus Walleij <linus.walleij@linaro.org> Link: https://lore.kernel.org/r/20221005-mdm9615-pinctrl-yaml-v2-1-639fe67a04be@linaro.org [krzk: drop function from required] Signed-off-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org>
2022-10-17dt-bindings: arm: qcom: separate msm8996pro bindingsDmitry Baryshkov1-0/+5
Xiaomi Mi 5s Plus (natrium) and Xiaomi Mi Note 2 (scorpio) use MSM8996Pro rather than plain MSM8996. Describe this in the arm/qcom.yaml bindings. Since MSM8996Pro is largely compatible with MSM8996, keep old compatible too rather than insiting on qcom,msm8996pro only. This allows the code that doesn't yet know about msm8996pro to continue supporting these devices. Signed-off-by: Dmitry Baryshkov <dmitry.baryshkov@linaro.org> Reviewed-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org> Signed-off-by: Bjorn Andersson <andersson@kernel.org> Link: https://lore.kernel.org/r/20220724140421.1933004-2-dmitry.baryshkov@linaro.org
2022-10-17dt-bindings: soc: qcom: qcom,smd-rpm: Add a compatible for SM6375Konrad Dybcio1-0/+1
Document the compatible for SM6375. Signed-off-by: Konrad Dybcio <konrad.dybcio@somainline.org> Acked-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org> Signed-off-by: Bjorn Andersson <andersson@kernel.org> Link: https://lore.kernel.org/r/20220921004534.151990-1-konrad.dybcio@somainline.org
2022-10-17dt-bindings: soc: qcom: smd-rpm: add qcom,glink-channelsKrzysztof Kozlowski1-4/+17
The Qualcomm Resource Power Manager (RPM) over SMD bindings contain compatibles and description for RPM devices on two different communication channels: SMD and GLINK. Except the difference in the parent node, they use different properties for describing name of channel qcom,smd-channels or qcom,glink-channels. The first one is already present but second is missing: qcom/sm6125-sony-xperia-seine-pdx201.dtb: rpm-requests: 'qcom,glink-channels' does not match any of the regexes: '^regulators(-[01])?$', 'pinctrl-[0-9]+' Signed-off-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org> Acked-by: Rob Herring <robh@kernel.org> Signed-off-by: Bjorn Andersson <andersson@kernel.org> Link: https://lore.kernel.org/r/20220926092104.111449-2-krzysztof.kozlowski@linaro.org
2022-10-17dt-bindings: soc: qcom: smd-rpm: add PMIC regulators nodesKrzysztof Kozlowski1-0/+5
The Qualcomm RPM over SMD contains devices for one or two PMIC regulators - already used in several DTS files. Signed-off-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org> Acked-by: Rob Herring <robh@kernel.org> Signed-off-by: Bjorn Andersson <andersson@kernel.org> Link: https://lore.kernel.org/r/20220926092104.111449-1-krzysztof.kozlowski@linaro.org
2022-10-17dt-bindings: power: rpmpd: add sdm670 power domainsRichard Acayan1-0/+1
Add the RPMh power domain IDs and compatible string for Snapdragon 670 to make SDM670 power domains accessible to the device trees. Signed-off-by: Richard Acayan <mailingradian@gmail.com> Acked-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org> Signed-off-by: Bjorn Andersson <andersson@kernel.org> Link: https://lore.kernel.org/r/20221004221130.14076-2-mailingradian@gmail.com
2022-10-17dt-bindings: arm: qcom: document qcom,msm-id and qcom,board-idKrzysztof Kozlowski1-0/+120
The top level qcom,msm-id and qcom,board-id properties are utilized by bootloaders on Qualcomm MSM platforms to determine which device tree should be used and passed to the kernel. The commit b32e592d3c28 ("devicetree: bindings: Document qcom board compatible format") from 2015 was a consensus during discussion about upstreaming qcom,msm-id and qcom,board-id fields. There are however still problems with that consensus: 1. It was reached 7 years ago but it turned out its implementation did not reach all possible products. 2. Initially additional tool (dtbTool) was needed for parsing these fields to create a QCDT image consisting of multiple DTBs, later the bootloaders were improved and they use these qcom,msm-id and qcom,board-id properties directly. 3. Extracting relevant information from the board compatible requires this additional tool (dtbTool), which makes the build process more complicated and not easily reproducible (DTBs are modified after the kernel build). 4. Some versions of Qualcomm bootloaders expect these properties even when booting with a single DTB. The community is stuck with these bootloaders thus they require properties in the DTBs. Since several upstreamed Qualcomm SoC-based boards require these properties to properly boot and the properties are reportedly used by bootloaders, document them along with the bindings header with constants used by: bootloader, some DTS and socinfo driver. Link: https://lore.kernel.org/r/a3c932d1-a102-ce18-deea-18cbbd05ecab@linaro.org/ Co-developed-by: Kumar Gala <galak@codeaurora.org> Signed-off-by: Kumar Gala <galak@codeaurora.org> Signed-off-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org> Reviewed-by: Dmitry Baryshkov <dmitry.baryshkov@linaro.org> Reviewed-by: Rob Herring <robh@kernel.org> Signed-off-by: Bjorn Andersson <andersson@kernel.org> Link: https://lore.kernel.org/r/20220830065744.161163-2-krzysztof.kozlowski@linaro.org
2022-10-17dt-bindings: pinctrl: qcom,sc8280xp: fix indentation in example (remaining ↵Krzysztof Kozlowski1-2/+2
piece) Bindings example should be indented with 4-spaces. Previous adjustment missefd one spot. Reviewed-by: Bjorn Andersson <andersson@kernel.org> Reviewed-by: Rob Herring <robh@kernel.org> Link: https://lore.kernel.org/r/20221016170035.35014-35-krzysztof.kozlowski@linaro.org Signed-off-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org>
2022-10-17dt-bindings: pinctrl: qcom,sc7280: fix matching pin configKrzysztof Kozlowski1-3/+11
The TLMM pin controller follows generic pin-controller bindings, so should have subnodes with '-state' and '-pins'. Otherwise the subnodes (level one and two) are not properly matched. This method also unifies the bindings with other Qualcomm TLMM and LPASS pinctrl bindings. Reviewed-by: Bjorn Andersson <andersson@kernel.org> Reviewed-by: Rob Herring <robh@kernel.org> Link: https://lore.kernel.org/r/20221016170035.35014-34-krzysztof.kozlowski@linaro.org Signed-off-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org>
2022-10-17dt-bindings: pinctrl: qcom,sdx65: use common TLMM schemaKrzysztof Kozlowski1-34/+8
Reference common Qualcomm TLMM pin controller schema, to bring common properties, other pinctrl schemas and additional checks, like function required only for GPIOs. Reviewed-by: Bjorn Andersson <andersson@kernel.org> Reviewed-by: Rob Herring <robh@kernel.org> Link: https://lore.kernel.org/r/20221016170035.35014-33-krzysztof.kozlowski@linaro.org Signed-off-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org>
2022-10-17dt-bindings: pinctrl: qcom,sdx65: fix matching pin configKrzysztof Kozlowski1-3/+5
The TLMM pin controller follows generic pin-controller bindings, so should have subnodes with '-state' and '-pins'. Otherwise the subnodes (level one and two) are not properly matched. This method also unifies the bindings with other Qualcomm TLMM and LPASS pinctrl bindings. Reviewed-by: Bjorn Andersson <andersson@kernel.org> Reviewed-by: Rob Herring <robh@kernel.org> Link: https://lore.kernel.org/r/20221016170035.35014-32-krzysztof.kozlowski@linaro.org Signed-off-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org>
2022-10-17dt-bindings: pinctrl: qcom,sdx55: fix indentation in exampleKrzysztof Kozlowski1-17/+17
Bindings example should be indented with 4-spaces. Reviewed-by: Bjorn Andersson <andersson@kernel.org> Reviewed-by: Rob Herring <robh@kernel.org> Link: https://lore.kernel.org/r/20221016170035.35014-31-krzysztof.kozlowski@linaro.org Signed-off-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org>
2022-10-17dt-bindings: pinctrl: qcom,sdx55: use common TLMM schemaKrzysztof Kozlowski1-37/+7
Reference common Qualcomm TLMM pin controller schema, to bring common properties, other pinctrl schemas and additional checks, like function required only for GPIOs. Reviewed-by: Bjorn Andersson <andersson@kernel.org> Reviewed-by: Rob Herring <robh@kernel.org> Link: https://lore.kernel.org/r/20221016170035.35014-30-krzysztof.kozlowski@linaro.org Signed-off-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org>
2022-10-17dt-bindings: pinctrl: qcom,sdx55: fix matching pin configKrzysztof Kozlowski1-3/+11
The TLMM pin controller follows generic pin-controller bindings, so should have subnodes with '-state' and '-pins'. Otherwise the subnodes (level one and two) are not properly matched. qcom-sdx55-telit-fn980-tlb.dtb: pinctrl@f100000: 'pcie_ep_clkreq_default', 'pcie_ep_perst_default', 'pcie_ep_wake_default' do not match any of the regexes: '-pins$', 'pinctrl-[0-9]+' This method also unifies the bindings with other Qualcomm TLMM and LPASS pinctrl bindings. Reviewed-by: Bjorn Andersson <andersson@kernel.org> Reviewed-by: Rob Herring <robh@kernel.org> Link: https://lore.kernel.org/r/20221016170035.35014-29-krzysztof.kozlowski@linaro.org Signed-off-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org>
2022-10-17dt-bindings: pinctrl: qcom,qcm2290: use common TLMM schemaKrzysztof Kozlowski1-37/+6
Reference common Qualcomm TLMM pin controller schema, to bring common properties, other pinctrl schemas and additional checks, like function required only for GPIOs. Reviewed-by: Bjorn Andersson <andersson@kernel.org> Reviewed-by: Rob Herring <robh@kernel.org> Link: https://lore.kernel.org/r/20221016170035.35014-28-krzysztof.kozlowski@linaro.org Signed-off-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org>
2022-10-17dt-bindings: pinctrl: qcom,qcm2290: fix matching pin configKrzysztof Kozlowski1-4/+5
The TLMM pin controller follows generic pin-controller bindings, so should have subnodes with '-state' and '-pins'. Otherwise the subnodes (level one and two) are not properly matched. This method also unifies the bindings with other Qualcomm TLMM and LPASS pinctrl bindings. Reviewed-by: Bjorn Andersson <andersson@kernel.org> Reviewed-by: Rob Herring <robh@kernel.org> Link: https://lore.kernel.org/r/20221016170035.35014-27-krzysztof.kozlowski@linaro.org Signed-off-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org>
2022-10-17dt-bindings: pinctrl: qcom,mdm9607: fix indentation in exampleKrzysztof Kozlowski1-11/+11
Bindings example should be indented with 4-spaces. Reviewed-by: Bjorn Andersson <andersson@kernel.org> Reviewed-by: Rob Herring <robh@kernel.org> Link: https://lore.kernel.org/r/20221016170035.35014-26-krzysztof.kozlowski@linaro.org Signed-off-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org>
2022-10-17dt-bindings: pinctrl: qcom,mdm9607: do not require function on non-GPIOsKrzysztof Kozlowski1-1/+0
Certain pins, like SDcard related, do not have functions and such should not be required. Reviewed-by: Bjorn Andersson <andersson@kernel.org> Reviewed-by: Rob Herring <robh@kernel.org> Link: https://lore.kernel.org/r/20221016170035.35014-25-krzysztof.kozlowski@linaro.org Signed-off-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org>
generated by cgit v1.2.3 (git 2.39.0) at 2025-10-02 16:52:55 +0300