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2022-11-23Merge tag 'ti-k3-dt-for-v6.2' of ↵Arnd Bergmann1-0/+1
git://git.kernel.org/pub/scm/linux/kernel/git/ti/linux into soc/dt TI K3 devicetree updates for v6.2 New Features: J721e: * PWMs, BeagleBone AI-64 platform. J721s2: * Crypto AM65/AM62: * General purpose Timer support (system timer is still arch timer) Fixes: * Bunch of fixes in crypto usage and GPIO intr * Minor schema related fixes for audio, addressing etc. Cleanups: * Refactor of device tree to "disable" peripherals at SoC level for nodes that are un-usable without board level properties. TI K3 devices have large number of peripherals of which only a smaller subset is actually enabled on platforms. Switching to this approach enables two benefits: lesser confusion in creating board level devicetrees as only relevant pinned out device nodes need enabled, as well as smaller board device trees as most un-used peripherals don't need to explicitly disabled. * tag 'ti-k3-dt-for-v6.2' of git://git.kernel.org/pub/scm/linux/kernel/git/ti/linux: (61 commits) arm64: dts: ti: Add k3-j721e-beagleboneai64 dt-bindings: arm: ti: Add bindings for BeagleBone AI-64 arm64: dts: ti: k3-j721s2-main: Enable crypto accelerator arm64: dts: ti: k3-am64-main: Drop RNG clock arm64: dts: ti: k3-j721e-main: Drop RNG clock arm64: dts: ti: k3-am65-main: Drop RNG clock arm64: dts: ti: j721e-common-proc-board: Fix sound node-name arm64: dts: ti: k3-j721s2: Fix the interrupt ranges property for main & wkup gpio intr arm64: dts: ti: k3-j7200-mcu-wakeup: Drop dma-coherent in crypto node arm64: dts: ti: k3-j721e-main: Drop dma-coherent in crypto node arm64: dts: ti: k3-am65-main: Drop dma-coherent in crypto node arm64: dts: ti: k3-am62: Add general purpose timers for am62 arm64: dts: ti: k3-am65: Add general purpose timers for am65 arm64: dts: ti: k3-am65: Configure pinctrl for timer IO pads arm64: dts: ti: Trim addresses to 8 digits arm64: dts: ti: k3-j721e-sk: Add pinmux for RPi Header arm64: dts: ti: k3-j721e-main: Add dts nodes for EHRPWMs arm64: dts: ti: k3-am65: Enable McASP nodes at the board level arm64: dts: ti: k3-am65: Enable Mailbox nodes at the board level arm64: dts: ti: k3-am65: Enable PCIe nodes at the board level ... Link: https://lore.kernel.org/r/20221122190209.jwfj56d6kxpxdkua@untreated Signed-off-by: Arnd Bergmann <arnd@arndb.de>
2022-11-23Merge tag 'aspeed-6.2-devicetree' of ↵Arnd Bergmann1-0/+1
git://git.kernel.org/pub/scm/linux/kernel/git/joel/bmc into soc/dt ASPEED device tree updates for 6.2 - New machines * IBM Bonnell AST2600 BMC, for a Power10 server * Delta AHE-50DC AST1250 BMC, for a 1U Open19 power shelf - Removed machines * IBM Mihawk AST2500 BMC, a Power9 server similar to Witherspoon - Fixes and updates for bletchley, mtjade/mtmitchell, rainier/everest * tag 'aspeed-6.2-devicetree' of git://git.kernel.org/pub/scm/linux/kernel/git/joel/bmc: ARM: dts: aspeed: mtjade: Add SMPro nodes ARM: dts: aspeed: mtjade,mtmitchell: Add BMC SSIF nodes ARM: dts: aspeed: Add Delta AHE-50DC BMC dt-bindings: arm: aspeed: document Delta AHE-50DC BMC ARM: dts: aspeed: rainier: Fix pca9551 nodes ARM: dts: aspeed: p10bmc: Add occ-hwmon nodes ARM: dts: aspeed-g6: Add aliases for mdio nodes ARM: dts: aspeed: Remove Mihawk ARM: dts: aspeed: rainier,everest: Move reserved memory regions ARM: dts: aspeed: Add IBM Bonnell system BMC devicetree ARM: dts: aspeed: bletchley: Enable emmc and ehci1 ARM: dts: aspeed: bletchley: Update and fix gpio-line-names ARM: dts: aspeed: bletchley: Update fusb302 nodes ARM: dts: aspeed: bletchley: Bind presence-sledX pins via gpio-keys ARM: dts: aspeed: bletchley: Disable GPIOV2 pull-down ARM: dts: aspeed: bletchley: Change LED sys_log_id to active low Link: https://lore.kernel.org/r/CACPK8Xfsc8BaL_qAgV+3Rk-AFcQoDVfTpMzHvq_rR-UYqwpNNQ@mail.gmail.com Signed-off-by: Arnd Bergmann <arnd@arndb.de>
2022-11-23Merge tag 'qcom-drivers-for-6.2' of ↵Arnd Bergmann8-5/+159
https://git.kernel.org/pub/scm/linux/kernel/git/qcom/linux into soc/drivers Qualcomm driver updates for 6.2 The qcom,msm-id and qcom,board-id DeviceTree properties are documented, to allow them to be used in configurations or devices requiring these and the socinfo driver is updated to reuse the introduced identifiers. The rpmh-rsc driver is extended to register for PM runtime notifications from the CPU clusters, in order to submit sleep and wake votes the last core in a cluster is being powered down. A mechanism for keeping rpmhpd resources voted until sync_state is introduced, this ensures that power-domains required during boot are kept enabled. The rpmhpd power-domains for SDM670 are also added. Support for the new QDU1000/QRU1000 platform is introduced in the rpmhpd and socinfo drivers. The APR driver gains missing error handling. QMI message descriptors in the PDR driver are made const. Support for the RPM found in SM6375 is added. The SPM driver gains support for MSM8939 and MSM8976 platforms. The stats and command-db drvers are marked as not having PM support. * tag 'qcom-drivers-for-6.2' of https://git.kernel.org/pub/scm/linux/kernel/git/qcom/linux: (36 commits) dt-bindings: firmware: scm: add sdm670 compatible soc: qcom: rpmh-rsc: Write CONTROL_TCS with next timer wakeup soc: qcom: rpmh-rsc: Save base address of drv PM: domains: Store the next hrtimer wakeup in genpd soc: qcom: rpmh-rsc: Attach RSC to cluster PM domain dt-bindings: soc: qcom: Update devicetree binding document for rpmh-rsc dt-bindings: soc: qcom: qcom,smd-rpm: Use qcom,smd-channels on MSM8976 soc: qcom: apr: Add check for idr_alloc and of_property_read_string_index soc: qcom: socinfo: Add QDU1000/QRU1000 SoC IDs to the soc_id table dt-bindings: arm: qcom,ids: Add SoC IDs for QDU1000/QRU1000 soc: qcom: rpmhpd: Add QDU1000/QRU1000 power domains dt-bindings: power: rpmpd: Add QDU1000/QRU1000 to rpmpd binding dt-bindings: qcom: smp2p: Add WPSS node names to pattern property soc: qcom: spm: Implement support for SAWv2.3, MSM8976 L2 PM dt-bindings: soc: qcom: spm: Add compatibles for MSM8976 L2 soc: qcom: llcc: make irq truly optional soc: qcom: spm: Add MSM8939 SPM register data dt-bindings: soc: qcom: spm: Add MSM8939 CPU compatible dt-bindings: soc: qcom: aoss: Add sc8280xp compatible dt-bindings: firmware: document Qualcomm SM6375 SCM ... Link: https://lore.kernel.org/r/20221122202748.1854487-1-andersson@kernel.org Signed-off-by: Arnd Bergmann <arnd@arndb.de>
2022-11-23docs/zh_CN/LoongArch: Fix wrong description of FPRs NoteTiezhu Yang1-2/+2
The Chinese translation of FPRs Note is not consistent with the original English version, $v0/$v1 should be $fv0/$fv1, $a0/$a1 should be $fa0/$fa1, fix them. Signed-off-by: Tiezhu Yang <yangtiezhu@loongson.cn> Signed-off-by: Huacai Chen <chenhuacai@loongson.cn>
2022-11-23dt-bindings: msm: dsi-controller-main: Drop redundant phy-namesBryan O'Donoghue1-1/+1
Adding in msm8939 which is based msm8916 dtsi I stumbled across a binding check complaining about the phy name for msm8916 which we were reusing for msm8939. The currently inconsistent upstream dtsi naming of "dsi" and "dsi-phy" is not captured in the yaml for this driver. The driver however doesn't care about the name of DSI phy, hence the yaml check is redundant. Both Krzysztof and Rob suggested we could drop the phy-names entirely if it really isn't a dependency. So, drop the inconsistent and unnecessary phy-names field from the yaml. Signed-off-by: Bryan O'Donoghue <bryan.odonoghue@linaro.org> Signed-off-by: Dmitry Baryshkov <dmitry.baryshkov@linaro.org>
2022-11-23dt-bindings: arm: rockchip: Add SOQuartz Model ANicolas Frattaroli1-0/+1
The SOQuartz Model A base board is a carrier board for the CM4 form factor, designed around the PINE64 SOQuartz CM4 SoM. The board sports "Model A" dimensions like the Quartz64 Model A, but is not to be confused with that. As for I/O, it features USB 2 ports, Gigabit Ethernet, a PCIe 2 x1 slot, HDMI, a 40-pin GPIO header, CSI/DSI connectors, an eDP flat-flex cable connector, a 12V DC barrel jack for power input and power/reset buttons as well as a microSD card slot. Signed-off-by: Nicolas Frattaroli <frattaroli.nicolas@gmail.com> Acked-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org> Link: https://lore.kernel.org/r/20221116115337.541601-4-frattaroli.nicolas@gmail.com Signed-off-by: Heiko Stuebner <heiko@sntech.de>
2022-11-23dt-bindings: arm: rockchip: Add SOQuartz BladeNicolas Frattaroli1-0/+1
Add a compatible for the SOQuartz Blade base board to the rockchip platforms binding. The SOQuartz Blade is a PoE-capable carrier board for the CM4 SoM form factor, designed around the SOQuartz CM4 System-on-Module. The board features the usual connectivity (GPIO, USB, HDMI, Ethernet) and an M.2 slot for SSDs. It may also be powered from a 5V barrel jack input, and has a 3.5mm jack for UART debug output. Signed-off-by: Nicolas Frattaroli <frattaroli.nicolas@gmail.com> Acked-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org> Link: https://lore.kernel.org/r/20221116115337.541601-2-frattaroli.nicolas@gmail.com Signed-off-by: Heiko Stuebner <heiko@sntech.de>
2022-11-23dt-bindings: arm: rockchip: Add more RK3326 devicesMaya Matuszczyk1-0/+15
This patch adds Anbernic RG351M, Odroid Go Advance Black Edition and Odroid Go Super into dt bindings. Signed-off-by: Maya Matuszczyk <maccraft123mc@gmail.com> Acked-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org> Link: https://lore.kernel.org/r/20221117215954.4114202-3-maccraft123mc@gmail.com Signed-off-by: Heiko Stuebner <heiko@sntech.de>
2022-11-23Merge tag 'v6.1-next-dts64' of ↵Arnd Bergmann1-0/+2
https://git.kernel.org/pub/scm/linux/kernel/git/matthias.bgg/linux into soc/dt Fix check warnings all over the place. mt7986: - Add crypto, I2C and SPI nodes mt6795: - Add clock nodes - Add DMA support for UARTs - Add MMC nodes - Add basic support for Sonyx Xperia M5 mt8195: - Add video enconder node - Add PCIe support - Fine tune capacity-dmips-mhz - Add support for internal and external display port * tag 'v6.1-next-dts64' of https://git.kernel.org/pub/scm/linux/kernel/git/matthias.bgg/linux: (35 commits) arm64: dts: mt7986: add spi related device nodes arm64: dts: mt7986: move wed_pcie node arm64: dts: mediatek: Add support for MT6795 Sony Xperia M5 smartphone dt-bindings: arm: mediatek: Add compatible for MT6795 Sony Xperia M5 arm64: dts: mediatek: mt6795: Add support for eMMC/SD/SDIO controllers arm64: dts: mediatek: mt6795: Add support for APDMA and wire up UART DMAs arm64: dts: mediatek: mt6795: Replace UART dummy clocks with pericfg arm64: dts: mediatek: mt6795: Add topckgen, infra, peri clocks/resets arm64: dts: mediatek: cherry: Add edptx and dptx support arm64: dts: mediatek: cherry: Add dp-intf ports arm64: dts: mt8195: Add edptx and dptx nodes arm64: dts: mt8195: Add dp-intf nodes arm64: dts: mediatek: mt6797: Fix 26M oscillator unit name arm64: dts: mediatek: pumpkin-common: Fix devicetree warnings arm64: dts: mt2712-evb: Fix usb vbus regulators unit names arm64: dts: mt2712-evb: Fix vproc fixed regulators unit names arm64: dts: mt2712e: Fix unit address for pinctrl node arm64: dts: mt2712e: Fix unit_address_vs_reg warning for oscillators arm64: dts: mt6779: Fix devicetree build warnings arm64: dts: mt7896a: Fix unit_address_vs_reg warning for oscillator ... Link: https://lore.kernel.org/r/8933d687-71f0-e9ad-a7c6-2e5a8993463d@gmail.com Signed-off-by: Arnd Bergmann <arnd@arndb.de>
2022-11-23Merge tag 'tegra-for-6.2-dt-bindings-v2' of ↵Arnd Bergmann24-1057/+2262
git://git.kernel.org/pub/scm/linux/kernel/git/tegra/linux into soc/dt dt-bindings: Changes for v6.2-rc1 New memory client IDs and IOMMU stream IDs, as well as new compatible strings are introduced to support more hardware on Tegra234. Some device tree bindings are converted to json-schema to allow formal validation. * tag 'tegra-for-6.2-dt-bindings-v2' of git://git.kernel.org/pub/scm/linux/kernel/git/tegra/linux: dt-bindings: usb: tegra-xusb: Convert to json-schema dt-bindings: pwm: tegra: Convert to json-schema dt-bindings: pinctrl: tegra194: Separate instances dt-bindings: pinctrl: tegra: Convert to json-schema dt-bindings: PCI: tegra234: Add ECAM support dt-bindings: pwm: tegra: Document Tegra234 PWM dt-bindings: Add bindings for Tegra234 NVDEC dt-bindings: tegra: Update headers for Tegra234 dt-bindings: Add headers for NVDEC on Tegra234 Link: https://lore.kernel.org/r/20221121171239.2041835-4-thierry.reding@gmail.com Signed-off-by: Arnd Bergmann <arnd@arndb.de>
2022-11-23Merge tag 'riscv-dt-for-v6.2-mw0' of ↵Arnd Bergmann3-2/+8
https://git.kernel.org/pub/scm/linux/kernel/git/conor/linux into soc/dt RISC-V DeviceTrees for v6.2 dt-bindings: - new compatibles to support the StarFive VisionFive & thead CPU cores - a fix for the PolarFire SoC's pwm binding, merged through my tree as suggested by the PWM maintainers Microchip: - Non-urgent fix for the node address not matches the reg in a way that the checkers don't complain about - Add GPIO controlled LEDs for Icicle - Support for the "CCC" clocks in the FPGA fabric. Previously these used fixed-frequency clocks in the dt, but if which CCC is in use is known, as in the v2022.09 Icicle Kit Reference Design, the rates can be read dynamically. It's an "is known" as it *can* be set via constraints in the FPGA tooling but does not have to be. - A fix for the Icicle's pwm-cells - Removal of some unused PCI clocks StarFive: - Addition of the VisionFive DT, which has been a long time coming! Signed-off-by: Conor Dooley <conor.dooley@microchip.com> * tag 'riscv-dt-for-v6.2-mw0' of https://git.kernel.org/pub/scm/linux/kernel/git/conor/linux: dt-bindings: riscv: Add T-HEAD C906 and C910 compatibles riscv: dts: microchip: remove unused pcie clocks riscv: dts: microchip: remove pcie node from the sev kit riscv: dts: microchip: fix the icicle's #pwm-cells dt-bindings: pwm: fix microchip corePWM's pwm-cells riscv: dts: starfive: Add StarFive VisionFive V1 device tree riscv: dts: starfive: Add common DT for JH7100 based boards dt-bindings: riscv: starfive: Add StarFive VisionFive V1 board riscv: dts: microchip: fix memory node unit address for icicle riscv: dts: microchip: icicle: Add GPIO controlled LEDs riscv: dts: microchip: add the mpfs' fabric clock control Signed-off-by: Arnd Bergmann <arnd@arndb.de>
2022-11-23Merge tag 'v6.1-next-soc' of ↵Arnd Bergmann2-1/+16
https://git.kernel.org/pub/scm/linux/kernel/git/matthias.bgg/linux into soc/drivers mmsys: - add support for MT8186 - add correct compatible solution for vdosys[0,1] on MT8195 pmic wrapper: - add support for MT8365 * tag 'v6.1-next-soc' of https://git.kernel.org/pub/scm/linux/kernel/git/matthias.bgg/linux: soc: mediatek: Add deprecated compatible to mmsys soc: mediatek: pwrap: add mt8365 SoC support soc: mediatek: pwrap: add support for sys & tmr clocks dt-bindings: soc: mediatek: pwrap: add MT8365 SoC bindings soc: mediatek: add mtk-mmsys support for mt8195 vdosys0 Revert "soc: mediatek: add mtk-mmsys support for mt8195 vdosys0" dt-bindings: arm: mediatek: mmsys: change compatible for MT8195 soc: mediatek: Add all settings to mtk_mmsys_ddp_dpi_fmt_config func Link: https://lore.kernel.org/r/cc756001-a942-90b0-b79d-62c1fc189828@gmail.com Signed-off-by: Arnd Bergmann <arnd@arndb.de>
2022-11-22Documentation: add amd-pstate kernel command line optionsPerry Yuan1-0/+11
Add a new amd pstate driver command line option to enable driver passive working mode via MSR and shared memory interface to request desired performance within abstract scale and the power management firmware (SMU) convert the perf requests into actual hardware pstates. Also the `disable` parameter can disable the pstate driver loading by adding `amd_pstate=disable` to kernel command line. Acked-by: Huang Rui <ray.huang@amd.com> Reviewed-by: Gautham R. Shenoy <gautham.shenoy@amd.com> Tested-by: Wyes Karny <wyes.karny@amd.com> Signed-off-by: Perry Yuan <Perry.Yuan@amd.com> Signed-off-by: Rafael J. Wysocki <rafael.j.wysocki@intel.com>
2022-11-22Documentation: amd-pstate: add driver working mode introductionPerry Yuan1-17/+13
Introduce the `amd_pstate` driver new working mode with `amd_pstate=passive` added to kernel command line. If there is no passive mode enabled by user, amd_pstate driver will be disabled by default for now. Acked-by: Huang Rui <ray.huang@amd.com> Reviewed-by: Gautham R. Shenoy <gautham.shenoy@amd.com> Tested-by: Wyes Karny <wyes.karny@amd.com> Signed-off-by: Perry Yuan <Perry.Yuan@amd.com> Signed-off-by: Rafael J. Wysocki <rafael.j.wysocki@intel.com>
2022-11-22Merge tag 'icc-6.1-rc6' of ↵Greg Kroah-Hartman1-1/+1
git://git.kernel.org/pub/scm/linux/kernel/git/djakov/icc into char-misc-linus Georgi writes: interconnect fix for v6.1-rc This contains a tiny fix to align the driver compatible string in the binding documentation with the one used in DTS. - dt-bindings: interconnect: qcom,msm8998-bwmon: Correct SC7280 CPU compatible Signed-off-by: Georgi Djakov <djakov@kernel.org> * tag 'icc-6.1-rc6' of git://git.kernel.org/pub/scm/linux/kernel/git/djakov/icc: dt-bindings: interconnect: qcom,msm8998-bwmon: Correct SC7280 CPU compatible
2022-11-22Merge tag 'iio-fixes-for-6.1c' of ↵Greg Kroah-Hartman1-7/+0
https://git.kernel.org/pub/scm/linux/kernel/git/jic23/iio into char-misc-next Jonathan writes: "3rd set of IIO fixes for the 6.1 cycle. Usual mixed bunch of driver fixes. * sw-triggers - Fix failure to cleanup up list registration in an error path. * aspeed,adc - Drop the trim valid dts property as it doesn't account for unprogrammed OTP and that can be easily detected without it. * avago,apds9960: - Fix register address for gesture gain. * bosch,bma400 - Fix a memory leak in an error path. * rohm,rpr0521 - Fix missing dependency on IIO_BUFFER/IIO_TRIGGERED_BUFFER. * ti,afe4403/4404 - Fix out of band read by moving reads down to where they are used." * tag 'iio-fixes-for-6.1c' of https://git.kernel.org/pub/scm/linux/kernel/git/jic23/iio: dt-bindings: iio: adc: Remove the property "aspeed,trim-data-valid" iio: adc: aspeed: Remove the trim valid dts property. iio: core: Fix entry not deleted when iio_register_sw_trigger_type() fails iio: accel: bma400: Fix memory leak in bma400_get_steps_reg() iio: light: rpr0521: add missing Kconfig dependencies iio: health: afe4404: Fix oob read in afe4404_[read|write]_raw iio: health: afe4403: Fix oob read in afe4403_read_raw iio: light: apds9960: fix wrong register for gesture gain
2022-11-22doc: add documentation for accel subsystemOded Gabbay3-0/+128
Add an introduction section for the accel subsystem. Most of the relevant data is in the DRM documentation, so the introduction only presents the why of the new subsystem, how are the compute accelerators exposed to user-space and what changes need to be done in a standard DRM driver to register it to the new accel subsystem. Signed-off-by: Oded Gabbay <ogabbay@kernel.org> Reviewed-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org> Reviewed-by: Jeffrey Hugo <quic_jhugo@quicinc.com> Reviewed-by: Dave Airlie <airlied@redhat.com> Acked-by: Thomas Zimmermann <tzimmermann@suse.de> Acked-by: Jacek Lawrynowicz <jacek.lawrynowicz@linux.intel.com> Tested-by: Jacek Lawrynowicz <jacek.lawrynowicz@linux.intel.com> Reviewed-by: Melissa Wen <mwen@igalia.com>
2022-11-22drivers/accel: define kconfig and register a new majorOded Gabbay1-0/+5
Add a new Kconfig for the accel subsystem. The Kconfig currently contains only the basic CONFIG_DRM_ACCEL option that will be used to decide whether to compile the accel registration code. Therefore, the kconfig option is defined as bool. The accel code will be compiled as part of drm.ko and will be called directly from the DRM core code. The reason we compile it as part of drm.ko and not as a separate module is because of cyclic dependency between drm.ko and the separate module (if it would have existed). This is due to the fact that DRM core code calls accel functions and vice-versa. The accelerator devices will be exposed to the user space with a new, dedicated major number - 261. The accel init function registers the new major number as a char device and create corresponding sysfs and debugfs root entries, similar to what is done in DRM init function. I added a new header called drm_accel.h to include/drm/, that will hold the prototypes of the drm_accel.c functions. In case CONFIG_DRM_ACCEL is set to 'N', that header will contain empty inline implementations of those functions, to allow DRM core code to compile successfully without dependency on CONFIG_DRM_ACCEL. I Updated the MAINTAINERS file accordingly with the newly added folder and I have taken the liberty to appropriate the dri-devel mailing list and the dri-devel IRC channel for the accel subsystem. Signed-off-by: Oded Gabbay <ogabbay@kernel.org> Reviewed-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org> Reviewed-by: Jeffrey Hugo <quic_jhugo@quicinc.com> Reviewed-by: Dave Airlie <airlied@redhat.com> Acked-by: Thomas Zimmermann <tzimmermann@suse.de> Acked-by: Jacek Lawrynowicz <jacek.lawrynowicz@linux.intel.com> Tested-by: Jacek Lawrynowicz <jacek.lawrynowicz@linux.intel.com> Reviewed-by: Melissa Wen <mwen@igalia.com>
2022-11-22dt-bindings: pinctrl: semtech,sx150xq: fix match patterns for 16 GPIOs matchingNeil Armstrong1-2/+2
The current pattern for SX1503 and SX1509Q with 16 GPIOs only matches "gpio0", "gpio1", and "gpio5" instead of "gpio0" to "gpio15" included. Fix these patterns to match the whole 16 GPIO line names. Fixes: 29c10bcec50a ("dt-bindings: pinctrl: convert semtech,sx150xq bindings to dt-schema") Reported-by: Sander Vanheule <sander@svanheule.net> Signed-off-by: Neil Armstrong <neil.armstrong@linaro.org> Link: https://lore.kernel.org/r/20221121-sx150xq_bindings_fixup-v1-0-e754f183b611@linaro.org Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
2022-11-22Merge tag 'drm-intel-gt-next-2022-11-18' of ↵Dave Airlie2-2/+1
git://anongit.freedesktop.org/drm/drm-intel into drm-next Core Changes: - Backmerge of drm-next Driver Changes: - Restore probe_range behaviour for userptr (Matt A) - Fix use-after-free on lmem_userfault_list (Matt A) - Never purge busy TTM objects (Matt A) - Meteorlake enabling (Daniele, Badal, Daniele, Stuart, Aravind, Alan) - Demote GuC kernel contexts to normal priority (John) - Use RC6 residency types as arguments to residency functions (Ashutosh, Rodrigo, Jani) - Convert some legacy DRM debugging macros to new ones (Tvrtko) - Don't deadlock GuC busyness stats vs reset (John) - Remove excessive line feeds in GuC state dumps (John) - Use i915_sg_dma_sizes() for all backends (Matt A) - Prefer REG_FIELD_GET in intel_rps_get_cagf (Ashutosh, Rodrigo) - Use GEN12_RPSTAT register for GT freq (Don, Badal, Ashutosh) - Remove unwanted TTM ghost obj check (Matt A) - Update workaround documentation (Lucas) - Coding style and static checker fixes and cleanups (Jani, Umesh, Tvrtko, Lucas, Andrzej) - Selftest improvements (Chris, Daniele, Riana, Andrzej) Signed-off-by: Dave Airlie <airlied@redhat.com> From: Joonas Lahtinen <joonas.lahtinen@linux.intel.com> Link: https://patchwork.freedesktop.org/patch/msgid/Y3dMd9HDpfDehhWm@jlahtine-mobl.ger.corp.intel.com
2022-11-22Merge tag 'drm-misc-next-2022-11-17' of ↵Dave Airlie4-6/+79
git://anongit.freedesktop.org/drm/drm-misc into drm-next drm-misc-next for 6.2: UAPI Changes: Cross-subsystem Changes: - fbdev: Add support for the nomodeset kernel parameter Core Changes: - client: Add kunit tests for drm_connector_pick_cmdline_mode() - dma-buf: Move dma_buf_mmap_internal() to new locking specification - edid: Dump EDID on drm_edid_get_panel_id() failure, Stop using a temporary device to load the EDID through the firmware mechanism - fb-helper: Remove damage worker - gem-vram: Fix deadlock in drm_gem_vram_vmap() - modes: Named mode parsing improvements - tests: Add Kunit helpers to create a DRM device Driver Changes: - hisilicon: convert to drm_mode_init() - malidp: Use drm-managed resources - msm: convert to drm_mode_init() and drm_mode_copy() - mtk: convert to drm_mode_init() - nouveau: Support backlight control for nva3 - rockchip: convert to drm_mode_copy() - sti: convert to drm_mode_copy() - v3d: Switch to drm-managed resources - vc4: Fix potential NULL pointer dereference - panels: - New panel: NewVision NV3051D Signed-off-by: Dave Airlie <airlied@redhat.com> From: Maxime Ripard <maxime@cerno.tech> Link: https://patchwork.freedesktop.org/patch/msgid/20221117083628.mzij5nrbdzokek7c@houat
2022-11-22Documentation: riscv: Document the sv57 VM layoutBjörn Töpel1-0/+36
RISC-V has been supporting the "sv57" address translation mode for a while, but is has not been added to the VM layout documentation. Let us fix that. Signed-off-by: Björn Töpel <bjorn@rivosinc.com> Reviewed-by: Alexandre Ghiti <alexghiti@rivosinc.com> Link: https://lore.kernel.org/r/20221118171556.1612190-1-bjorn@kernel.org Signed-off-by: Jonathan Corbet <corbet@lwn.net>
2022-11-22Documentation: USB: correct possessive "its" usageRandy Dunlap3-5/+5
Correct uses of "it's" to possessive "its" or "its" to "it's" as needed. Correct associated grammar in one location. Signed-off-by: Randy Dunlap <rdunlap@infradead.org> Cc: Jonathan Corbet <corbet@lwn.net> Cc: Greg Kroah-Hartman <gregkh@linuxfoundation.org> Cc: linux-usb@vger.kernel.org Link: https://lore.kernel.org/r/20221118231422.14076-1-rdunlap@infradead.org Signed-off-by: Jonathan Corbet <corbet@lwn.net>
2022-11-22math64: favor kernel-doc from header filesLiam Beguin1-3/+0
Fix the kernel-doc markings for div64 functions to point to the header file instead of the lib/ directory. This avoids having implementation specific comments in generic documentation. Furthermore, given that some kernel-doc comments are identical, drop them from lib/math64 and only keep there comments that add implementation details. Signed-off-by: Liam Beguin <liambeguin@gmail.com> Acked-by: Randy Dunlap <rdunlap@infradead.org> Tested-by: Randy Dunlap <rdunlap@infradead.org> Link: https://lore.kernel.org/r/20221118182309.3824530-1-liambeguin@gmail.com Signed-off-by: Jonathan Corbet <corbet@lwn.net>
2022-11-22doc: add texinfodocs and infodocs targetsMaxim Cournoyer2-1/+13
Sphinx supports generating Texinfo sources and Info documentation, which can be navigated easily and is convenient to search (via the indexed nodes or anchors, for example). Signed-off-by: Maxim Cournoyer <maxim.cournoyer@gmail.com> Link: https://lore.kernel.org/r/20221116190210.28407-2-maxim.cournoyer@gmail.com Signed-off-by: Jonathan Corbet <corbet@lwn.net>
2022-11-22Documentation: devres: add missing PWM helperYang Yingliang1-0/+1
Add missing devm_pwmchip_add() to devres.rst. It's introduced by commit bcda91bf86c1 ("pwm: Add a device-managed function to add PWM chips"). Fixes: bcda91bf86c1 ("pwm: Add a device-managed function to add PWM chips") Cc: Thierry Reding <thierry.reding@gmail.com> Cc: "Uwe Kleine-König" <u.kleine-koenig@pengutronix.de> Cc: Jonathan Corbet <corbet@lwn.net> Signed-off-by: Yang Yingliang <yangyingliang@huawei.com> Acked-by: Uwe Kleine-König <u.kleine-koenig@pengutronix.de> Link: https://lore.kernel.org/r/20221102024430.1444714-1-yangyingliang@huawei.com Signed-off-by: Jonathan Corbet <corbet@lwn.net>
2022-11-21blk-crypto: don't use struct request_queue for public interfacesChristoph Hellwig1-6/+6
Switch all public blk-crypto interfaces to use struct block_device arguments to specify the device they operate on instead of th request_queue, which is a block layer implementation detail. Signed-off-by: Christoph Hellwig <hch@lst.de> Reviewed-by: Eric Biggers <ebiggers@google.com> Link: https://lore.kernel.org/r/20221114042944.1009870-2-hch@lst.de Signed-off-by: Jens Axboe <axboe@kernel.dk>
2022-11-21dt-binding: perf: Add Amlogic DDR PMUJiucheng Xu1-0/+54
Add binding documentation for the Amlogic G12 series DDR performance monitor unit. Signed-off-by: Jiucheng Xu <jiucheng.xu@amlogic.com> Reviewed-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org> Link: https://lore.kernel.org/r/20221121021602.3306998-3-jiucheng.xu@amlogic.com Signed-off-by: Will Deacon <will@kernel.org>
2022-11-21docs/perf: Add documentation for the Amlogic G12 DDR PMUJiucheng Xu2-0/+71
Add a user guide to show how to use DDR PMU to monitor DDR bandwidth on Amlogic G12 SoC Signed-off-by: Jiucheng Xu <jiucheng.xu@amlogic.com> Reviewed-by: Chris Healy <healych@amazon.com> Link: https://lore.kernel.org/r/20221121021602.3306998-2-jiucheng.xu@amlogic.com Signed-off-by: Will Deacon <will@kernel.org>
2022-11-21dt-bindings: soc: mediatek: pwrap: add MT8365 SoC bindingsFabien Parent1-0/+3
Add pwrap binding documentation for Signed-off-by: Fabien Parent <fparent@baylibre.com> Signed-off-by: Fadwa CHIBY <fchiby@baylibre.com> Acked-by: Rob Herring <robh@kernel.org> Reviewed-by: AngeloGioacchino Del Regno <angelogioacchino.delregno@collabora.com> Link: https://lore.kernel.org/r/20221031093401.22916-2-fchiby@baylibre.com Signed-off-by: Matthias Brugger <matthias.bgg@gmail.com>
2022-11-21dt-bindings: arm: mediatek: mmsys: change compatible for MT8195Jason-JH.Lin1-1/+13
For previous MediaTek SoCs, such as MT8173, there are 2 display HW pipelines binding to 1 mmsys with the same power domain, the same clock driver and the same mediatek-drm driver. For MT8195, VDOSYS0 and VDOSYS1 are 2 display HW pipelines binding to 2 different power domains, different clock drivers and different mediatek-drm drivers. Moreover, Hardware pipeline of VDOSYS0 has these components: COLOR, CCORR, AAL, GAMMA, DITHER. They are related to the PQ (Picture Quality) and they makes VDOSYS0 supports PQ function while they are not including in VDOSYS1. Hardware pipeline of VDOSYS1 has the component ETHDR (HDR related component). It makes VDOSYS1 supports the HDR function while it's not including in VDOSYS0. To summarize0: Only VDOSYS0 can support PQ adjustment. Only VDOSYS1 can support HDR adjustment. Therefore, we need to separate these two different mmsys hardwares to 2 different compatibles for MT8195. Fixes: 81c5a41d10b9 ("dt-bindings: arm: mediatek: mmsys: add mt8195 SoC binding") Signed-off-by: Jason-JH.Lin <jason-jh.lin@mediatek.com> Signed-off-by: Bo-Chen Chen <rex-bc.chen@mediatek.com> Reviewed-by: AngeloGioacchino Del Regno <angelogioacchino.delregno@collabora.com> Reviewed-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org> Link: https://lore.kernel.org/r/20220927152704.12018-2-jason-jh.lin@mediatek.com Signed-off-by: Matthias Brugger <matthias.bgg@gmail.com>
2022-11-21dt-bindings: mips: brcm: add Broadcom SoCs bindingsSergio Paracuellos1-0/+96
Add the yaml binding for MIPS Broadcom cable/DSL/settop platforms. Acked-by: Florian Fainelli <f.fainelli@gmail.com> Reviewed-by: Rob Herring <robh@kernel.org> Signed-off-by: Sergio Paracuellos <sergio.paracuellos@gmail.com> Signed-off-by: Thomas Bogendoerfer <tsbogend@alpha.franken.de>
2022-11-21dt-bindings: mips: add CPU bindings for MIPS architectureSergio Paracuellos3-77/+115
Add the yaml binding for available CPUs in MIPS architecture. Reviewed-by: Rob Herring <robh@kernel.org> Signed-off-by: Sergio Paracuellos <sergio.paracuellos@gmail.com> Reviewed-by: Philippe Mathieu-Daudé <philmd@fungible.com> Signed-off-by: Thomas Bogendoerfer <tsbogend@alpha.franken.de>
2022-11-21dt-bindings: arm: ti: Add bindings for BeagleBone AI-64Robert Nelson1-0/+1
This board is based on the ti,j721e https://beagleboard.org/ai-64 https://git.beagleboard.org/beagleboard/beaglebone-ai-64 Signed-off-by: Robert Nelson <robertcnelson@gmail.com> Acked-by: Rob Herring <robh@kernel.org> CC: Nishanth Menon <nm@ti.com> CC: Jason Kridner <jkridner@beagleboard.org> CC: Drew Fustini <drew@beagleboard.org> Signed-off-by: Nishanth Menon <nm@ti.com> Link: https://lore.kernel.org/r/20221118163139.3592054-1-robertcnelson@gmail.com
2022-11-21Merge tag 'memory-controller-drv-6.2-2' of ↵Arnd Bergmann2-27/+60
https://git.kernel.org/pub/scm/linux/kernel/git/krzk/linux-mem-ctrl into soc/drivers Memory controller drivers for v6.2, part two 1. ARM PL353: document PL354 in bindings. 2. TI/OMAP GPMC: allow setting wait-pin polarity. * tag 'memory-controller-drv-6.2-2' of https://git.kernel.org/pub/scm/linux/kernel/git/krzk/linux-mem-ctrl: memory: omap-gpmc: fix coverity issue "Control flow issues" dt-bindings: memory-controllers: ti,gpmc: add wait-pin polarity memory: omap-gpmc: wait pin additions MAINTAINERS: arm,pl353-smc: correct dt-binding path dt-bindings: memory-controllers: arm,pl353-smc: Extend to support 'arm,pl354' SMC Link: https://lore.kernel.org/r/20221116093509.19657-1-krzysztof.kozlowski@linaro.org Signed-off-by: Arnd Bergmann <arnd@arndb.de>
2022-11-21Merge tag 'renesas-dt-bindings-for-v6.2-tag2' of ↵Arnd Bergmann2-5/+49
git://git.kernel.org/pub/scm/linux/kernel/git/geert/renesas-devel into soc/dt Renesas DT binding updates for v6.2 (take two) - Document support for the Andes Technology AX45MP RISC-V CPU Core, as used on the Renesas RZ/Five SoC, - Document support for the Renesas RZ/V2M System Configuration. * tag 'renesas-dt-bindings-for-v6.2-tag2' of git://git.kernel.org/pub/scm/linux/kernel/git/geert/renesas-devel: dt-bindings: arm: renesas: Document Renesas RZ/V2M System Configuration dt-bindings: riscv: Add Andes AX45MP core to the list dt-bindings: riscv: Sort the CPU core list alphabetically Link: https://lore.kernel.org/r/cover.1668788927.git.geert+renesas@glider.be Signed-off-by: Arnd Bergmann <arnd@arndb.de>
2022-11-21Merge tag 'stm32-dt-for-v6.2-1' of ↵Arnd Bergmann1-0/+6
git://git.kernel.org/pub/scm/linux/kernel/git/atorgue/stm32 into soc/dt STM32 DT for v6.2, round 1 Highlights: ---------- - MPU: - ST boards: - Add MCP23017 IO expander support on stm32mp135f-dk board. - Add stm32g0 support for USB typeC on stm32mp135f-dk - Add USB (EHCI / OTG) on stm32mp135f-dk - Add ADC support on stm32mp135f-dk - Add USB2514B onboard hub on stm32mp157c-ev1 - DH: - Fix severals Yaml DT validation issues * tag 'stm32-dt-for-v6.2-1' of git://git.kernel.org/pub/scm/linux/kernel/git/atorgue/stm32: (28 commits) ARM: dts: stm32: Rename mdio0 to mdio on DHCOR Testbench board ARM: dts: stm32: add mcp23017 IO expander on I2C1 on stm32mp135f-dk ARM: dts: stm32: add mcp23017 pinctrl entry for stm32mp13 ARM: dts: stm32: enable USB OTG in dual role mode on stm32mp135f-dk ARM: dts: stm32: add pins for stm32g0 typec controller on stm32mp13 ARM: dts: stm32: enable USB Host EHCI on stm32mp135f-dk ARM: dts: stm32: enable USB HS phys on stm32mp135f-dk ARM: dts: stm32: add fixed regulators to support usb on stm32mp135f-dk ARM: dts: stm32: add USB OTG HS support on stm32mp131 ARM: dts: stm32: add UBSH EHCI and OHCI support on stm32mp131 ARM: dts: stm32: add USBPHYC and dual USB HS PHY support on stm32mp131 ARM: dts: stm32: add PWR fixed regulators on stm32mp131 ARM: dts: stm32: Fix AV96 WLAN regulator gpio property ARM: dts: stm32: add adc support on stm32mp135f-dk ARM: dts: stm32: add dummy vdd_adc regulator on stm32mp135f-dk ARM: dts: stm32: add adc pins muxing on stm32mp135f-dk ARM: dts: stm32: add adc support to stm32mp13 ARM: dts: stm32: Drop MMCI interrupt-names ARM: dts: stm32: update vbus-supply of usbphyc_port0 on stm32mp157c-ev1 ARM: dts: stm32: add support for USB2514B onboard hub on stm32mp157c-ev1 ... Link: https://lore.kernel.org/r/3235e5be-d89f-f76c-5e25-5d1210feb857@foss.st.com Signed-off-by: Arnd Bergmann <arnd@arndb.de>
2022-11-21Merge tag 'imx-bindings-6.2' of ↵Arnd Bergmann5-9/+73
git://git.kernel.org/pub/scm/linux/kernel/git/shawnguo/linux into soc/dt i.MX dt-bindings update for 6.2: - New vendor prefix for Cloos and InnoComm. - New compatible for Cloos PHG board, InnoComm WB15 EVK and Kobo Aura 2. - Improve snvs-lpgpr bindings schema regarding i.MX8M SNVS LPGRP compatible strings. - Improve fsl-imx-cspi bindings schema for i.MX8MP ECSPI. - Add bindings schema for i.MX8M ANATOP device. - Update SCU firmware resource ID header by syncing with the latest available SCFW kit version 1.13.0. * tag 'imx-bindings-6.2' of git://git.kernel.org/pub/scm/linux/kernel/git/shawnguo/linux: dt-bindings: arm: fsl: Add an entry for Cloos PHG board dt-bindings: vendor-prefixes: Add an entry for Cloos dt-bindings: nvmem: snvs-lpgpr: Fix i.MX8M compatible strings dt-bindings: spi: fsl-imx-cspi: update i.MX8MP binding dt-bindings: arm: fsl: add compatible string for Kobo Aura 2 dt-bindings: clock: add i.MX8M Anatop dt-bindings: arm: fsl: Add InnoComm WB15 EVK dt-bindings: vendor-prefixes: Add prefix for InnoComm dt-bindings: firmware: imx: sync with SCFW kit v1.13.0 Link: https://lore.kernel.org/r/20221119125733.32719-3-shawnguo@kernel.org Signed-off-by: Arnd Bergmann <arnd@arndb.de>
2022-11-21mtd: spi-nor: sysfs: hide manufacturer if it is not setMichael Walle1-0/+3
The manufacturer may be optional when pure SFDP flashes are supported. Hide the sysfs property if no manufacturer is set. Signed-off-by: Michael Walle <michael@walle.cc> Signed-off-by: Tudor Ambarus <tudor.ambarus@microchip.com> Reviewed-by: Takahiro Kuwano <Takahiro.Kuwano@infineon.com> Link: https://lore.kernel.org/r/20220810220654.1297699-3-michael@walle.cc
2022-11-21mtd: spi-nor: hide jedec_id sysfs attribute if not presentMichael Walle1-0/+3
Some non-jedec compliant flashes (like the Everspin flashes) don't have an ID at all. Hide the attribute in this case. Fixes: 36ac02286265 ("mtd: spi-nor: add initial sysfs support") Signed-off-by: Michael Walle <michael@walle.cc> Signed-off-by: Tudor Ambarus <tudor.ambarus@microchip.com> Reviewed-by: Takahiro Kuwano <Takahiro.Kuwano@infineon.com> Link: https://lore.kernel.org/r/20220810220654.1297699-2-michael@walle.cc
2022-11-21dt-bindings: usb: tegra-xusb: Convert to json-schemaThierry Reding5-132/+753
Convert the Tegra XUSB controller bindings from the free-form text format to json-schema. Reviewed-by: Rob Herring <robh@kernel.org> Signed-off-by: Thierry Reding <treding@nvidia.com>
2022-11-21dt-bindings: pwm: tegra: Convert to json-schemaThierry Reding2-78/+96
Convert the Tegra PWFM bindings from the free-form text format to json-schema. Signed-off-by: Thierry Reding <treding@nvidia.com> Reviewed-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org> Signed-off-by: Thierry Reding <treding@nvidia.com>
2022-11-21dt-bindings: pinctrl: tegra194: Separate instancesThierry Reding1-20/+215
Tegra194 has two separate instances of the pin controller, one called AON (in the always-on domain) and another called "main". Instead of treating them as a single pin controller, split them up into two separate controllers. Doing so allows the mapping between the pinmux and GPIO controllers to be trivial identity mappings and more cleanly separates the AON from the main IP blocks. Note that while this changes the DT node in an incompatible way, this doesn't have any practical implications for backwards-compatibility. The reason for this is that device trees have only reconfigured a very narrow subset of pins of the main controller, so the new driver will remain backwards-compatible with old device trees. Reviewed-by: Rob Herring <robh@kernel.org> Signed-off-by: Thierry Reding <treding@nvidia.com>
2022-11-21dt-bindings: pinctrl: tegra: Convert to json-schemaThierry Reding14-845/+1029
Convert the NVIDIA Tegra pinmux controller bindings from the free-form text format to json-schema. Reviewed-by: Rob Herring <robh@kernel.org> Signed-off-by: Thierry Reding <treding@nvidia.com>
2022-11-21dt-bindings: PCI: tegra234: Add ECAM supportVidya Sagar2-3/+33
Add support for ECAM aperture that is only supported for Tegra234 devices. Signed-off-by: Vidya Sagar <vidyas@nvidia.com> Co-developed-by: Jon Hunter <jonathanh@nvidia.com> Signed-off-by: Jon Hunter <jonathanh@nvidia.com> Reviewed-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org> Acked-by: Rob Herring <robh@kernel.org> Signed-off-by: Thierry Reding <treding@nvidia.com>
2022-11-21dt-bindings: pwm: tegra: Document Tegra234 PWMSandipan Patra1-0/+1
Add compatible for nvidia,tegra234-pwm with nvidia,tegra194-pwm as a fallback. The PWM controller blocks are identical to the ones found on the Tegra194 SoC. No driver changes are required and compatible string "nvidia,tegra194-pwm" will be used as a fallback. Signed-off-by: Sandipan Patra <spatra@nvidia.com> Acked-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org> Signed-off-by: Thierry Reding <treding@nvidia.com>
2022-11-21dt-bindings: Add bindings for Tegra234 NVDECMikko Perttunen1-0/+156
Update NVDEC bindings for Tegra234. This new engine version only has two memory clients, but now requires three clocks, and as a bigger change the engine loads firmware from a secure carveout configured by the bootloader. For the latter, we need to add a phandle to the memory controller to query the location of this carveout, and several other properties containing offsets into the firmware inside the carveout. This carveout is not accessible by the CPU, but is needed by NVDEC, so we need this information to be relayed from the bootloader. As the binding was getting large with many conditional properties, also split the Tegra234 version out into a separate file. Signed-off-by: Mikko Perttunen <mperttunen@nvidia.com> Reviewed-by: Rob Herring <robh@kernel.org> Signed-off-by: Thierry Reding <treding@nvidia.com>
2022-11-21dt-bindings: arm: mediatek: Add compatible for MT6795 Sony Xperia M5AngeloGioacchino Del Regno1-0/+1
Add a compatible for the Sony Xperia M5 smartphone. Signed-off-by: AngeloGioacchino Del Regno <angelogioacchino.delregno@collabora.com> Acked-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org> Link: https://lore.kernel.org/r/20221027095504.37432-6-angelogioacchino.delregno@collabora.com Signed-off-by: Matthias Brugger <matthias.bgg@gmail.com>
2022-11-21Merge tag 'sunxi-fixes-for-6.1-1' of ↵Arnd Bergmann1-0/+5
https://git.kernel.org/pub/scm/linux/kernel/git/sunxi/linux into arm/fixes - RSB bus communication fixes - missing IOMMU reference property to H6 Hantro G2 * tag 'sunxi-fixes-for-6.1-1' of https://git.kernel.org/pub/scm/linux/kernel/git/sunxi/linux: arm64: dts: allwinner: h6: Add IOMMU reference to Hantro G2 media: dt-bindings: allwinner: h6-vpu-g2: Add IOMMU reference property bus: sunxi-rsb: Support atomic transfers bus: sunxi-rsb: Remove the shutdown callback Link: https://lore.kernel.org/r/Y3ftpBFk5+fndA4B@jernej-laptop Signed-off-by: Arnd Bergmann <arnd@arndb.de>
2022-11-21dt-bindings: amlogic: document Odroid Go Ultra compatibleNeil Armstrong1-0/+1
This documents the Odroid Go Ultra, a portable gaming device, with the following characteristics: - Amlogic S922X SoC - RK817 & RK818 PMICs - 2GiB LPDDR4 - On board 16GiB eMMC - Micro SD Card slot - 5inch 854×480 MIPI-DSI TFT LCD - Earphone stereo jack, 0.5Watt 8Ω Mono speaker - Li-Polymer 3.7V/4000mAh Battery - USB-A 2.0 Host Connector - x16 GPIO Input Buttons - 2x ADC Analog Joysticks - USB-C Port for USB2 Device and Charging Acked-by: Rob Herring <robh@kernel.org> Link: https://lore.kernel.org/r/20221031-b4-odroid-go-ultra-initial-v2-1-a3df1e09b0af@linaro.org Signed-off-by: Neil Armstrong <neil.armstrong@linaro.org>
generated by cgit v1.2.3 (git 2.39.0) at 2025-09-28 15:50:16 +0300