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2017-09-05dt-bindings: Remove "status" from examplesRob Herring13-15/+0
Pretty much any node can have a status property, so it doesn't need to be in examples. Converted with the following command and removed examples with SoC and board specific splits: git grep -l -E 'status.*=.*' Documentation/devicetree/ | xargs sed -i -E '/\sstatus.*=.*"(disabled|ok|okay)/d' Acked-by: Mark Rutland <mark.rutland@arm.com> Signed-off-by: Rob Herring <robh@kernel.org>
2017-07-03Merge remote-tracking branches 'spi/topic/spidev', 'spi/topic/st-ssc4' and ↵Mark Brown1-0/+59
'spi/topic/stm32' into spi-next
2017-07-03Merge remote-tracking branches 'spi/topic/orion', 'spi/topic/pxa2xx', ↵Mark Brown1-0/+2
'spi/topic/rockchip', 'spi/topic/sh-msiof' and 'spi/topic/sirf' into spi-next
2017-07-03Merge remote-tracking branches 'spi/topic/loopback', ↵Mark Brown2-0/+33
'spi/topic/meson-spicc', 'spi/topic/mtk' and 'spi/topic/omap2-mcspi' into spi-next
2017-06-28spi: stm32: fix example with st, spi-midi-ns propertyAmelie Delaunay1-4/+3
This patch aligns example with the optional property description, removes status and replace spidev unvalid compatible with Aarvark SPI Host Adapter one. In slave mode, Aardvark SPI Host Adapter requires 4ms delay between the end of byte n and the start of byte n+1, hence the use of the optional property st,spi-midi-ns. Signed-off-by: Amelie Delaunay <amelie.delaunay@st.com> Signed-off-by: Mark Brown <broonie@kernel.org>
2017-06-28spi: stm32: use SoC specific compatibleAmelie Delaunay1-2/+2
This patch replaces st,stm32-spi compatible with st,stm32h7-spi SoC specific compatible and updates the example accondingly. Signed-off-by: Amelie Delaunay <amelie.delaunay@st.com> Acked-by: Rob Herring <robh@kernel.org> Signed-off-by: Mark Brown <broonie@kernel.org>
2017-06-21spi: Document the STM32 SPI bindingsAmelie Delaunay1-0/+60
This patch adds the documentation of device tree bindings for the STM32 SPI controller. Signed-off-by: Amelie Delaunay <amelie.delaunay@st.com> Signed-off-by: Mark Brown <broonie@kernel.org>
2017-06-20spi: mediatek: Add bindings for mediatek MT2712 soc platformleilk.liu@mediatek.com1-0/+1
This patch adds a DT binding documentation for the MT2712 soc. Signed-off-by: Leilk Liu <leilk.liu@mediatek.com> Reviewed-by: Matthias Brugger <matthias.bgg@gmail.com> Signed-off-by: Mark Brown <broonie@kernel.org>
2017-06-06spi: mediatek: Add bindings for mediatek MT7622 soc platformLeilk Liu1-0/+1
This patch adds a DT binding documentation for the MT7622 soc. Signed-off-by: Leilk Liu <leilk.liu@mediatek.com> Signed-off-by: Mark Brown <broonie@kernel.org>
2017-05-26spi: sh-msiof: Add slave mode supportHisashi Nakamura1-0/+2
Add slave mode support to the MSIOF driver, in both PIO and DMA mode. For now this only supports the transmission of messages with a size that is known in advance. Signed-off-by: Hisashi Nakamura <hisashi.nakamura.ak@renesas.com> Signed-off-by: Hiromitsu Yamasaki <hiromitsu.yamasaki.ym@renesas.com> [geert: Timeout handling cleanup, spi core integration, cancellation, rewording] Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be> Acked-by: Rob Herring <robh@kernel.org> Signed-off-by: Mark Brown <broonie@kernel.org>
2017-05-26spi: Document DT bindings for SPI controllers in slave modeGeert Uytterhoeven1-31/+45
Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be> Reviewed-by: Rob Herring <robh@kernel.org> Signed-off-by: Mark Brown <broonie@kernel.org>
2017-05-24spi: meson: Add SPICC bindingsNeil Armstrong1-0/+31
Add the SPICC (SPI Communications Controller) bindings variant. Signed-off-by: Neil Armstrong <narmstrong@baylibre.com> Signed-off-by: Mark Brown <broonie@kernel.org>
2017-04-26Merge remote-tracking branches 'spi/topic/loopback', ↵Mark Brown1-4/+4
'spi/topic/omap2-mcspi', 'spi/topic/orion', 'spi/topic/pl022' and 'spi/topic/sc18is602' into spi-next
2017-04-26Merge remote-tracking branches 'spi/topic/devprop', 'spi/topic/fsl', ↵Mark Brown1-0/+7
'spi/topic/fsl-dspi', 'spi/topic/imx' and 'spi/topic/lantiq' into spi-next
2017-04-25spi-imx: Implements handling of the SPI_READY mode flag.Leif Middelschulte1-0/+7
This patch implements consideration of the SPI_READY mode flag as defined in spi.h. It extends the device tree bindings to support the values defined by the reference manual for the DRCTL field. Thus supporting edge-triggered and level-triggered bursts. Signed-off-by: Leif Middelschulte <Leif.Middelschulte@gmail.com> Signed-off-by: Mark Brown <broonie@kernel.org>
2017-03-20spi: pl022: Document property valuesAntonio Borneo1-1/+4
The property "pl022,com-mode" can only assume one of the values of the enum ssp_mode, defined in include/linux/amba/pl022.h List the possible numeric values and report the associated meaning. Signed-off-by: Antonio Borneo <borneo.antonio@gmail.com> Signed-off-by: Mark Brown <broonie@kernel.org>
2017-03-20spi: pl022: remove nonexistent properties from DT binding exampleAntonio Borneo1-3/+0
The properties "pl022,hierarchy" and "pl022,slave-tx-disable" were initially proposed till patch V4 [1] but then discarded in V5 [2] when the patch set was taken over by another developer, as explained in patch history in [3]. The above properties never landed in mainline code but were then listed in the binding example by a following commit dc715452e914 ("spi: pl022: use generic DMA slave configuration if possible") and later on they were copy-paste in some board's DT. Remove the nonexistent properties from the example. Also remove a spaces-only line at the end of the file. [1] https://lkml.org/lkml/2012/7/9/421 [2] https://lkml.org/lkml/2012/8/21/427 [3] https://lkml.org/lkml/2012/8/21/436 Signed-off-by: Antonio Borneo <borneo.antonio@gmail.com> Signed-off-by: Mark Brown <broonie@kernel.org>
2017-03-13spi/bcm63xx-hsspi: document bcm63xx HS SPI devicetree bindingsJonas Gorski1-0/+33
Add documentation for the bindings of the high speed SPI controller found on newer bcm63xx SoCs. Signed-off-by: Jonas Gorski <jonas.gorski@gmail.com> Acked-by: Rob Herring <robh@kernel.org> Signed-off-by: Mark Brown <broonie@kernel.org>
2017-02-22spi/bcm63xx: document bcm63xx SPI devicetree bindingsJonas Gorski1-0/+33
Add documentation for the bindings of the low speed SPI controller found on most bcm63xx SoCs. Signed-off-by: Jonas Gorski <jonas.gorski@gmail.com> Signed-off-by: Mark Brown <broonie@kernel.org>
2017-02-19Merge remote-tracking branches 'spi/topic/rockchip', 'spi/topic/rspi', ↵Mark Brown1-0/+7
'spi/topic/s3c64xx', 'spi/topic/sh-msiof' and 'spi/topic/slave' into spi-next
2017-02-19Merge remote-tracking branches 'spi/topic/imx', 'spi/topic/lantiq-ssc', ↵Mark Brown1-0/+29
'spi/topic/mpc52xx', 'spi/topic/ppc4xx' and 'spi/topic/pxa2xx' into spi-next
2017-02-14spi: lantiq-ssc: add support for Lantiq SSC SPI controllerHauke Mehrtens1-0/+29
This driver supports the Lantiq SSC SPI controller in master mode. This controller is found on Intel (former Lantiq) SoCs like the Danube, Falcon, xRX200, xRX300. The hardware uses two hardware FIFOs one for received and one for transferred bytes. When the driver writes data into the transmit FIFO the complete word is taken from the FIFO into a shift register. The data from this shift register is then written to the wire. This driver uses the interrupts signaling the status of the FIFOs and not the shift register. It is also possible to use the interrupts for the shift register, but they will send a signal after every word. When using the interrupts for the shift register we get a signal when the last word is written into the shift register and not when it is written to the wire. After all FIFOs are empty the driver busy waits till the hardware is not busy any more and returns the transfer status. Signed-off-by: Daniel Schwierzeck <daniel.schwierzeck@gmail.com> Signed-off-by: Hauke Mehrtens <hauke@hauke-m.de> Signed-off-by: Mark Brown <broonie@kernel.org>
2016-12-19spi: rockchip: support "sleep" pin configurationBrian Norris1-0/+7
In the pattern of many other devices, support a system-sleep pin configuration. Signed-off-by: Brian Norris <briannorris@chromium.org> Reviewed-by: Douglas Anderson <dianders@chromium.org> Tested-by: Caesar Wang <wxt@rock-chips.com> Signed-off-by: Mark Brown <broonie@kernel.org>
2016-12-14spi: sh-msiof: Add R-Car Gen 2 and 3 fallback bindingsSimon Horman1-6/+13
In the case of Renesas R-Car hardware we know that there are generations of SoCs, e.g. Gen 2 and Gen 3. But beyond that it's not clear what the relationship between IP blocks might be. For example, I believe that r8a7790 is older than r8a7791 but that doesn't imply that the latter is a descendant of the former or vice versa. We can, however, by examining the documentation and behaviour of the hardware at run-time observe that the current driver implementation appears to be compatible with the IP blocks on SoCs within a given generation. For the above reasons and convenience when enabling new SoCs a per-generation fallback compatibility string scheme is being adopted for drivers for Renesas SoCs. Also: * Deprecate renesas,sh-msiof. It seems poorly named as it is only compatible with SH-Mobile. It also appears unused in mainline. Signed-off-by: Simon Horman <horms+renesas@verge.net.au> Reviewed-by: Geert Uytterhoeven <geert+renesas@glider.be> Signed-off-by: Mark Brown <broonie@kernel.org>
2016-12-12Merge remote-tracking branches 'spi/topic/spidev', 'spi/topic/sunxi', ↵Mark Brown1-2/+23
'spi/topic/ti-qspi', 'spi/topic/topcliff-pch' and 'spi/topic/xlp' into spi-next
2016-12-12Merge remote-tracking branches 'spi/topic/fsl-lpspi', 'spi/topic/imx', ↵Mark Brown1-0/+19
'spi/topic/jcore' and 'spi/topic/omap' into spi-next
2016-12-12Merge remote-tracking branches 'spi/topic/armada', 'spi/topic/ath79', ↵Mark Brown1-0/+25
'spi/topic/atmel' and 'spi/topic/axi' into spi-next
2016-12-08spi: armada-3700: Add documentation for the Armada 3700 SPI ControllerRomain Perier1-0/+25
This adds the devicetree bindings documentation for the SPI controller present in the Marvell Armada 3700 SoCs. Signed-off-by: Romain Perier <romain.perier@free-electrons.com> Tested-by: Gregory CLEMENT <gregory.clement@free-electrons.com> Acked-by: Rob Herring <robh@kernel.org> Signed-off-by: Mark Brown <broonie@kernel.org>
2016-11-23spi: imx: add devicetree binding for lpspiGao Pan1-0/+19
Add a binding document for lpspi driver Signed-off-by: Gao Pan <pandy.gao@nxp.com> Signed-off-by: Mark Brown <broonie@kernel.org>
2016-11-21spi: sh-msiof: Add support for R-Car M3-WGeert Uytterhoeven1-0/+1
MSIOF in R-Car M3-W (r8a7796) is handled fine by the existing driver. Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be> Signed-off-by: Mark Brown <broonie@kernel.org>
2016-11-02spi: sun6i: Add binding for Allwinner H3 SPI controllerMilo Kim1-2/+23
H3 SPI has same architecture as A31 except FIFO capacity. To configure the buffer size separately, compatible property should be different. Optional DMA specifiers and example are added. Signed-off-by: Milo Kim <woogyom.kim@gmail.com> Acked-by: Maxime Ripard <maxime.ripard@free-electrons.com> Acked-by: Rob Herring <robh+dt@kernel.org> Signed-off-by: Mark Brown <broonie@kernel.org>
2016-10-05Merge tag 'devicetree-for-4.9' of ↵Linus Torvalds1-1/+1
git://git.kernel.org/pub/scm/linux/kernel/git/robh/linux Pull DeviceTree updates from Rob Herring: - update changeset documentation on locking to reflect current code - fix alphabetizing of vendor-prefixes.txt - add various vendor prefixes - add ESP8089 WiFi binding - add new variable sized array parsing functions * tag 'devicetree-for-4.9' of git://git.kernel.org/pub/scm/linux/kernel/git/robh/linux: (21 commits) DT: irqchip: renesas-irqc: document R8A7743/5 support dt-bindings: Add Keith&Koep vendor prefix dt-bindings: add vendor prefix for Auvidea GmbH of: Add vendor prefix for Engicam s.r.l company devicetree: Add vendor-prefix for Silead Inc. devicetree: bindings: Add vendor prefix for Topeet. dt-bindings: Add summit vendor id of/platform: Initialise dev->fwnode appropriately of: Add array read functions with min/max size limits of: Make of_find_property_value_of_size take a length range dt: net: enhance DWC EQoS binding to support Tegra186 bindings: PCI: artpec: correct pci binding example Documentation: devicetree: Fix max77693 spelling errors dt: bindings: Add binding for ESP8089 wifi chips PCI: Xilinx NWL PCIe: Updating device tree documentation with prefetchable memory space Documentation: devicetree: spi: fix wrong spi-bus documentation dt-bindings: Add Japan Display Inc vendor id dt-bindings: vendor-prefixes: Add Sierra Wireless devicetree: Add vendor prefix for Shenzhen Sunchip Technology Co., Ltd devicetree: Sort vendor prefixes in alphabetical order ...
2016-09-30Merge remote-tracking branches 'spi/topic/fsl-espi', 'spi/topic/imx', ↵Mark Brown2-1/+35
'spi/topic/jcore', 'spi/topic/loopback' and 'spi/topic/meson' into spi-next
2016-09-14spi: Broadcom BRCMSTB, NSP, NS2 SoC bindingsKamal Dasu1-0/+233
Added device tree bindings documentation for BRCMSTB, NSP, NS2 iProc SoCs supported by spi-bcm-qspi, spi-brcmstb-qspi and spi-iproc-qspi driver. Signed-off-by: Kamal Dasu <kdasu.kdev@gmail.com> Signed-off-by: Yendapally Reddy Dhananjaya Reddy <yendapally.reddy@broadcom.com> Signed-off-by: Mark Brown <broonie@kernel.org>
2016-09-12spi: meson: Add GXBB Compatible stringNeil Armstrong1-1/+1
Signed-off-by: Neil Armstrong <narmstrong@baylibre.com> Acked-by: Kevin Hilman <khilman@baylibre.com> Signed-off-by: Mark Brown <broonie@kernel.org>
2016-08-31Documentation: devicetree: spi: fix wrong spi-bus documentationGuenther Wutz1-1/+1
This patch adds missing commas to the spi-bus documentation of the cs-gpio lines. The device tree compiler fails if chip select lines are not comma-separated. Fix the erroneous documentation by adding missing commas. Signed-off-by: Guenther Wutz <info@gunibert.de> Signed-off-by: Ralf Ramsauer <ralf@ramses-pyramidenbau.de> Signed-off-by: Rob Herring <robh@kernel.org>
2016-08-08spi: jcore: add J-Core SPI master bindingsRich Felker1-0/+34
Signed-off-by: Rich Felker <dalias@libc.org> Signed-off-by: Mark Brown <broonie@kernel.org>
2016-07-25Merge remote-tracking branches 'spi/topic/pxa2xx', 'spi/topic/rockchip', ↵Mark Brown2-5/+21
'spi/topic/s3c64xx', 'spi/topic/sh' and 'spi/topic/sh-msiof' into spi-next
2016-07-25Merge remote-tracking branches 'spi/topic/octeon', 'spi/topic/omap2-mcspi', ↵Mark Brown1-1/+48
'spi/topic/orion', 'spi/topic/pic32' and 'spi/topic/pic32-sqi' into spi-next
2016-07-25Merge remote-tracking branches 'spi/topic/flash-dma', 'spi/topic/imx', ↵Mark Brown1-2/+3
'spi/topic/loopback', 'spi/topic/maintainers' and 'spi/topic/mpc52xx-psc' into spi-next
2016-07-25Merge remote-tracking branches 'spi/topic/bfin-sport', 'spi/topic/bfin5xx', ↵Mark Brown4-19/+53
'spi/topic/clps711x', 'spi/topic/doc' and 'spi/topic/dt' into spi-next
2016-07-14spi: s3c64xx: document the clocks and the clock-name propertyAndi Shyti1-0/+9
These two properties were not documented but used in the spi dts. Add the related documentation. Suggested-by: Krzysztof Kozlowski <k.kozlowski@samsung.com> Signed-off-by: Andi Shyti <andi.shyti@samsung.com> Reviewed-by: Michael Turquette <mturquette@baylibre.com> Reviewed-by: Krzysztof Kozlowski <k.kozlowski@samsung.com> Signed-off-by: Mark Brown <broonie@kernel.org>
2016-07-14spi: s3c64xx: add exynos5433 spi compatibleAndi Shyti1-1/+2
The samsung,exynos5433-spi has some peculiarities that bring the need of creating a new compatible in the binding. One of those is the 3-clocks controller management where the spi is fed with three clocks: "spi", "busclkN" and "ioclk". By adding the exynos5433-spi, we deprecate the exynos7 compatible and discourage its use. Signed-off-by: Andi Shyti <andi.shyti@samsung.com> Reviewed-by: Michael Turquette <mturquette@baylibre.com> Reviewed-by: Krzysztof Kozlowski <k.kozlowski@samsung.com> Reviewed-by: Sylwester Nawrocki <s.nawrocki@samsung.com> Signed-off-by: Mark Brown <broonie@kernel.org>
2016-07-07spi: add binding for clps711x SPIArnd Bergmann1-0/+33
This documents the binding used by Alexander Shiyan's DT support for the clps711x SPI controller. I've left the file name to match the ARM platform port name "clps711x" for consistency with the other bindings, even though the compatible string refers to the later ep7309 chip. Linux no longer supports the old clps711x and ep72xx product lines, but we still use the name. The entire family is now discontinued by the manufacturer. Signed-off-by: Arnd Bergmann <arnd@arndb.de> Signed-off-by: Mark Brown <broonie@kernel.org>
2016-06-30spi: s3c64xx: consider the case when the CS line is not connectedAndi Shyti1-0/+3
When the CS line is not connected, it is not needed to enable or disable the chip selection functionality from the s3c64xx devices in order to perform a transfer. Set the CS controller logically always enabled already during initialization (by writing '0' in the S3C64XX_SPI_SLAVE_SEL register) and never disable it. Signed-off-by: Andi Shyti <andi.shyti@samsung.com> Signed-off-by: Mark Brown <broonie@kernel.org>
2016-06-28spi: Fix typo in devicetree/bindings/spiMasanari Iida2-2/+2
This patch fix spelling typos found in Documentation/devicetree/bingings/spi. Signed-off-by: Masanari Iida <standby24x7@gmail.com> Signed-off-by: Mark Brown <broonie@kernel.org>
2016-06-22spi: Improve DT binding documentationGeert Uytterhoeven1-17/+18
- Add missing verbs and periods, - Add spaces before opening parentheses, - Align list layout, - Correct grammar, - Move "cs-gpios" from the required to the optional properties section, - Remove spaces before tabs. Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be> Signed-off-by: Mark Brown <broonie@kernel.org>
2016-06-14spi: imx: Update DT binding documentationAlexander Shiyan1-2/+3
Mark "fsl,spi-num-chipselects" property as obsolete. Signed-off-by: Alexander Shiyan <shc_work@mail.ru> Signed-off-by: Mark Brown <broonie@kernel.org>
2016-05-31spi/rockchip: add rk3036/rk3228/rk3368 SoCs for spi documentCaesar Wang1-4/+7
We had supported the rk3036/rk3066/rk3188/rk3228/rk3288/rk3368/rk3399 family SoCs in linux kernel. Let's add the other SoCs, in order to a better understanding from the rockchip spi document. Signed-off-by: Caesar Wang <wxt@rock-chips.com> Signed-off-by: Mark Brown <broonie@kernel.org>
2016-05-30spi: orion: Add direct access modeStefan Roese1-1/+48
This patch adds support for the direct access mode to the Orion SPI driver which is used on the Marvell Armada based SoCs. In this direct mode, all data written to (or read from) a specifically mapped MBus window (linked to one SPI chip-select on one of the SPI controllers) will be transferred directly to the SPI bus. Without the need to control the SPI registers in between. This can improve the SPI transfer rate in such cases. Both, direct-read and -write mode are supported. But only the write mode has been tested. This mode especially benefits from the SPI direct mode, as the data bytes are written head-to-head to the SPI bus, without any additional addresses. One use-case for this direct write mode is, programming a FPGA bitstream image into the FPGA connected to the SPI bus at maximum speed. This mode is described in chapter "22.5.2 Direct Write to SPI" in the Marvell Armada XP Functional Spec Datasheet. Signed-off-by: Stefan Roese <sr@denx.de> Acked-by: Arnd Bergmann <arnd@arndb.de> Signed-off-by: Mark Brown <broonie@kernel.org>
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