summaryrefslogtreecommitdiff
AgeCommit message (Collapse)AuthorFilesLines
2021-03-15arm64: dts: ls1028a: add interrupt to Root Complex Event CollectorMichael Walle1-0/+6
The legacy interrupt INT_A is hardwired to the event collector. RCEC is bascially supported starting with v5.11. Having a correct interrupt, will make RCEC at least probe correctly. There are still issues with how RCEC is implemented in the RCiEP on the LS1028A. RCEC will report an error, but it cannot find the correct subdevice. Signed-off-by: Michael Walle <michael@walle.cc> Reviewed-by: Vladimir Oltean <vladimir.oltean@nxp.com> Tested-by: Vladimir Oltean <vladimir.oltean@nxp.com> Signed-off-by: Shawn Guo <shawnguo@kernel.org>
2021-03-15arm64: dts: imx8mm-nitrogen-r2: Pass the i2c3 unit nameFabio Estevam1-1/+1
Pass the i2c3 unit name to fix the following W=1 build warning: arch/arm64/boot/dts/freescale/imx8mm-nitrogen-r2.dts:159.8-172.5: Warning (unit_address_vs_reg): /soc@0/bus@30800000/i2c@30a40000/i2cmux@70/i2c3: node has a reg or ranges property, but no unit name Signed-off-by: Fabio Estevam <festevam@gmail.com> Signed-off-by: Shawn Guo <shawnguo@kernel.org>
2021-03-15ARM: dts: ls1021a: Harmonize DWC USB3 DT nodes nameSerge Semin1-1/+1
In accordance with the DWC USB3 bindings the corresponding node name is suppose to comply with the Generic USB HCD DT schema, which requires the USB nodes to have the name acceptable by the regexp: "^usb(@.*)?" . Make sure the "snps,dwc3"-compatible nodes are correctly named. Signed-off-by: Serge Semin <Sergey.Semin@baikalelectronics.ru> Acked-by: Krzysztof Kozlowski <krzk@kernel.org> Signed-off-by: Shawn Guo <shawnguo@kernel.org>
2021-03-15ARM: dts: imx6qdl-wandboard: add scl/sda gpios definitions for i2c bus recoveryDima Azarkin1-2/+22
The i2c bus on imx6qdl-wandboard has intermittent issues where SDA can freeze on low level at the end of transaction so the bus can no longer work. This impacts reading of EDID data leading to incorrect TV resolution and no audio. This scenario is improved by adding scl/sda gpios definitions to implement the i2c bus recovery mechanism. Signed-off-by: Dima Azarkin <azdmg@outlook.com> Reviewed-by: Fabio Estevam <festevam@gmail.com> Signed-off-by: Shawn Guo <shawnguo@kernel.org>
2021-03-15ARM: dts: imx: Mark IIM as syscon on i.MX51/i.MX53Sebastian Reichel2-2/+2
IIM contains system fuses with information like SoC unique ID (serial) on i.MX51 and i.MX53. Add "syscon" compatible allowing simple access. Signed-off-by: Sebastian Reichel <sebastian.reichel@collabora.com> Signed-off-by: Shawn Guo <shawnguo@kernel.org>
2021-03-15ARM: dts: imx6sl-tolino-shine2hd: Add Netronix embedded controllerAndreas Kemnade1-2/+5
For now, the driver detects an incompatible version, but since that can be handled by auto-detection, add the controller to the devicetree now. Only PWM seems to be available, there is no RTC in that controller. Signed-off-by: Andreas Kemnade <andreas@kemnade.info> Reviewed-by: Jonathan Neuschäfer <j.neuschaefer@gmx.net> Signed-off-by: Shawn Guo <shawnguo@kernel.org>
2021-03-15ARM: dts: imx50-kobo-aura: Add Netronix embedded controllerJonathan Neuschäfer1-1/+15
Enable the Netronix EC on the Kobo Aura ebook reader. Several features are still missing: - Frontlight/backlight. The vendor kernel drives the frontlight LED using the PWM output of the EC and an additional boost pin that increases the brightness. - Battery monitoring - Interrupts for RTC alarm and low-battery events Signed-off-by: Jonathan Neuschäfer <j.neuschaefer@gmx.net> Signed-off-by: Shawn Guo <shawnguo@kernel.org>
2021-03-15dt-bindings: mailbox: mu: add imx8qm supportDong Aisheng1-1/+4
Add imx8qm support Cc: devicetree@vger.kernel.org Acked-by: Rob Herring <robh@kernel.org> Signed-off-by: Dong Aisheng <aisheng.dong@nxp.com> Signed-off-by: Shawn Guo <shawnguo@kernel.org>
2021-03-15dt-bindings: arm: fsl: add imx8qm boards compatible stringDong Aisheng1-0/+6
Add imx8qm boards compatible string Cc: devicetree@vger.kernel.org Acked-by: Rob Herring <robh@kernel.org> Signed-off-by: Dong Aisheng <aisheng.dong@nxp.com> Signed-off-by: Shawn Guo <shawnguo@kernel.org>
2021-03-15dt-bindings: arm: fsl: add Kontron pITX-imx8m boardHeiko Thiery1-0/+1
Add the Kontron pITX-imx8m board. Signed-off-by: Heiko Thiery <heiko.thiery@gmail.com> Reviewed-by: Krzysztof Kozlowski <krzk@kernel.org> Acked-by: Rob Herring <robh@kernel.org> Signed-off-by: Shawn Guo <shawnguo@kernel.org>
2021-03-15dt-bindings: arm: fsl: Add Engicam i.Core MX8M Mini EDIMM2.2 Starter KitJagan Teki1-1/+3
i.Core MX8M Mini is an EDIMM SoM based on NXP i.MX8M Mini from Engicam. EDIMM2.2 Starter Kit is an EDIMM 2.2 Form Factor Capacitive Evaluation Board from Engicam. i.Core MX8M Mini needs to mount on top of this Evaluation board for creating complete i.Core MX8M Mini EDIMM2.2 Starter Kit. Add bindings for it. Signed-off-by: Jagan Teki <jagan@amarulasolutions.com> Acked-by: Rob Herring <robh@kernel.org> Reviewed-by: Krzysztof Kozlowski <krzk@kernel.org> Signed-off-by: Shawn Guo <shawnguo@kernel.org>
2021-03-15dt-bindings: arm: fsl: Add Engicam i.Core MX8M Mini C.TOUCH 2.0Jagan Teki1-0/+6
i.Core MX8M Mini is an EDIMM SoM based on NXP i.MX8M Mini from Engicam. C.TOUCH 2.0 is a general purpose carrier board with capacitive touch interface support. i.Core MX8M Mini needs to mount on top of this Carrier board for creating complete i.Core MX8M Mini C.TOUCH 2.0 board. Add bindings for it. Signed-off-by: Jagan Teki <jagan@amarulasolutions.com> Reviewed-by: Krzysztof Kozlowski <krzk@kernel.org> Acked-by: Rob Herring <robh@kernel.org> Signed-off-by: Shawn Guo <shawnguo@kernel.org>
2021-03-15dt-bindings: clock: imx8qxp-lpcg: correct the example clock-namesPeng Fan1-3/+3
Align with all other i.MX using the mmc controller, align the clock-names. Signed-off-by: Peng Fan <peng.fan@nxp.com> Acked-by: Rob Herring <robh@kernel.org> Signed-off-by: Shawn Guo <shawnguo@kernel.org>
2021-03-13arm64: dts: broadcom: bcm4908: set Asus GT-AC5300 port 7 PHY modeRafał Miłecki1-0/+1
Port 7 is connected to the external BCM53134S switch using RGMII. Fixes: 527a3ac9bdf8 ("arm64: dts: broadcom: bcm4908: describe internal switch") Signed-off-by: Rafał Miłecki <rafal@milecki.pl> Signed-off-by: Florian Fainelli <f.fainelli@gmail.com>
2021-03-13arm64: dts: broadcom: bcm4908: add TP-Link Archer C2300 V1Rafał Miłecki2-0/+183
Archer C2300 V1 is a home router based on the BCM4906 (2 CPU cores). It has 512 MiB of RAM, NAND flash, USB 2.0 and USB 3.0 ports, 4 LAN ports, 1 WAN port. Signed-off-by: Rafał Miłecki <rafal@milecki.pl> Signed-off-by: Florian Fainelli <f.fainelli@gmail.com>
2021-03-13dt-bindings: arm: bcm: document TP-Link Archer C2300 bindingRafał Miłecki1-0/+1
One more BCM4906 based device. Signed-off-by: Rafał Miłecki <rafal@milecki.pl> Reviewed-by: Rob Herring <robh@kernel.org> Signed-off-by: Florian Fainelli <f.fainelli@gmail.com>
2021-03-13arm64: dts: qcom: pm8150: Enable RTCBjorn Andersson3-11/+1
The PM8150 comes with everything the RTC needs, so let's just leave it enabled instead of having to explicitly enable it for all boards. In effect this patch enables the RTC on the SM8150 MTP and the SM8250 HDK. Acked-by: Dmitry Baryshkov <dmitry.baryshkov@linaro.org> Signed-off-by: Bjorn Andersson <bjorn.andersson@linaro.org> Link: https://lore.kernel.org/r/20210106001004.4081508-1-bjorn.andersson@linaro.org Signed-off-by: Bjorn Andersson <bjorn.andersson@linaro.org>
2021-03-12arm64: dts: qcom: sm8350-mtp: Add PMICsVinod Koul1-0/+6
SM8350-MTP features PM8350, PM8350B, PM8350C, PMK8350, PMR735A and PMR735B. PMICs Add the dtsi for these PMICs to MTP. Signed-off-by: Vinod Koul <vkoul@kernel.org> Link: https://lore.kernel.org/r/20210312052737.3558801-9-vkoul@kernel.org Signed-off-by: Bjorn Andersson <bjorn.andersson@linaro.org>
2021-03-12arm64: dts: qcom: pmr735B: Add base dts fileVinod Koul1-0/+25
Add base DTS file for PMR735B along with GPIO node Signed-off-by: Vinod Koul <vkoul@kernel.org> Link: https://lore.kernel.org/r/20210312052737.3558801-8-vkoul@kernel.org Signed-off-by: Bjorn Andersson <bjorn.andersson@linaro.org>
2021-03-12arm64: dts: qcom: pmr735a: Add base dts fileVinod Koul1-0/+25
Add base DTS file for PMR735A along with GPIO node Signed-off-by: Vinod Koul <vkoul@kernel.org> Link: https://lore.kernel.org/r/20210312052737.3558801-7-vkoul@kernel.org Signed-off-by: Bjorn Andersson <bjorn.andersson@linaro.org>
2021-03-12arm64: dts: qcom: pm8350c: Add base dts fileVinod Koul1-0/+25
Add base DTS file for PM8350C along with GPIO node Signed-off-by: Vinod Koul <vkoul@kernel.org> Link: https://lore.kernel.org/r/20210312052737.3558801-6-vkoul@kernel.org Signed-off-by: Bjorn Andersson <bjorn.andersson@linaro.org>
2021-03-12arm64: dts: qcom: pm8350b: Add base dts fileVinod Koul1-0/+25
Add base DTS file for PM8350B along with GPIO node Signed-off-by: Vinod Koul <vkoul@kernel.org> Link: https://lore.kernel.org/r/20210312052737.3558801-5-vkoul@kernel.org Signed-off-by: Bjorn Andersson <bjorn.andersson@linaro.org>
2021-03-12arm64: dts: qcom: pm8350: Add base dts fileVinod Koul1-0/+25
Add base DTS file for PM8350 along with GPIO node Signed-off-by: Vinod Koul <vkoul@kernel.org> Link: https://lore.kernel.org/r/20210312052737.3558801-4-vkoul@kernel.org Signed-off-by: Bjorn Andersson <bjorn.andersson@linaro.org>
2021-03-12arm64: dts: qcom: pmk8350: Add base dts fileVinod Koul1-0/+25
Add base DTS file for PMK8350 along with GPIO node Signed-off-by: Vinod Koul <vkoul@kernel.org> Link: https://lore.kernel.org/r/20210312052737.3558801-3-vkoul@kernel.org Signed-off-by: Bjorn Andersson <bjorn.andersson@linaro.org>
2021-03-12arm64: dts: qcom: sm8350: Add spmi nodeVinod Koul1-0/+18
Add SPMI node found in SM8350 SoC Signed-off-by: Vinod Koul <vkoul@kernel.org> Link: https://lore.kernel.org/r/20210312052737.3558801-2-vkoul@kernel.org Signed-off-by: Bjorn Andersson <bjorn.andersson@linaro.org>
2021-03-12arm64: dts: renesas: r8a77961: Add CAN nodesYoshihiro Shimoda1-2/+24
Add the device nodes for all CAN nodes on R-Car M3-W+. Signed-off-by: Yoshihiro Shimoda <yoshihiro.shimoda.uh@renesas.com> Tested-by: Yusuke Goda <yusuke.goda.sx@renesas.com> Link: https://lore.kernel.org/r/20210312025420.529339-3-yoshihiro.shimoda.uh@renesas.com Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
2021-03-12arm64: dts: renesas: r8a779a0: Add CMT supportPhong Hoang1-0/+70
This patch adds CMT{0|1|2|3} device nodes for R-Car V3U (r8a779a0) SoC. Signed-off-by: Phong Hoang <phong.hoang.wz@renesas.com> [wsa: rebased, double checked values, corrected sorting] Signed-off-by: Wolfram Sang <wsa+renesas@sang-engineering.com> Link: https://lore.kernel.org/r/20210311092939.3129-3-wsa+renesas@sang-engineering.com Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
2021-03-12arm64: dts: renesas: r8a779a0: Add thermal supportNiklas Söderlund1-0/+85
Add support for thermal. Signed-off-by: Niklas Söderlund <niklas.soderlund+renesas@ragnatech.se> Link: https://lore.kernel.org/r/20210310110951.3299524-1-niklas.soderlund+renesas@ragnatech.se Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
2021-03-12arm64: dts: qcom: db845c: fix correct powerdown pin for WSA881xSrinivas Kandagatla1-2/+2
WSA881x powerdown pin is connected to GPIO1 not gpio2, so correct this. This was working so far due to a shift bug in gpio driver, however once that is fixed this will stop working, so fix this! Fixes: 89a32a4e769cc ("arm64: dts: qcom: db845c: add analog audio support") Signed-off-by: Srinivas Kandagatla <srinivas.kandagatla@linaro.org> Link: https://lore.kernel.org/r/20210309102025.28405-1-srinivas.kandagatla@linaro.org Signed-off-by: Bjorn Andersson <bjorn.andersson@linaro.org>
2021-03-12dt-bindings: arm: qcom: Add SM8350 HDKBjorn Andersson1-0/+1
Document the SM8350 Hardware Development Kit (HDK). Reviewed-by: Vinod Koul <vkoul@kernel.org> Reported-by: Vinod Koul <vkoul@kernel.org> Signed-off-by: Bjorn Andersson <bjorn.andersson@linaro.org> Link: https://lore.kernel.org/r/20210310035710.2816699-1-bjorn.andersson@linaro.org Signed-off-by: Bjorn Andersson <bjorn.andersson@linaro.org>
2021-03-12arm64: dts: qcom: sc7180: Drop duplicate dp_hot_plug_det node in trogdorStephen Boyd1-14/+0
This moved from being trogdor specific to being part of the general sc7180.dtsi SoC file in commit 681a607ad21a ("arm64: dts: qcom: sc7180: Add DisplayPort HPD pin dt node"). Then we dropped the pinconf from the general sc7180.dtsi file in commit 8d079bf20410 ("arm64: dts: qcom: sc7180: Drop pinconf on dp_hot_plug_det") and added it back to the trogdor dts file in commit f772081f4883 ("arm64: dts: qcom: sc7180: Add "dp_hot_plug_det" pinconf for trogdor"). As part of this we managed to forget to drop the old copy in the trogdor dts. Let's do it now. Signed-off-by: Stephen Boyd <swboyd@chromium.org> [dianders: updated desc] Signed-off-by: Douglas Anderson <dianders@chromium.org> Link: https://lore.kernel.org/r/20210311131008.1.I85fc8146c0ee47e261faa0c54dd621467b81952d@changeid Signed-off-by: Bjorn Andersson <bjorn.andersson@linaro.org>
2021-03-12arm64: dts: qcom: sm8350: fix number of pins in 'gpio-ranges'Shawn Guo1-1/+1
The last cell of 'gpio-ranges' should be number of GPIO pins, and in case of qcom platform it should match msm_pinctrl_soc_data.ngpio rather than msm_pinctrl_soc_data.ngpio - 1. This fixes the problem that when the last GPIO pin in the range is configured with the following call sequence, it always fails with -EPROBE_DEFER. pinctrl_gpio_set_config() pinctrl_get_device_gpio_range() pinctrl_match_gpio_range() Fixes: b7e8f433a673 ("arm64: dts: qcom: Add basic devicetree support for SM8350 SoC") Cc: Vinod Koul <vkoul@kernel.org> Signed-off-by: Shawn Guo <shawn.guo@linaro.org> Link: https://lore.kernel.org/r/20210303033106.549-5-shawn.guo@linaro.org Signed-off-by: Bjorn Andersson <bjorn.andersson@linaro.org>
2021-03-12arm64: dts: qcom: sm8250: fix number of pins in 'gpio-ranges'Shawn Guo1-1/+1
The last cell of 'gpio-ranges' should be number of GPIO pins, and in case of qcom platform it should match msm_pinctrl_soc_data.ngpio rather than msm_pinctrl_soc_data.ngpio - 1. This fixes the problem that when the last GPIO pin in the range is configured with the following call sequence, it always fails with -EPROBE_DEFER. pinctrl_gpio_set_config() pinctrl_get_device_gpio_range() pinctrl_match_gpio_range() Fixes: 16951b490b20 ("arm64: dts: qcom: sm8250: Add TLMM pinctrl node") Cc: Bjorn Andersson <bjorn.andersson@linaro.org> Signed-off-by: Shawn Guo <shawn.guo@linaro.org> Link: https://lore.kernel.org/r/20210303033106.549-4-shawn.guo@linaro.org Signed-off-by: Bjorn Andersson <bjorn.andersson@linaro.org>
2021-03-12arm64: dts: qcom: sm8150: fix number of pins in 'gpio-ranges'Shawn Guo1-1/+1
The last cell of 'gpio-ranges' should be number of GPIO pins, and in case of qcom platform it should match msm_pinctrl_soc_data.ngpio rather than msm_pinctrl_soc_data.ngpio - 1. This fixes the problem that when the last GPIO pin in the range is configured with the following call sequence, it always fails with -EPROBE_DEFER. pinctrl_gpio_set_config() pinctrl_get_device_gpio_range() pinctrl_match_gpio_range() Fixes: e13c6d144fa0 ("arm64: dts: qcom: sm8150: Add base dts file") Cc: Vinod Koul <vkoul@kernel.org> Signed-off-by: Shawn Guo <shawn.guo@linaro.org> Link: https://lore.kernel.org/r/20210303033106.549-3-shawn.guo@linaro.org Signed-off-by: Bjorn Andersson <bjorn.andersson@linaro.org>
2021-03-12arm64: dts: qcom: sdm845: fix number of pins in 'gpio-ranges'Shawn Guo1-1/+1
The last cell of 'gpio-ranges' should be number of GPIO pins, and in case of qcom platform it should match msm_pinctrl_soc_data.ngpio rather than msm_pinctrl_soc_data.ngpio - 1. This fixes the problem that when the last GPIO pin in the range is configured with the following call sequence, it always fails with -EPROBE_DEFER. pinctrl_gpio_set_config() pinctrl_get_device_gpio_range() pinctrl_match_gpio_range() Fixes: bc2c806293c6 ("arm64: dts: qcom: sdm845: Add gpio-ranges to TLMM node") Cc: Evan Green <evgreen@chromium.org> Signed-off-by: Shawn Guo <shawn.guo@linaro.org> Link: https://lore.kernel.org/r/20210303033106.549-2-shawn.guo@linaro.org Signed-off-by: Bjorn Andersson <bjorn.andersson@linaro.org>
2021-03-12arm64: dts: qcom: sc7280: Add rpmh power-domain nodeRajendra Nayak1-0/+47
Add the DT node for the rpmhpd power controller on SC7280 SoCs. Signed-off-by: Rajendra Nayak <rnayak@codeaurora.org> Reviewed-by: Stephen Boyd <swboyd@chromium.org> Link: https://lore.kernel.org/r/1615461961-17716-15-git-send-email-rnayak@codeaurora.org Signed-off-by: Bjorn Andersson <bjorn.andersson@linaro.org>
2021-03-12arm64: dts: qcom: sc7280: Add cpuidle statesMaulik Shah1-0/+78
Add cpuidle states for little and big cpus. The latency values are preliminary placeholders and will be updated once testing provides the real numbers. Signed-off-by: Maulik Shah <mkshah@codeaurora.org> Signed-off-by: Rajendra Nayak <rnayak@codeaurora.org> Reviewed-by: Stephen Boyd <swboyd@chromium.org> Link: https://lore.kernel.org/r/1615461961-17716-14-git-send-email-rnayak@codeaurora.org Signed-off-by: Bjorn Andersson <bjorn.andersson@linaro.org>
2021-03-12arm64: dts: qcom: sc7280: Add SPMI PMIC arbiter device for SC7280satya priya1-0/+18
Add SPMI PMIC arbiter device to communicate with PMICs attached to SPMI bus. Signed-off-by: satya priya <skakit@codeaurora.org> Signed-off-by: Rajendra Nayak <rnayak@codeaurora.org> Link: https://lore.kernel.org/r/1615461961-17716-13-git-send-email-rnayak@codeaurora.org Signed-off-by: Bjorn Andersson <bjorn.andersson@linaro.org>
2021-03-12arm64: dts: qcom: sc7280: Add APSS watchdog nodeSai Prakash Ranjan1-0/+7
Add APSS (Application Processor Subsystem) watchdog DT node for SC7280 SoC. Signed-off-by: Sai Prakash Ranjan <saiprakash.ranjan@codeaurora.org> Signed-off-by: Rajendra Nayak <rnayak@codeaurora.org> Reviewed-by: Stephen Boyd <swboyd@chromium.org> Link: https://lore.kernel.org/r/1615461961-17716-12-git-send-email-rnayak@codeaurora.org Signed-off-by: Bjorn Andersson <bjorn.andersson@linaro.org>
2021-03-12arm64: dts: qcom: sc7280: Add reserved memory for fwMaulik Shah1-0/+10
Add fw reserved memory area for CPUCP (CPUSS control processor) and AOP (Always ON processor) Signed-off-by: Maulik Shah <mkshah@codeaurora.org> Signed-off-by: Rajendra Nayak <rnayak@codeaurora.org> Link: https://lore.kernel.org/r/1615461961-17716-10-git-send-email-rnayak@codeaurora.org Signed-off-by: Bjorn Andersson <bjorn.andersson@linaro.org>
2021-03-12arm64: dts: qcom: sc7280: Add device node for APPS SMMUSai Prakash Ranjan1-0/+89
Adding device node for APPS SMMU available on SC7280 chipset. This is shared among the multiple client devices such as display, video, usb, mmc and others. Signed-off-by: Sai Prakash Ranjan <saiprakash.ranjan@codeaurora.org> Signed-off-by: Rajendra Nayak <rnayak@codeaurora.org> Link: https://lore.kernel.org/r/1615461961-17716-9-git-send-email-rnayak@codeaurora.org Signed-off-by: Bjorn Andersson <bjorn.andersson@linaro.org>
2021-03-12arm64: dts: qcom: SC7280: Add rpmhcc clock controller nodeRajendra Nayak1-0/+16
Add rpmhcc clock controller node for SC7280. Also add references to rpmhcc clocks in gcc. Signed-off-by: Taniya Das <tdas@codeaurora.org> Signed-off-by: Rajendra Nayak <rnayak@codeaurora.org> Reviewed-by: Stephen Boyd <swboyd@chromium.org> Link: https://lore.kernel.org/r/1615461961-17716-7-git-send-email-rnayak@codeaurora.org Signed-off-by: Bjorn Andersson <bjorn.andersson@linaro.org>
2021-03-12arm64: dts: qcom: sc7280: Add RSC and PDC devicesMaulik Shah1-0/+44
Add PDC interrupt controller along with apps RSC device. Also add reserved memory for command_db. Signed-off-by: Maulik Shah <mkshah@codeaurora.org> Signed-off-by: Rajendra Nayak <rnayak@codeaurora.org> Link: https://lore.kernel.org/r/1615461961-17716-6-git-send-email-rnayak@codeaurora.org Signed-off-by: Bjorn Andersson <bjorn.andersson@linaro.org>
2021-03-12arm64: dts: qcom: sc7280: Add basic dts/dtsi files for sc7280 socRajendra Nayak3-0/+347
Add initial device tree support for the sc7280 SoC and the IDP boards based on this SoC Signed-off-by: Rajendra Nayak <rnayak@codeaurora.org> Reviewed-by: Stephen Boyd <swboyd@chromium.org> Link: https://lore.kernel.org/r/1615461961-17716-4-git-send-email-rnayak@codeaurora.org Signed-off-by: Bjorn Andersson <bjorn.andersson@linaro.org>
2021-03-12dt-bindings: arm: qcom: Document sc7280 SoC and boardRajendra Nayak1-0/+6
Document the sc7280 SoC and the IDP board bindings Signed-off-by: Rajendra Nayak <rnayak@codeaurora.org> Reviewed-by: Stephen Boyd <swboyd@chromium.org> Acked-by: Rob Herring <robh@kernel.org> Link: https://lore.kernel.org/r/1615461961-17716-2-git-send-email-rnayak@codeaurora.org Signed-off-by: Bjorn Andersson <bjorn.andersson@linaro.org>
2021-03-12arm64: dts: qcom: Introduce SM8350 HDKBjorn Andersson2-0/+320
Add initial DTS for the Snapdragon 888 Mobile Hardware Development Kit, aka SM8350 HDK. This initial version describes debug UART, UFS storage, the three USB connectors and remoteprocs. Reviewed-by: Konrad Dybcio <konrad.dybcio@somainline.org> Reviewed-by: Vinod Koul <vkoul@kernel.org> Signed-off-by: Bjorn Andersson <bjorn.andersson@linaro.org> Link: https://lore.kernel.org/r/20210308182113.1284966-1-bjorn.andersson@linaro.org Signed-off-by: Bjorn Andersson <bjorn.andersson@linaro.org>
2021-03-12dt-bindings: arm: qcom: Document sony boards for apq8094Vinod Koul1-0/+10
Document the various sony boards for apq8094. These are used in various sony dts files but not documented Signed-off-by: Vinod Koul <vkoul@kernel.org> Link: https://lore.kernel.org/r/20210308060826.3074234-6-vkoul@kernel.org Signed-off-by: Bjorn Andersson <bjorn.andersson@linaro.org>
2021-03-12arm64: dts: qcom: msm8994: don't use empty memory nodeVinod Koul1-2/+2
We expect bootloader to full memory details but passing empty values gives warning, so add a default value arch/arm64/boot/dts/qcom/apq8094-sony-xperia-kitakami-karin_windy.dt.yaml: /: memory: False schema does not allow {'device_type': ['memory'], 'reg': [[0, 0, 0, 0]]} Signed-off-by: Vinod Koul <vkoul@kernel.org> Link: https://lore.kernel.org/r/20210308060826.3074234-5-vkoul@kernel.org Signed-off-by: Bjorn Andersson <bjorn.andersson@linaro.org>
2021-03-12dt-bindings: arm: qcom: Document ipq6018-cp01 boardVinod Koul1-0/+1
Document the ipq6018-cp01 board. It was missing leading to warning: arch/arm64/boot/dts/qcom/ipq6018-cp01-c1.dt.yaml: /: compatible: 'oneOf' conditional failed, one must be fixed: ['qcom,ipq6018-cp01', 'qcom,ipq6018'] is too short ['qcom,ipq6018-cp01', 'qcom,ipq6018'] is too long Additional items are not allowed ('qcom,ipq6018' was unexpected) Signed-off-by: Vinod Koul <vkoul@kernel.org> Link: https://lore.kernel.org/r/20210308060826.3074234-4-vkoul@kernel.org Signed-off-by: Bjorn Andersson <bjorn.andersson@linaro.org>
2021-03-12arm64: dts: qcom: msm8916: don't use empty memory nodeVinod Koul1-2/+2
We expect bootloader to full memory details but passing empty values gives warning, so add a default value arch/arm64/boot/dts/qcom/apq8016-sbc.dt.yaml: /: memory: False schema does not allow {'device_type': ['memory'], 'reg': [[0, 0, 0, 0]]} Signed-off-by: Vinod Koul <vkoul@kernel.org> Link: https://lore.kernel.org/r/20210308060826.3074234-3-vkoul@kernel.org Signed-off-by: Bjorn Andersson <bjorn.andersson@linaro.org>