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The ARM architected timer is part of ARM CPU design therefore by
convention it should not be inside the soc node. This also fixes dtc
warning like:
arch/arm64/boot/dts/intel/socfpga_agilex.dtsi:410.9-416.5:
Warning (simple_bus_reg): /soc/timer: missing or empty reg/ranges property
Signed-off-by: Krzysztof Kozlowski <krzk@kernel.org>
Signed-off-by: Dinh Nguyen <dinguyen@kernel.org>
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The clocks are usually not part of the SoC but provided on the board
(external oscillators). Moving them out of soc node fixes dtc warning:
arch/arm64/boot/dts/intel/socfpga_agilex.dtsi:111.10-137.5:
Warning (simple_bus_reg): /soc/clocks: missing or empty reg/ranges property
Signed-off-by: Krzysztof Kozlowski <krzk@kernel.org>
Signed-off-by: Dinh Nguyen <dinguyen@kernel.org>
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Using full paths to extend or override a device tree node is error
prone. If there was a typo error, a new node will be created instead of
extending the existing node. This will lead to run-time errors that
could be hard to detect.
A mistyped label on the other hand, will cause a dtc compile error
(during build time).
Signed-off-by: Krzysztof Kozlowski <krzk@kernel.org>
Signed-off-by: Dinh Nguyen <dinguyen@kernel.org>
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This simple patch activates SMP for mt6589 by adding the missing
"enable-method" property. After applying this patch kernel log
indicates all cores are brought up:
[ 0.070122] CPU0: thread -1, cpu 0, socket 0, mpidr 80000000
[ 0.071652] Setting up static identity map for 0x80100000 - 0x80100054
[ 0.072711] rcu: Hierarchical SRCU implementation.
[ 0.073853] smp: Bringing up secondary CPUs ...
[ 0.133675] CPU1: thread -1, cpu 1, socket 0, mpidr 80000001
[ 0.193675] CPU2: thread -1, cpu 2, socket 0, mpidr 80000002
[ 0.253675] CPU3: thread -1, cpu 3, socket 0, mpidr 80000003
[ 0.253818] smp: Brought up 1 node, 4 CPUs
[ 0.256930] SMP: Total of 4 processors activated (7982.28 BogoMIPS).
[ 0.257855] CPU: All CPU(s) started in SVC mode.
Before this change CPU cores 1-3 didn't start and the following lines
were in kernel log:
[ 0.070126] CPU0: thread -1, cpu 0, socket 0, mpidr 80000000
[ 0.071640] Setting up static identity map for 0x80100000 - 0x80100054
[ 0.072706] rcu: Hierarchical SRCU implementation.
[ 0.073850] smp: Bringing up secondary CPUs ...
[ 0.076052] smp: Brought up 1 node, 1 CPU
[ 0.076678] SMP: Total of 1 processors activated (2000.48 BogoMIPS).
[ 0.077603] CPU: All CPU(s) started in SVC mode.
Signed-off-by: Boris Lysov <arzamas-16@mail.ee>
Link: https://lore.kernel.org/r/20210314023735.052d2d35@pc
Signed-off-by: Matthias Brugger <matthias.bgg@gmail.com>
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Add binding documentation for the MT8516 Pumpkin board.
Signed-off-by: Fabien Parent <fparent@baylibre.com>
Acked-by: Rob Herring <robh@kernel.org>
Link: https://lore.kernel.org/r/20210223223613.2085827-1-fparent@baylibre.com
Signed-off-by: Matthias Brugger <matthias.bgg@gmail.com>
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This just illustrates one of possible combinations. User should setup
the corresponding pins according to the onboard RF data that stores
in eeprom.
Signed-off-by: Ryder Lee <ryder.lee@mediatek.com>
Link: https://lore.kernel.org/r/641c5e40f54e7c9c8eaa6be398d7169445b6fede.1617006498.git.ryder.lee@mediatek.com
Signed-off-by: Matthias Brugger <matthias.bgg@gmail.com>
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The TVK1281618 R3 UIB has a Cypress CTTYSP touchscreen.
Add it to the device tree file.
Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
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The voltage default on the AB8500 VAUX1 regulator is way
too low and does not correspond to the setting in the
vendor tree. This should be 2.8-3.3 V not 2.5-2.9 V or
things like the HREFP520 touchscreen will not work.
Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
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This updates dt-binding documentation for MediaTek mt8192
Signed-off-by: Ryan Wu <Yz.Wu@mediatek.com>
Acked-by: Rob Herring <robh@kernel.org>
Link: https://lore.kernel.org/r/1612151986-19820-2-git-send-email-Yz.Wu@mediatek.com
Signed-off-by: Matthias Brugger <matthias.bgg@gmail.com>
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Due to a hardware bug preventing the correct detection if the ID pin
the USB OTG port cannot be used in otg mode. It can either be set to
host or peripheral. Set it to peripheral so vbus is disabled by default.
Signed-off-by: Stefan Riedmueller <s.riedmueller@phytec.de>
Reviewed-by: Fabio Estevam <festevam@gmail.com>
Signed-off-by: Shawn Guo <shawnguo@kernel.org>
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The pinmuxing for the enable pin of the usbh1 node is wrong. It needs to
be muxed as GPIO. While at it, move the pinctrl to the vbus regulator
since it is actually the regulator enable pin.
Signed-off-by: Stefan Riedmueller <s.riedmueller@phytec.de>
Reviewed-by: Fabio Estevam <festevam@gmail.com>
Signed-off-by: Shawn Guo <shawnguo@kernel.org>
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sm8350 has 29 thermal sensors split across two tsens controllers. Add
the thermal zones to expose them and wireup the cpus to throttle their
frequencies on crossing passive temperature thresholds.
Signed-off-by: Robert Foss <robert.foss@linaro.org>
Reviewed-by: Vinod Koul <vkoul@kernel.org>
Link: https://lore.kernel.org/r/20210324124308.1265626-2-robert.foss@linaro.org
Signed-off-by: Bjorn Andersson <bjorn.andersson@linaro.org>
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Tested on the OnePlus 7 Pro (including DMA).
Signed-off-by: Caleb Connolly <caleb@connolly.tech>
Reviewed-by: Vinod Koul <vkoul@kernel.org>
Reviewed-by: Bhupesh Sharma <bhupesh.sharma@linaro.org>
Link: https://lore.kernel.org/r/20210321174522.123036-3-caleb@connolly.tech
Signed-off-by: Bjorn Andersson <bjorn.andersson@linaro.org>
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Add the first and third qupv3 nodes used to hook
up peripherals on some devices, as well as the iommus properties for all
of them.
Signed-off-by: Caleb Connolly <caleb@connolly.tech>
Link: https://lore.kernel.org/r/20210321174522.123036-2-caleb@connolly.tech
Signed-off-by: Bjorn Andersson <bjorn.andersson@linaro.org>
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Apply these fixes to the newly added sm8250 display ndoes
- Remove "notused" interconnect (which apparently was blindly copied from
my old patches)
- Use dispcc node example from dt-bindings, removing clocks which aren't
documented or used by the driver and fixing the region size.
Fixes: 7c1dffd471b1 ("arm64: dts: qcom: sm8250.dtsi: add display system nodes")
Signed-off-by: Jonathan Marek <jonathan@marek.ca>
[DB: compatibility changes split into separate patch]
Signed-off-by: Dmitry Baryshkov <dmitry.baryshkov@linaro.org>
Link: https://lore.kernel.org/r/20210329120051.3401567-2-dmitry.baryshkov@linaro.org
Signed-off-by: Bjorn Andersson <bjorn.andersson@linaro.org>
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On most BCM4908 devices MAC address can be read from the bootloader
binary section containing device settings. Use NVMEM to describe that.
Signed-off-by: Rafał Miłecki <rafal@milecki.pl>
Signed-off-by: Florian Fainelli <f.fainelli@gmail.com>
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Set Linux default trigger to default on, just like it's normally done
for power LEDs.
Signed-off-by: Rafał Miłecki <rafal@milecki.pl>
Signed-off-by: Florian Fainelli <f.fainelli@gmail.com>
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Partitions are basically fixed indeed but firmware ones don't have
hardcoded function ("firmware" vs "failsafe"). Actual function depends
on bootloader configuration. Use a proper binding for that.
While at it fix numbers formatting to avoid:
arch/arm/boot/dts/bcm47094-linksys-panamera.dt.yaml: partitions: 'partition@1F00000' does not match any of the regexes: '^partition@[0-9a-f]+$', 'pinctrl-[0-9]+'
From schema: Documentation/devicetree/bindings/mtd/partitions/linksys,ns-partitions.yaml
Signed-off-by: Rafał Miłecki <rafal@milecki.pl>
Signed-off-by: Florian Fainelli <f.fainelli@gmail.com>
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Due to power domain controller is added, the power domain's
phanle is also changed from 'scpsys' to 'spm', but forget to
modify pmic node's
Fixes: 8b6562644df9 ("arm64: dts: mediatek: Add mt8173 power domain controller")
Signed-off-by: Chunfeng Yun <chunfeng.yun@mediatek.com>
Reviewed-by: Enric Balletbo i Serra <enric.balletbo@collabora.com>
Link: https://lore.kernel.org/r/1616048328-13579-1-git-send-email-chunfeng.yun@mediatek.com
Signed-off-by: Matthias Brugger <matthias.bgg@gmail.com>
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Add two passive trip points at 68°C and 80°C for the CPU temperature.
Signed-off-by: Matthias Kaehlcke <mka@chromium.org>
Signed-off-by: Michael Kao <michael.kao@mediatek.com>
Tested-by: Hsin-Yi Wang <hsinyi@chromium.org>
Signed-off-by: Matthias Brugger <matthias.bgg@gmail.com>
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Add thermal zone node to Mediatek MT8183 dts file.
Evaluate the thermal zone every 500ms while not cooling
and every 100ms when passive cooling is performed.
Signed-off-by: Matthias Kaehlcke <mka@chromium.org>
Tested-by: Hsin-Yi Wang <hsinyi@chromium.org>
Signed-off-by: Michael Kao <michael.kao@mediatek.com>
Signed-off-by: Matthias Brugger <matthias.bgg@gmail.com>
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Add mediatek,gce-client-reg for mmsys, ccorr, aal, gamma, dither.
Fixes: 91f9c963ce79 ("arm64: dts: mt8183: Add display nodes for MT8183")
Signed-off-by: Hsin-Yi Wang <hsinyi@chromium.org>
Tested-by: Enric Balletbo i Serra <enric.balletbo@collabora.com>
Link: https://lore.kernel.org/r/20210324070842.1037233-1-hsinyi@chromium.org
Signed-off-by: Matthias Brugger <matthias.bgg@gmail.com>
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This is used to fix dtbs_check warning
Signed-off-by: Chunfeng Yun <chunfeng.yun@mediatek.com>
Link: https://lore.kernel.org/r/20210316092232.9806-13-chunfeng.yun@mediatek.com
Signed-off-by: Matthias Brugger <matthias.bgg@gmail.com>
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This is used to fix dtbs_check warning
Signed-off-by: Chunfeng Yun <chunfeng.yun@mediatek.com>
Link: https://lore.kernel.org/r/20210316092232.9806-12-chunfeng.yun@mediatek.com
Signed-off-by: Matthias Brugger <matthias.bgg@gmail.com>
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This is used to fix dtbs_check warning
Signed-off-by: Chunfeng Yun <chunfeng.yun@mediatek.com>
Link: https://lore.kernel.org/r/20210316092232.9806-11-chunfeng.yun@mediatek.com
Signed-off-by: Matthias Brugger <matthias.bgg@gmail.com>
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Harmonize node names, compatibles and properties.
Signed-off-by: Chunfeng Yun <chunfeng.yun@mediatek.com>
Link: https://lore.kernel.org/r/20210316092232.9806-10-chunfeng.yun@mediatek.com
Signed-off-by: Matthias Brugger <matthias.bgg@gmail.com>
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This is used to fix dtbs_check warning
Signed-off-by: Chunfeng Yun <chunfeng.yun@mediatek.com>
Link: https://lore.kernel.org/r/20210316092232.9806-9-chunfeng.yun@mediatek.com
Signed-off-by: Matthias Brugger <matthias.bgg@gmail.com>
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This is used to fix dtbs_check warning:
harmonize node names and compatibles;
add property "usb-role-switch" for connector dependence.
Signed-off-by: Chunfeng Yun <chunfeng.yun@mediatek.com>
Link: https://lore.kernel.org/r/20210316092232.9806-8-chunfeng.yun@mediatek.com
Signed-off-by: Matthias Brugger <matthias.bgg@gmail.com>
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This is used to fix dtbs_check warning.
Signed-off-by: Chunfeng Yun <chunfeng.yun@mediatek.com>
Link: https://lore.kernel.org/r/20210316092232.9806-7-chunfeng.yun@mediatek.com
Signed-off-by: Matthias Brugger <matthias.bgg@gmail.com>
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Harmonize nodes names, compatibles and remove unused property.
Signed-off-by: Chunfeng Yun <chunfeng.yun@mediatek.com>
Link: https://lore.kernel.org/r/20210316092232.9806-6-chunfeng.yun@mediatek.com
Signed-off-by: Matthias Brugger <matthias.bgg@gmail.com>
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Use 'phys' instead of 'phy'.
Fixes: 81ad4dbaf7af ("arm64: dts: mt8173: Add display subsystem related nodes")
Signed-off-by: Chunfeng Yun <chunfeng.yun@mediatek.com>
Reviewed-by: Chun-Kuang Hu <chunkuang.hu@kernel.org>
Cc: stable <stable@vger.kernel.org>
Link: https://lore.kernel.org/r/20210316092232.9806-5-chunfeng.yun@mediatek.com
Signed-off-by: Matthias Brugger <matthias.bgg@gmail.com>
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This commit adds dt-binding documentation for the Mediatek MT8195
reference board.
Signed-off-by: Seiya Wang <seiya.wang@mediatek.com>
Acked-by: Rob Herring <robh@kernel.org>
Link: https://lore.kernel.org/r/20210319023427.16711-8-seiya.wang@mediatek.com
Signed-off-by: Matthias Brugger <matthias.bgg@gmail.com>
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This commit adds dt-binding documentation of uart for Mediatek MT8195 SoC
Platform.
Signed-off-by: Seiya Wang <seiya.wang@mediatek.com>
Link: https://lore.kernel.org/r/20210319023427.16711-4-seiya.wang@mediatek.com
Signed-off-by: Matthias Brugger <matthias.bgg@gmail.com>
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This commit adds dt-binding documentation of timer for Mediatek MT8195 SoC
Platform.
Signed-off-by: Seiya Wang <seiya.wang@mediatek.com>
Acked-by: Rob Herring <robh@kernel.org>
Link: https://lore.kernel.org/r/20210319023427.16711-3-seiya.wang@mediatek.com
Signed-off-by: Matthias Brugger <matthias.bgg@gmail.com>
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Juniper is known as Acer Chromebook Spin 311 (CP311-3H).
Signed-off-by: Hsin-Yi Wang <hsinyi@chromium.org>
Tested-by: Ricardo Cañuelo <ricardo.canuelo@collabora.com>
Link: https://lore.kernel.org/r/20210319035245.2751911-4-hsinyi@chromium.org
Signed-off-by: Matthias Brugger <matthias.bgg@gmail.com>
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Damu is known as ASUS Chromebook Flip CM3.
Signed-off-by: Hsin-Yi Wang <hsinyi@chromium.org>
Link: https://lore.kernel.org/r/20210319035245.2751911-3-hsinyi@chromium.org
Signed-off-by: Matthias Brugger <matthias.bgg@gmail.com>
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mt8183-kukui-jacuzzi-juniper board also known as Acer Chromebook Spin 311,
using mediatek mt8183 SoC.
Signed-off-by: Hsin-Yi Wang <hsinyi@chromium.org>
Reviewed-by: Enric Balletbo i Serra <enric.balletbo@collabora.com>
Acked-by: Rob Herring <robh@kernel.org>
Link: https://lore.kernel.org/r/20210319035245.2751911-2-hsinyi@chromium.org
Signed-off-by: Matthias Brugger <matthias.bgg@gmail.com>
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mt8183-kukui-jacuzzi-damu board also known as ASUS Chromebook Flip CM3,
using mediatek mt8183 SoC.
Signed-off-by: Hsin-Yi Wang <hsinyi@chromium.org>
Reviewed-by: Enric Balletbo i Serra <enric.balletbo@collabora.com>
Acked-by: Rob Herring <robh@kernel.org>
Link: https://lore.kernel.org/r/20210319035245.2751911-1-hsinyi@chromium.org
Signed-off-by: Matthias Brugger <matthias.bgg@gmail.com>
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Use wakeup control register offset exactly, and update revision
number
Signed-off-by: Chunfeng Yun <chunfeng.yun@mediatek.com>
Link: https://lore.kernel.org/r/1616482975-17841-13-git-send-email-chunfeng.yun@mediatek.com
Signed-off-by: Matthias Brugger <matthias.bgg@gmail.com>
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Enable the analog filter for all I2C nodes of the stm32mp151.
Signed-off-by: Alain Volmat <alain.volmat@foss.st.com>
Signed-off-by: Alexandre Torgue <alexandre.torgue@foss.st.com>
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Should use PPI No.7 for the PMU. Otherwise, the perf command didn't
show any information.
Fixes: 834c310f5418 ("arm64: dts: renesas: Add Renesas R8A779A0 SoC support")
Signed-off-by: Yoshihiro Shimoda <yoshihiro.shimoda.uh@renesas.com>
Link: https://lore.kernel.org/r/20210325041949.925777-1-yoshihiro.shimoda.uh@renesas.com
Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
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Provide VSPD support on the R-Car V3U SoC.
Signed-off-by: Kieran Bingham <kieran.bingham+renesas@ideasonboard.com>
Reviewed-by: Laurent Pinchart <laurent.pinchart@ideasonboard.com>
Link: https://lore.kernel.org/r/20210322172919.1154686-3-kieran.bingham+renesas@ideasonboard.com
Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
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Provide FCPVD support for the R-Car V3U SoC.
Signed-off-by: Kieran Bingham <kieran.bingham+renesas@ideasonboard.com>
Reviewed-by: Laurent Pinchart <laurent.pinchart@ideasonboard.com>
Link: https://lore.kernel.org/r/20210322172919.1154686-2-kieran.bingham+renesas@ideasonboard.com
Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
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Three general purpose LEDs are provided on the Falcon CPU board.
Connect GP_LED1, GP_LED2, and GP_LED3 to the gpio-leds frameworks as
indicator LEDs.
These LEDs are arranged in a block of four LEDs on the board itself, but
the fourth LED is as yet unidentified.
Signed-off-by: Kieran Bingham <kieran.bingham+renesas@ideasonboard.com>
Link: https://lore.kernel.org/r/20210322172013.1152121-1-kieran.bingham+renesas@ideasonboard.com
Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
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For completeness, add the rtc0 alias.
Signed-off-by: Michael Walle <michael@walle.cc>
Signed-off-by: Shawn Guo <shawnguo@kernel.org>
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The aliases are board-specific and shouldn't be included in the common
SoC dtsi. Move them over to the boards.
Signed-off-by: Michael Walle <michael@walle.cc>
Signed-off-by: Shawn Guo <shawnguo@kernel.org>
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The failsafe partitions for the DP firmware and for AT-F are unused. If
AT-F will ever be supported in the failsafe mode, then it will be a FIT
image. Thus fold the unused partitions into the failsafe bootloader one
to have enough storage if the bootloader image will grow.
While at it, remove the reserved partition. It served no purpose other
than having no hole in the map.
Signed-off-by: Michael Walle <michael@walle.cc>
Signed-off-by: Shawn Guo <shawnguo@kernel.org>
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Move the MTD partitions to the partitions subnode. This is the new way
to specify the partitions, see
Documentation/devicetree/bindings/mtd/jedec,spi-nor.yaml
Signed-off-by: Michael Walle <michael@walle.cc>
Signed-off-by: Shawn Guo <shawnguo@kernel.org>
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According to the datasheet RTL8211, it must be asserted low for at least
10ms and at least 72ms "for internal circuits settling time" before
accessing the PHY registers.
Add properties to describe such requirements.
Reported-by: Joakim Zhang <qiangqing.zhang@nxp.com>
Signed-off-by: Fabio Estevam <festevam@gmail.com>
Tested-by: Joakim Zhang <qiangqing.zhang@nxp.com>
Signed-off-by: Shawn Guo <shawnguo@kernel.org>
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Commit 99e71c029213 ("arm64: dts: imx8mq-librem5: Don't mark buck3 as always on")
removed always-on marking from GPU regulator, which is great for power
saving - however it introduces additional i2c0 traffic which can be deadly
for devices from the Dogwood batch.
To workaround the i2c0 shutdown issue on Dogwood, this commit marks
buck3 as always-on again - but only for Dogwood (r3).
Signed-off-by: Sebastian Krzyszkowiak <sebastian.krzyszkowiak@puri.sm>
Signed-off-by: Martin Kepplinger <martin.kepplinger@puri.sm>
Signed-off-by: Shawn Guo <shawnguo@kernel.org>
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