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2024-05-17Merge branch 'pci/endpoint'Bjorn Helgaas2-50/+21
- Simplify pci_epf_test_alloc_space() by using pci_epc_get_next_free_bar() as other similar iterators do (Niklas Cassel) - Configure endpoint BARs as 64-bit if that's all the hardware supports, in addition to doing it if the BAR size is larger than 2GB (Niklas Cassel) - Remove superfluous pci_epf_configure_bar(), since pci_epf_alloc_space() now contains that functionality (Niklas Cassel) - Simplify pci_epf_test_set_bar() (Niklas Cassel) - Clean up pci_epf_test_unbind() to reduce indentation level (Niklas Cassel) * pci/endpoint: PCI: endpoint: pci-epf-test: Clean up pci_epf_test_unbind() PCI: endpoint: pci-epf-test: Simplify pci_epf_test_set_bar() loop PCI: endpoint: pci-epf-test: Remove superfluous code PCI: endpoint: Allocate a 64-bit BAR if that is the only option PCI: endpoint: pci-epf-test: Simplify pci_epf_test_alloc_space() loop
2024-05-17Merge branch 'pci/controller/tegra194'Bjorn Helgaas1-0/+3
- Return success from endpoint probe before incorrectly dropping the reference to the BPMP (Vidya Sagar) * pci/controller/tegra194: PCI: tegra194: Fix probe path for Endpoint mode
2024-05-17Merge branch 'pci/controller/rockchip'Bjorn Helgaas1-5/+3
- Configure endpoint BAR to be 64-bit if the PCI_BASE_ADDRESS_MEM_TYPE_64 flag is set instead of depending on the new BAR value itself (Niklas Cassel) - Set Subsystem Vendor ID correctly (Rick Wertenbroek) * pci/controller/rockchip: PCI: rockchip-ep: Remove wrong mask on subsys_vendor_id PCI: rockchip-ep: Set a 64-bit BAR if requested
2024-05-17Merge branch 'pci/controller/mt7621'Bjorn Helgaas1-1/+1
- Enlarge PHY name buffer to avoid snprintf() overflow (Sergio Paracuellos) * pci/controller/mt7621: PCI: mt7621: Fix string truncation in mt7621_pcie_parse_port()
2024-05-17Merge branch 'pci/controller/dwc'Bjorn Helgaas20-111/+338
- Move DBI accesses from dw_pcie_ep_init() to dw_pcie_ep_init_complete() so drivers for endpoints that require Refclk for DBI access, e.g., qcom and tegra194, can control when this happens (Manivannan Sadhasivam) - Add endpoint API kernel-doc (Manivannan Sadhasivam) - Remove .deinit() callback and instead call rcar_gen4_pcie_ep_deinit() explicitly from rcar-gen4, which was the only user (Manivannan Sadhasivam) - Rename dw_pcie_ep_exit() to dw_pcie_ep_deinit() to correspond with dw_pcie_ep_init() (Manivannan Sadhasivam) - Add dw_pcie_ep_cleanup() for drivers that need to clean up eDMA resources when PERST# is asserted, e.g., qcom, tegra194 (Manivannan Sadhasivam) - Rename dw_pcie_ep_init_complete() to dw_pcie_ep_init_registers() to better reflect the functionality (Manivannan Sadhasivam) - Call dw_pcie_ep_init_registers() directly from drivers instead of from dw_pcie_ep_init() so drivers, e.g., qcom and tegra194, can do it when Refclk is available (Manivannan Sadhasivam) - Remove the "core_init_notifier" flag, which previously identified drivers that required Refclk before DBI access, because it's now unnecessary (Manivannan Sadhasivam) * pci/controller/dwc: PCI: endpoint: Remove "core_init_notifier" flag PCI: dwc: ep: Call dw_pcie_ep_init_registers() API directly from all glue drivers PCI: dwc: ep: Rename dw_pcie_ep_init_complete() to dw_pcie_ep_init_registers() PCI: dwc: ep: Introduce dw_pcie_ep_cleanup() API for drivers supporting PERST# PCI: dwc: ep: Rename dw_pcie_ep_exit() to dw_pcie_ep_deinit() PCI: dwc: ep: Remove deinit() callback from struct dw_pcie_ep_ops PCI: dwc: ep: Add Kernel-doc comments for APIs PCI: dwc: ep: Fix DBI access failure for drivers requiring refclk from host
2024-05-17Merge branch 'pci/controller/cadence'Bjorn Helgaas1-4/+1
- Configure endpoint BAR to be 64-bit if the PCI_BASE_ADDRESS_MEM_TYPE_64 flag is set instead of depending on the new BAR value itself (Niklas Cassel) * pci/controller/cadence: PCI: cadence: Set a 64-bit BAR if requested
2024-05-17Merge branch 'pci/dt-bindings'Bjorn Helgaas32-110/+333
- Add rcar-pci-host missing IOMMU properties (Geert Uytterhoeven) - Add ti,j721e-pci-host J784S4 Device ID (Siddharth Vadapalli) - Add ti,j721e-pci-host J722S compatible string (Siddharth Vadapalli) - Add ti,am65 num-viewport, phys, and phy-name properties (Jan Kiszka) - Drop cdns,cdns-pcie-host redundant msi-parent and pci-bus.yaml (Krzysztof Kozlowski) - Add mediatek,mt7621 missing reg property for child Root Ports (Krzysztof Kozlowski) - Switch bindings from pci-bus.yaml to pci-host-bridge.yaml (Krzysztof Kozlowski) - Convert fsl,layerscape host and endpoint bindings to YAML (Frank Li) - Add rcar-gen4-pci-host R-Car V4H (R8A779G0) compatible strings for both host and endpoint mode (Yoshihiro Shimoda) - Add rockchip,rk3399-pcie maxItems for ep-gpios (Krzysztof Kozlowski) * pci/dt-bindings: dt-bindings: PCI: rockchip,rk3399-pcie: Add missing maxItems to ep-gpios dt-bindings: PCI: rcar-gen4-pci-ep: Add R-Car V4H compatible dt-bindings: PCI: rcar-gen4-pci-host: Add R-Car V4H compatible dt-bindings: PCI: layerscape-pci: Convert to YAML format dt-bindings: PCI: mediatek,mt7621-pcie: Switch from deprecated pci-bus.yaml dt-bindings: PCI: host-bridges: Switch from deprecated pci-bus.yaml dt-bindings: PCI: mediatek,mt7621: Add missing child node reg dt-bindings: PCI: cdns,cdns-pcie-host: Drop redundant msi-parent and pci-bus.yaml dt-bindings: PCI: ti,am65: Fix remaining binding warnings dt-bindings: PCI: ti,j721e-pci-host: Add support for J722S SoC dt-bindings: PCI: rcar-pci-host: Add missing IOMMU properties dt-bindings: PCI: ti,j721e-pci-host: Add device-id for TI's J784S4 SoC
2024-05-17Merge branch 'pci/pm'Bjorn Helgaas1-0/+12
- Avoid D3cold for HP Pavilion 17 PC/1972 PCIe Ports because we can't get them back out of D3cold (Mario Limonciello) * pci/pm: PCI/PM: Avoid D3cold for HP Pavilion 17 PC/1972 PCIe Ports
2024-05-17Merge branch 'pci/of'Bjorn Helgaas1-0/+2
- Check for kcalloc() failure and handle it gracefully (Duoming Zhou) * pci/of: PCI: of_property: Return error for int_map allocation failure
2024-05-17Merge branch 'pci/msi'Bjorn Helgaas1-6/+9
- Update coding style to "mainline is normal path, errors are the exceptions" (Andy Shevchenko) * pci/msi: PCI/MSI: Make error path handling follow the standard pattern
2024-05-17Merge branch 'pci/hotplug'Bjorn Helgaas1-7/+5
- Update hotplug TODO notes (Nam Cao) * pci/hotplug: PCI: hotplug: Remove obsolete sgi_hotplug TODO notes PCI: hotplug: Document unchecked return value of pci_hp_add_bridge()
2024-05-17Merge branch 'pci/enumeration'Bjorn Helgaas46-131/+134
- Clear bridge Secondary Status errors after enumeration since enumeration causes many errors (Vidya Sagar) - Wait for Link Training==0 before starting Link retrain to avoid a race; this was done previously but broken by a faulty merge (Ilpo Järvinen) - Rename PCI_IRQ_LEGACY to PCI_IRQ_INTX to be more specific about what "LEGACY" means (Damien Le Moal) - Update return types of pci_find_capability() stubs to match the extern declarations for the actual implementations (Bjorn Helgaas) - Drop unnecessary pci_enable_device_io() from pata_cs5520 (Heiner Kallweit) - Drop unused pci_enable_device_io() (Heiner Kallweit) - On 2016 and newer BIOSes, skip early E820 check for ECAM regions described in ACPI MCFG; there's no spec requirement for E820 reservations, and some machines don't provide them (Bjorn Helgaas) - If devices were disconnected while suspended, don't wait for them when resuming (Ilpo Järvinen) * pci/enumeration: PCI: Do not wait for disconnected devices when resuming x86/pci: Skip early E820 check for ECAM region PCI: Remove unused pci_enable_device_io() ata: pata_cs5520: Remove unnecessary call to pci_enable_device_io() PCI: Update pci_find_capability() stub return types PCI: Remove PCI_IRQ_LEGACY scsi: vmw_pvscsi: Do not use PCI_IRQ_LEGACY instead of PCI_IRQ_LEGACY scsi: pmcraid: Use PCI_IRQ_INTX instead of PCI_IRQ_LEGACY scsi: mpt3sas: Use PCI_IRQ_INTX instead of PCI_IRQ_LEGACY scsi: megaraid_sas: Use PCI_IRQ_INTX instead of PCI_IRQ_LEGACY scsi: ipr: Use PCI_IRQ_INTX instead of PCI_IRQ_LEGACY scsi: hpsa: Use PCI_IRQ_INTX instead of PCI_IRQ_LEGACY scsi: arcmsr: Use PCI_IRQ_INTX instead of PCI_IRQ_LEGACY wifi: rtw89: Use PCI_IRQ_INTX instead of PCI_IRQ_LEGACY wifi: rtw88: Use PCI_IRQ_INTX instead of PCI_IRQ_LEGACY wifi: ath10k: Refer to INTX instead of LEGACY net: wangxun: Use PCI_IRQ_INTX instead of PCI_IRQ_LEGACY r8169: Use PCI_IRQ_INTX instead of PCI_IRQ_LEGACY net: alx: Use PCI_IRQ_INTX instead of PCI_IRQ_LEGACY net: atlantic: Use PCI_IRQ_INTX instead of PCI_IRQ_LEGACY net: amd-xgbe: Use PCI_IRQ_INTX instead of PCI_IRQ_LEGACY VMCI: Use PCI_IRQ_ALL_TYPES to remove PCI_IRQ_LEGACY use RDMA/vmw_pvrdma: Use PCI_IRQ_INTX instead of PCI_IRQ_LEGACY IB/qib: Use PCI_IRQ_INTX instead of PCI_IRQ_LEGACY drm/amdgpu: Use PCI_IRQ_INTX instead of PCI_IRQ_LEGACY mfd: intel-lpss: Use PCI_IRQ_INTX instead of PCI_IRQ_LEGACY ntb: idt: Use PCI_IRQ_INTX instead of PCI_IRQ_LEGACY platform/x86: intel_ips: Use PCI_IRQ_INTX instead of PCI_IRQ_LEGACY tty: 8250_pci: Use PCI_IRQ_INTX instead of PCI_IRQ_LEGACY usb: hcd-pci: Use PCI_IRQ_INTX instead of PCI_IRQ_LEGACY ASoC: Intel: avs: Use PCI_IRQ_INTX instead of PCI_IRQ_LEGACY Documentation: PCI: Use PCI_IRQ_INTX instead of PCI_IRQ_LEGACY PCI/portdrv: Use PCI_IRQ_INTX instead of PCI_IRQ_LEGACY PCI/MSI: Use PCI_IRQ_INTX instead of PCI_IRQ_LEGACY PCI: Clarify intent of LT wait PCI: Wait for Link Training==0 before starting Link retrain PCI: Clear Secondary Status errors after enumeration
2024-05-17Merge branch 'pci/edr'Bjorn Helgaas1-11/+17
- Specify Revision 6 of the "Enable DPC" _DSM function to match the implementation (Kuppuswamy Sathyanarayanan) - Check for failure of the "Locate Port" _DSM function (Kuppuswamy Sathyanarayanan) * pci/edr: PCI/EDR: Align EDR_PORT_LOCATE_DSM with PCI Firmware r3.3 PCI/EDR: Align EDR_PORT_DPC_ENABLE_DSM with PCI Firmware r3.3
2024-05-17Merge branch 'pci/doe'Bjorn Helgaas2-3/+10
- Add support for DOE Discovery version 2 (Alexey Kardashevskiy) * pci/doe: PCI/DOE: Support discovery version 2
2024-05-17Merge branch 'pci/cxl'Bjorn Helgaas13-8/+175
- Lock the upstream bridge while using it to perform a Secondary Bus Reset (Dave Jiang) - Return failure when attempting Secondary Bus Reset below a CXL Port that has SBR masked (Dave Jiang) - Add a "cxl_bus" reset method that temporarily unmasks SBR (Dave Jiang) - Add a warning if we reset a CXL type 3 memory device that was in use while being reset (Dave Jiang) * pci/cxl: cxl: Add post-reset warning if reset results in loss of previously committed HDM decoders PCI/CXL: Add 'cxl_bus' reset method for devices below CXL Ports PCI/CXL: Fail bus reset if upstream CXL Port has SBR masked PCI: Lock upstream bridge for pci_reset_function() PCI/CXL: Move CXL Vendor ID to pci_ids.h
2024-05-17Merge branch 'pci/aspm'Bjorn Helgaas2-103/+103
- Consolidate #defines for link states (L0s, L1, L1.1, etc) to simplify ASPM implementation (Ilpo Järvinen) - Simplify ASPM disable/enable mask calculation (Ilpo Järvinen) * pci/aspm: PCI/ASPM: Clean up ASPM disable/enable mask calculation PCI/ASPM: Consolidate link state defines
2024-05-17Merge branch 'pci/aer'Bjorn Helgaas4-3/+23
- Mask reporting of Mask Replay Timer Timeout Correctable Errors in the bridge above Genesys GL975x SD host controllers; the errors are caused by a GL975x hardware defect and they may lead to AER interrupts that prevent system suspend (Kai-Heng Feng) - Update URL of aer-inject tool (Kuppuswamy Sathyanarayanan) * pci/aer: PCI/AER: Update aer-inject tool source URL PCI: Mask Replay Timer Timeout errors for Genesys GL975x SD host controller
2024-05-16PCI: Do not wait for disconnected devices when resumingIlpo Järvinen2-1/+11
On runtime resume, pci_dev_wait() is called: pci_pm_runtime_resume() pci_pm_bridge_power_up_actions() pci_bridge_wait_for_secondary_bus() pci_dev_wait() While a device is runtime suspended along with its PCI hierarchy, the device could get disconnected. In such case, the link will not come up no matter how long pci_dev_wait() waits for it. Besides the above mentioned case, there could be other ways to get the device disconnected while pci_dev_wait() is waiting for the link to come up. Make pci_dev_wait() exit if the device is already disconnected to avoid unnecessary delay. The use cases of pci_dev_wait() boil down to two: 1. Waiting for the device after reset 2. pci_bridge_wait_for_secondary_bus() The callers in both cases seem to benefit from propagating the disconnection as error even if device disconnection would be more analoguous to the case where there is no device in the first place which return 0 from pci_dev_wait(). In the case 2, it results in unnecessary marking of the devices disconnected again but that is just harmless extra work. Also make sure compiler does not become too clever with dev->error_state and use READ_ONCE() to force a fetch for the up-to-date value. Link: https://lore.kernel.org/r/20240208132322.4811-1-ilpo.jarvinen@linux.intel.com Reported-by: Mika Westerberg <mika.westerberg@linux.intel.com> Tested-by: Mika Westerberg <mika.westerberg@linux.intel.com> Signed-off-by: Ilpo Järvinen <ilpo.jarvinen@linux.intel.com> Signed-off-by: Bjorn Helgaas <bhelgaas@google.com>
2024-05-16x86/pci: Skip early E820 check for ECAM regionBjorn Helgaas1-11/+29
Arul, Mateusz, Imcarneiro91, and Aman reported a regression caused by 07eab0901ede ("efi/x86: Remove EfiMemoryMappedIO from E820 map"). On the Lenovo Legion 9i laptop, that commit removes the ECAM area from E820, which means the early E820 validation fails, which means we don't enable ECAM in the "early MCFG" path. The static MCFG table describes ECAM without depending on the ACPI interpreter. Many Legion 9i ACPI methods rely on that, so they fail when PCI config access isn't available, resulting in the embedded controller, PS/2, audio, trackpad, and battery devices not being detected. The _OSC method also fails, so Linux can't take control of the PCIe hotplug, PME, and AER features: # pci_mmcfg_early_init() PCI: ECAM [mem 0xc0000000-0xce0fffff] (base 0xc0000000) for domain 0000 [bus 00-e0] PCI: not using ECAM ([mem 0xc0000000-0xce0fffff] not reserved) ACPI Error: AE_ERROR, Returned by Handler for [PCI_Config] (20230628/evregion-300) ACPI: Interpreter enabled ACPI: Ignoring error and continuing table load ACPI BIOS Error (bug): Could not resolve symbol [\_SB.PC00.RP01._SB.PC00], AE_NOT_FOUND (20230628/dswload2-162) ACPI Error: AE_NOT_FOUND, During name lookup/catalog (20230628/psobject-220) ACPI: Skipping parse of AML opcode: OpcodeName unavailable (0x0010) ACPI BIOS Error (bug): Could not resolve symbol [\_SB.PC00.RP01._SB.PC00], AE_NOT_FOUND (20230628/dswload2-162) ACPI Error: AE_NOT_FOUND, During name lookup/catalog (20230628/psobject-220) ... ACPI Error: Aborting method \_SB.PC00._OSC due to previous error (AE_NOT_FOUND) (20230628/psparse-529) acpi PNP0A08:00: _OSC: platform retains control of PCIe features (AE_NOT_FOUND) # pci_mmcfg_late_init() PCI: ECAM [mem 0xc0000000-0xce0fffff] (base 0xc0000000) for domain 0000 [bus 00-e0] PCI: [Firmware Info]: ECAM [mem 0xc0000000-0xce0fffff] not reserved in ACPI motherboard resources PCI: ECAM [mem 0xc0000000-0xce0fffff] is EfiMemoryMappedIO; assuming valid PCI: ECAM [mem 0xc0000000-0xce0fffff] reserved to work around lack of ACPI motherboard _CRS Per PCI Firmware r3.3, sec 4.1.2, ECAM space must be reserved by a PNP0C02 resource, but there's no requirement to mention it in E820, so we shouldn't look at E820 to validate the ECAM space described by MCFG. In 2006, 946f2ee5c731 ("[PATCH] i386/x86-64: Check that MCFG points to an e820 reserved area") added a sanity check of E820 to work around buggy MCFG tables, but that over-aggressive validation causes failures like this one. Keep the E820 validation check for machines older than 2016, an arbitrary ten years after 946f2ee5c731, so machines that depend on it don't break. Skip the early E820 check for 2016 and newer BIOSes since there's no requirement to describe ECAM in E820. Link: https://lore.kernel.org/r/20240417204012.215030-2-helgaas@kernel.org Fixes: 07eab0901ede ("efi/x86: Remove EfiMemoryMappedIO from E820 map") Reported-by: Mateusz Kaduk <mateusz.kaduk@gmail.com> Closes: https://bugzilla.kernel.org/show_bug.cgi?id=218444 Signed-off-by: Bjorn Helgaas <bhelgaas@google.com> Tested-by: Mateusz Kaduk <mateusz.kaduk@gmail.com> Reviewed-by: Andy Shevchenko <andy@kernel.org> Reviewed-by: Hans de Goede <hdegoede@redhat.com> Reviewed-by: Kuppuswamy Sathyanarayanan <sathyanarayanan.kuppuswamy@linux.intel.com> Cc: stable@vger.kernel.org
2024-05-16PCI: Remove unused pci_enable_device_io()Heiner Kallweit2-15/+0
After the last user was removed, remove this PCI core function. It's very unlikely that we'll see a new device requiring io space access, even though memory space access is supported. Link: https://lore.kernel.org/r/213ebf62-53a3-42b7-8518-ecd5cd6d6b08@gmail.com Signed-off-by: Heiner Kallweit <hkallweit1@gmail.com> Signed-off-by: Bjorn Helgaas <bhelgaas@google.com> Reviewed-by: Damien Le Moal <dlemoal@kernel.org>
2024-05-16ata: pata_cs5520: Remove unnecessary call to pci_enable_device_io()Heiner Kallweit1-6/+0
A few lines earlier pcim_enable_device() is called, which includes the functionality of pci_enable_device_io(). Therefore we can safely remove the call to pci_enable_device_io(). Link: https://lore.kernel.org/r/5068d0ce-2140-4d3f-b305-e8f0d61eed1f@gmail.com Signed-off-by: Heiner Kallweit <hkallweit1@gmail.com> Signed-off-by: Bjorn Helgaas <bhelgaas@google.com> Reviewed-by: Sergey Shtylyov <s.shtylyov@omp.ru> Acked-by: Damien Le Moal <dlemoal@kernel.org>
2024-05-16PCI: Update pci_find_capability() stub return typesBjorn Helgaas1-3/+2
f646c2a0a668 ("PCI: Return u8 from pci_find_capability() and similar") and ee8b1c478a9f ("PCI: Return u16 from pci_find_ext_capability() and similar") updated the return type of the extern declarations, but neglected to update the type of the stubs used when CONFIG_PCI is not enabled. Update them to match the extern declarations. Link: https://lore.kernel.org/r/20240327180234.1529164-1-helgaas@kernel.org Signed-off-by: Bjorn Helgaas <bhelgaas@google.com> Reviewed-by: Kuppuswamy Sathyanarayanan <sathyanarayanan.kuppuswamy@linux.intel.com>
2024-05-16PCI: Remove PCI_IRQ_LEGACYDamien Le Moal1-5/+2
Replace the last references to PCI_IRQ_LEGACY with PCI_IRQ_INTX in pci.h header file. With this change, PCI_IRQ_LEGACY is unused and we can remove its definition. Link: https://lore.kernel.org/r/20240325070944.3600338-29-dlemoal@kernel.org Signed-off-by: Damien Le Moal <dlemoal@kernel.org> Signed-off-by: Bjorn Helgaas <bhelgaas@google.com>
2024-05-16scsi: vmw_pvscsi: Do not use PCI_IRQ_LEGACY instead of PCI_IRQ_LEGACYDamien Le Moal1-1/+1
In pvscsi_probe(), initialize irq_flag using PCI_IRQ_ALL_TYPES to remove the use of the deprecated PCI_IRQ_LEGACY macro. Link: https://lore.kernel.org/r/20240325070944.3600338-28-dlemoal@kernel.org Signed-off-by: Damien Le Moal <dlemoal@kernel.org> Signed-off-by: Bjorn Helgaas <bhelgaas@google.com> Acked-by: Martin K. Petersen <martin.petersen@oracle.com>
2024-05-16scsi: pmcraid: Use PCI_IRQ_INTX instead of PCI_IRQ_LEGACYDamien Le Moal1-1/+1
Use the macro PCI_IRQ_INTX instead of the deprecated PCI_IRQ_LEGACY macro. Link: https://lore.kernel.org/r/20240325070944.3600338-27-dlemoal@kernel.org Signed-off-by: Damien Le Moal <dlemoal@kernel.org> Signed-off-by: Bjorn Helgaas <bhelgaas@google.com> Acked-by: Martin K. Petersen <martin.petersen@oracle.com>
2024-05-16scsi: mpt3sas: Use PCI_IRQ_INTX instead of PCI_IRQ_LEGACYDamien Le Moal1-1/+1
Use the macro PCI_IRQ_INTX instead of the deprecated PCI_IRQ_LEGACY macro. Link: https://lore.kernel.org/r/20240325070944.3600338-26-dlemoal@kernel.org Signed-off-by: Damien Le Moal <dlemoal@kernel.org> Signed-off-by: Bjorn Helgaas <bhelgaas@google.com> Acked-by: Martin K. Petersen <martin.petersen@oracle.com>
2024-05-16scsi: megaraid_sas: Use PCI_IRQ_INTX instead of PCI_IRQ_LEGACYDamien Le Moal1-2/+2
Use the macro PCI_IRQ_INTX instead of the deprecated PCI_IRQ_LEGACY macro. Link: https://lore.kernel.org/r/20240325070944.3600338-25-dlemoal@kernel.org Signed-off-by: Damien Le Moal <dlemoal@kernel.org> Signed-off-by: Bjorn Helgaas <bhelgaas@google.com> Acked-by: Martin K. Petersen <martin.petersen@oracle.com>
2024-05-16scsi: ipr: Use PCI_IRQ_INTX instead of PCI_IRQ_LEGACYDamien Le Moal1-1/+1
Use the macro PCI_IRQ_INTX instead of the deprecated PCI_IRQ_LEGACY macro. Link: https://lore.kernel.org/r/20240325070944.3600338-24-dlemoal@kernel.org Signed-off-by: Damien Le Moal <dlemoal@kernel.org> Signed-off-by: Bjorn Helgaas <bhelgaas@google.com> Acked-by: Martin K. Petersen <martin.petersen@oracle.com>
2024-05-16scsi: hpsa: Use PCI_IRQ_INTX instead of PCI_IRQ_LEGACYDamien Le Moal1-1/+1
Use the macro PCI_IRQ_INTX instead of the deprecated PCI_IRQ_LEGACY macro. Link: https://lore.kernel.org/r/20240325070944.3600338-23-dlemoal@kernel.org Signed-off-by: Damien Le Moal <dlemoal@kernel.org> Signed-off-by: Bjorn Helgaas <bhelgaas@google.com> Acked-by: Martin K. Petersen <martin.petersen@oracle.com>
2024-05-16scsi: arcmsr: Use PCI_IRQ_INTX instead of PCI_IRQ_LEGACYDamien Le Moal1-1/+1
Use the macro PCI_IRQ_INTX instead of the deprecated PCI_IRQ_LEGACY macro. Link: https://lore.kernel.org/r/20240325070944.3600338-22-dlemoal@kernel.org Signed-off-by: Damien Le Moal <dlemoal@kernel.org> Signed-off-by: Bjorn Helgaas <bhelgaas@google.com> Acked-by: Martin K. Petersen <martin.petersen@oracle.com>
2024-05-16wifi: rtw89: Use PCI_IRQ_INTX instead of PCI_IRQ_LEGACYDamien Le Moal1-1/+1
Use the macro PCI_IRQ_INTX instead of the deprecated PCI_IRQ_LEGACY macro. Link: https://lore.kernel.org/r/20240325070944.3600338-21-dlemoal@kernel.org Signed-off-by: Damien Le Moal <dlemoal@kernel.org> [bhelgaas: split to separate patch] Signed-off-by: Bjorn Helgaas <bhelgaas@google.com>
2024-05-16dt-bindings: PCI: rockchip,rk3399-pcie: Add missing maxItems to ep-gpiosKrzysztof Kozlowski1-0/+1
Properties with GPIOs should define number of actual GPIOs, so add missing maxItems to ep-gpios. Otherwise multiple GPIOs could be provided which is not a true hardware description. Fixes: aa222f9311e1 ("dt-bindings: PCI: Convert Rockchip RK3399 PCIe to DT schema") Link: https://lore.kernel.org/linux-pci/20240401100058.15749-1-krzysztof.kozlowski@linaro.org Signed-off-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org> Signed-off-by: Krzysztof Wilczyński <kwilczynski@kernel.org> Acked-by: Conor Dooley <conor.dooley@microchip.com>
2024-05-16PCI: rockchip-ep: Remove wrong mask on subsys_vendor_idRick Wertenbroek1-4/+2
Remove wrong mask on subsys_vendor_id. Both the Vendor ID and Subsystem Vendor ID are u16 variables and are written to a u32 register of the controller. The Subsystem Vendor ID was always 0 because the u16 value was masked incorrectly with GENMASK(31,16) resulting in all lower 16 bits being set to 0 prior to the shift. Remove both masks as they are unnecessary and set the register correctly i.e., the lower 16-bits are the Vendor ID and the upper 16-bits are the Subsystem Vendor ID. This is documented in the RK3399 TRM section 17.6.7.1.17 [kwilczynski: removed unnecesary newline] Fixes: cf590b078391 ("PCI: rockchip: Add EP driver for Rockchip PCIe controller") Link: https://lore.kernel.org/linux-pci/20240403144508.489835-1-rick.wertenbroek@gmail.com Signed-off-by: Rick Wertenbroek <rick.wertenbroek@gmail.com> Signed-off-by: Krzysztof Wilczyński <kwilczynski@kernel.org> Signed-off-by: Bjorn Helgaas <bhelgaas@google.com> Reviewed-by: Damien Le Moal <dlemoal@kernel.org> Cc: stable@vger.kernel.org
2024-05-15dt-bindings: PCI: rcar-gen4-pci-ep: Add R-Car V4H compatibleYoshihiro Shimoda1-1/+3
Document bindings for R-Car V4H (R8A779G0) PCIe endpoint module. Link: https://lore.kernel.org/linux-pci/20240415081135.3814373-3-yoshihiro.shimoda.uh@renesas.com Signed-off-by: Yoshihiro Shimoda <yoshihiro.shimoda.uh@renesas.com> Signed-off-by: Krzysztof Wilczyński <kwilczynski@kernel.org> Reviewed-by: Geert Uytterhoeven <geert+renesas@glider.be> Acked-by: Conor Dooley <conor.dooley@microchip.com>
2024-05-15dt-bindings: PCI: rcar-gen4-pci-host: Add R-Car V4H compatibleYoshihiro Shimoda1-1/+3
Document bindings for R-Car V4H (R8A779G0) PCIe host module. Link: https://lore.kernel.org/linux-pci/20240415081135.3814373-2-yoshihiro.shimoda.uh@renesas.com Signed-off-by: Yoshihiro Shimoda <yoshihiro.shimoda.uh@renesas.com> Signed-off-by: Krzysztof Wilczyński <kwilczynski@kernel.org> Reviewed-by: Geert Uytterhoeven <geert+renesas@glider.be> Acked-by: Conor Dooley <conor.dooley@microchip.com>
2024-05-15dt-bindings: PCI: layerscape-pci: Convert to YAML formatFrank Li3-79/+269
Convert layerscape PCIe bind document to the preferred YAML format. [kwilczynski: commit log] Link: https://lore.kernel.org/linux-pci/20240207231550.2663689-1-Frank.Li@nxp.com Signed-off-by: Frank Li <Frank.Li@nxp.com> Signed-off-by: Krzysztof Wilczyński <kwilczynski@kernel.org>
2024-05-15dt-bindings: PCI: mediatek,mt7621-pcie: Switch from deprecated pci-bus.yamlKrzysztof Kozlowski1-2/+2
dtschema package with core schemas deprecated pci-bus.yaml schema in favor of individual schemas per host, device and pci-pci. Switch Mediatek MT7621 PCIe host bridge binding to this new schema. This requires dtschema package newer than v2024.02 to work fully. v2024.02 will partially work: with a warning. Link: https://lore.kernel.org/linux-pci/20240413151617.35630-4-krzysztof.kozlowski@linaro.org Signed-off-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org> Signed-off-by: Krzysztof Wilczyński <kwilczynski@kernel.org> Reviewed-by: AngeloGioacchino Del Regno <angelogioacchino.delregno@collabora.com> Acked-by: Sergio Paracuellos <sergio.paracuellos@gmail.com>
2024-05-15dt-bindings: PCI: host-bridges: Switch from deprecated pci-bus.yamlKrzysztof Kozlowski24-24/+24
dtschema package with core schemas deprecated pci-bus.yaml schema in favor of pci-host-bridge.yaml. Update all bindings to use the latter one. The difference between pci-bus.yaml and pci-host-bridge.yaml is only in lack of "reg" property defined by the latter, which should not have any effect here, because all these bindings define the "reg". The change is therefore quite trivial, however it requires dtschema package v2024.02 or newer. Link: https://lore.kernel.org/linux-pci/20240413151617.35630-3-krzysztof.kozlowski@linaro.org Signed-off-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org> Signed-off-by: Krzysztof Wilczyński <kwilczynski@kernel.org> Reviewed-by: AngeloGioacchino Del Regno <angelogioacchino.delregno@collabora.com> Reviewed-by: Geert Uytterhoeven <geert+renesas@glider.be> # Renesas Reviewed-by: Rob Herring (Arm) <robh@kernel.org> Acked-by: Sergio Paracuellos <sergio.paracuellos@gmail.com>
2024-05-15dt-bindings: PCI: mediatek,mt7621: Add missing child node regKrzysztof Kozlowski1-0/+3
MT7621 PCI host bridge has children which are PCI root ports. The children have "reg" property, but do not explicitly define it. Instead they rely on pci-bus.yaml schema, but that one has "reg" without any constraints. Define the "reg" for the children, so the binding will be more specific and later will allow dropping reference to deprecated pci-bus.yaml schema. Link: https://lore.kernel.org/linux-pci/20240413151617.35630-2-krzysztof.kozlowski@linaro.org Signed-off-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org> Signed-off-by: Krzysztof Wilczyński <kwilczynski@kernel.org> Reviewed-by: AngeloGioacchino Del Regno <angelogioacchino.delregno@collabora.com> Acked-by: Rob Herring <robh@kernel.org> Acked-by: Sergio Paracuellos <sergio.paracuellos@gmail.com>
2024-05-15dt-bindings: PCI: cdns,cdns-pcie-host: Drop redundant msi-parent and ↵Krzysztof Kozlowski1-3/+0
pci-bus.yaml The binding reference common cdns-pcie-host.yaml, which already defines msi-parent and has a reference to pci-bus.yaml schema. Drop redundant pieces here to make it a bit smaller. Link: https://lore.kernel.org/linux-pci/20240413151617.35630-1-krzysztof.kozlowski@linaro.org Signed-off-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org> Signed-off-by: Krzysztof Wilczyński <kwilczynski@kernel.org> Reviewed-by: Geert Uytterhoeven <geert+renesas@glider.be> Acked-by: Rob Herring <robh@kernel.org> Acked-by: Sergio Paracuellos <sergio.paracuellos@gmail.com>
2024-05-15dt-bindings: PCI: ti,am65: Fix remaining binding warningsJan Kiszka1-0/+20
This adds the missing num-viewport, phys and phy-name properties to the schema. Based on driver code, num-viewport is required for the root complex, phys are optional. Their number corresponds to the number of lanes. The AM65x supports up to 2 lanes. Link: https://lore.kernel.org/linux-pci/8032b018-c870-403a-9dd9-63440de1da07@siemens.com Signed-off-by: Jan Kiszka <jan.kiszka@siemens.com> Signed-off-by: Krzysztof Wilczyński <kwilczynski@kernel.org> Reviewed-by: Rob Herring <robh@kernel.org>
2024-05-08PCI/EDR: Align EDR_PORT_LOCATE_DSM with PCI Firmware r3.3Kuppuswamy Sathyanarayanan1-2/+13
The "Downstream Port Containment related Enhancements" ECN of Jan 28, 2019 (document 12888 below), defined the EDR_PORT_LOCATE_DSM function with Revision ID 5 with a return value encoding (Bits 2:0 = Function, Bits 7:3 = Device, Bits 15:8 = Bus). When the ECN was integrated into PCI Firmware r3.3, sec 4.6.13, Bit 31 was added to indicate success or failure. Check Bit 31 for failure in acpi_dpc_port_get(). Link: https://lore.kernel.org/r/20240501022543.1626025-1-sathyanarayanan.kuppuswamy@linux.intel.com Link: https://members.pcisig.com/wg/PCI-SIG/document/12888 Fixes: ac1c8e35a326 ("PCI/DPC: Add Error Disconnect Recover (EDR) support") Signed-off-by: Kuppuswamy Sathyanarayanan <sathyanarayanan.kuppuswamy@linux.intel.com> [bhelgaas: split into two patches, update commit log] Signed-off-by: Bjorn Helgaas <bhelgaas@google.com> Tested-by: Satish Thatchanamurthy <Satish.Thatchanamurt@Dell.com> # one platform
2024-05-08PCI/EDR: Align EDR_PORT_DPC_ENABLE_DSM with PCI Firmware r3.3Kuppuswamy Sathyanarayanan1-9/+4
The "Downstream Port Containment related Enhancements" ECN of Jan 28, 2019 (document 12888 below), defined the EDR_PORT_DPC_ENABLE_DSM function with Revision ID 5 with Arg3 being an integer. But when the ECN was integrated into PCI Firmware r3.3, sec 4.6.12, it was defined as Revision ID 6 with Arg3 being a package containing an integer. The implementation in acpi_enable_dpc() supplies a package as Arg3 (arg4 in the code), but it previously specified Revision ID 5. Align this with PCI Firmware r3.3 by using Revision ID 6. If firmware implemented per the ECN, its Revision 5 function would receive a package as Arg3 when it expects an integer, so acpi_enable_dpc() would likely fail. If such firmware exists and lacks a Revision 6 function that expects a package, we may have to add support for Revision 5. Link: https://lore.kernel.org/r/20240501022543.1626025-1-sathyanarayanan.kuppuswamy@linux.intel.com Link: https://members.pcisig.com/wg/PCI-SIG/document/12888 Fixes: ac1c8e35a326 ("PCI/DPC: Add Error Disconnect Recover (EDR) support") Signed-off-by: Kuppuswamy Sathyanarayanan <sathyanarayanan.kuppuswamy@linux.intel.com> [bhelgaas: split into two patches, update commit log] Signed-off-by: Bjorn Helgaas <bhelgaas@google.com> Tested-by: Satish Thatchanamurthy <Satish.Thatchanamurt@Dell.com> # one platform
2024-05-08cxl: Add post-reset warning if reset results in loss of previously committed ↵Dave Jiang3-0/+53
HDM decoders Secondary Bus Reset (SBR) is equivalent to a device being hot removed and inserted again. Doing a SBR on a CXL type 3 device is problematic if the exported device memory is part of system memory that cannot be offlined. The event is equivalent to violently ripping out that range of memory from the kernel. While the hardware requires the "Unmask SBR" bit set in the Port Control Extensions register and the kernel currently does not unmask it, user can unmask this bit via setpci or similar tool. The driver does not have a way to detect whether a reset coming from the PCI subsystem is a Function Level Reset (FLR) or SBR. The only way to detect is to note if a decoder is marked as enabled in software but the decoder control register indicates it's not committed. Add a helper function to find discrepancy between the decoder software state versus the hardware register state. Suggested-by: Dan Williams <dan.j.williams@intel.com> Link: https://lore.kernel.org/r/20240502165851.1948523-6-dave.jiang@intel.com Signed-off-by: Dave Jiang <dave.jiang@intel.com> Signed-off-by: Bjorn Helgaas <bhelgaas@google.com> Reviewed-by: Jonathan Cameron <Jonathan.Cameron@huawei.com> Reviewed-by: Dan Williams <dan.j.williams@intel.com>
2024-05-08PCI/CXL: Add 'cxl_bus' reset method for devices below CXL PortsDave Jiang2-1/+40
By default Secondary Bus Reset (SBR) is masked for CXL Ports (see CXL r3.1, sec 8.1.5.2). Add cxl_reset_bus_function() (method "cxl_bus") to set the "Unmask SBR" bit in the upstream CXL Port before performing the bus reset and restore the original value afterwards. This method allows the user to perform a bus reset on a CXL device without needing to set the "Unmask SBR" bit via a user tool. Link: https://lore.kernel.org/r/20240502165851.1948523-5-dave.jiang@intel.com Signed-off-by: Dave Jiang <dave.jiang@intel.com> [bhelgaas: simplify commit log, invert condition to avoid negation] Signed-off-by: Bjorn Helgaas <bhelgaas@google.com> Reviewed-by: Jonathan Cameron <Jonathan.Cameron@huawei.com> Reviewed-by: Dan Williams <dan.j.williams@intel.com>
2024-05-08PCI/CXL: Fail bus reset if upstream CXL Port has SBR maskedDave Jiang2-0/+47
Per CXL spec r3.1, sec 8.1.5.2, the Secondary Bus Reset (SBR) bit in the Bridge Control register of a CXL port has no effect unless the "Unmask SBR" bit is set. Return -ENOTTY if we attempt a bus reset on a device below a CXL Port where "Unmask SBR" is 0. Otherwise, the bus reset would appear to have succeeded even though setting the bridge SBR bit had no effect. Link: https://lore.kernel.org/linux-cxl/20240220203956.GA1502351@bhelgaas/ Link: https://lore.kernel.org/r/20240502165851.1948523-4-dave.jiang@intel.com Signed-off-by: Dave Jiang <dave.jiang@intel.com> [bhelgaas: simplify commit log and comments] Signed-off-by: Bjorn Helgaas <bhelgaas@google.com> Reviewed-by: Jonathan Cameron <Jonathan.Cameron@huawei.com> Reviewed-by: Kuppuswamy Sathyanarayanan <sathyanarayanan.kuppuswamy@linux.intel.com> Reviewed-by: Dan Williams <dan.j.williams@intel.com>
2024-05-08PCI: Lock upstream bridge for pci_reset_function()Dave Jiang5-0/+27
Fix a long-standing locking gap for missing pci_cfg_access_lock() while manipulating bridge reset registers and configuration during pci_reset_bus_function(). If there is an upstream bridge, lock it before locking the device itself. pci_dev_lock() calls pci_cfg_access_lock(), which blocks the writing of PCI config space by user space. Add lockdep assertion via pci_dev->cfg_access_lock to verify pci_dev->block_cfg_access is set. Co-developed-by: Dan Williams <dan.j.williams@intel.com> Link: https://lore.kernel.org/r/20240502165851.1948523-3-dave.jiang@intel.com Signed-off-by: Dan Williams <dan.j.williams@intel.com> Signed-off-by: Dave Jiang <dave.jiang@intel.com> [bhelgaas: commit log] Signed-off-by: Bjorn Helgaas <bhelgaas@google.com>
2024-05-08PCI/CXL: Move CXL Vendor ID to pci_ids.hDave Jiang6-7/+8
Move PCI_DVSEC_VENDOR_ID_CXL in CXL private code to PCI_VENDOR_ID_CXL in pci_ids.h in order to be utilized in PCI subsystem. While the CXL Vendor ID (0x1e98) is not listed in the PCI SIG "Member Companies" database at https://pcisig.com/membership/member-companies, the SIG has confirmed that it is reserved by CXL. Link: https://lore.kernel.org/r/20240502165851.1948523-2-dave.jiang@intel.com Suggested-by: Bjorn Helgaas <helgaas@kernel.org> Link: https://lore.kernel.org/linux-cxl/20240402172323.GA1818777@bhelgaas/ Signed-off-by: Dave Jiang <dave.jiang@intel.com> [bhelgaas: update commit log] Signed-off-by: Bjorn Helgaas <bhelgaas@google.com> Reviewed-by: Kuppuswamy Sathyanarayanan <sathyanarayanan.kuppuswamy@linux.intel.com> Reviewed-by: Dan Williams <dan.j.williams@intel.com>
2024-05-04PCI: hotplug: Remove obsolete sgi_hotplug TODO notesNam Cao1-8/+0
Commit c7532b601e77 ("PCI/hotplug: remove the sgi_hotplug driver") deleted the driver. Remove the remaining TODO notes as well. Link: https://lore.kernel.org/r/26784ee39fbb3fbd0fe96508158d74419018e6ad.1714762038.git.namcao@linutronix.de Signed-off-by: Nam Cao <namcao@linutronix.de> Signed-off-by: Bjorn Helgaas <bhelgaas@google.com>
2024-05-04PCI: hotplug: Document unchecked return value of pci_hp_add_bridge()Nam Cao1-0/+6
Some hotplug drivers do not check the return value of pci_hp_add_bridge(). This may be problematic if the driver proceeds after pci_hp_add_bridge() fails. Link: https://lore.kernel.org/r/16a2442ea6ee896987a44df3ed509e4cfde44475.1714762038.git.namcao@linutronix.de Signed-off-by: Nam Cao <namcao@linutronix.de> Signed-off-by: Bjorn Helgaas <bhelgaas@google.com>
generated by cgit v1.2.3 (git 2.39.0) at 2025-09-27 03:36:47 +0300