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Add the APCS, A53 PLL, cpu-opp-table nodes to set
the CPU frequency at 800MHz (idle) or 1.008GHz.
Co-developed-by: Sricharan Ramabadhran <quic_srichara@quicinc.com>
Signed-off-by: Sricharan Ramabadhran <quic_srichara@quicinc.com>
Signed-off-by: Gokul Sriram Palanisamy <quic_gokulsri@quicinc.com>
Reviewed-by: Dmitry Baryshkov <dmitry.baryshkov@linaro.org>
Reviewed-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org>
Link: https://lore.kernel.org/r/20230925102826.405446-4-quic_gokulsri@quicinc.com
Signed-off-by: Bjorn Andersson <andersson@kernel.org>
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Node names should not have vendor prefixes:
qcom-sdx65-mtp.dtb: qcom,spmi@c440000: $nodename:0: 'qcom,spmi@c440000' does not match '^spmi@.*
Reviewed-by: Konrad Dybcio <konrad.dybcio@linaro.org>
Signed-off-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org>
Reviewed-by: Dmitry Baryshkov <dmitry.baryshkov@linaro.org>
Link: https://lore.kernel.org/r/20230924183103.49487-3-krzysztof.kozlowski@linaro.org
Signed-off-by: Bjorn Andersson <andersson@kernel.org>
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The SDX65 GCC clock controller expects two required clocks:
pcie_pipe_clk and usb3_phy_wrapper_gcc_usb30_pipe_clk. The first one is
provided by existing phy node, but second is not yet implemented.
qcom-sdx65-mtp.dtb: clock-controller@100000: clocks: [[11, 0], [11, 1], [12]] is too short
qcom-sdx65-mtp.dtb: clock-controller@100000: clock-names: ['bi_tcxo', 'bi_tcxo_ao', 'sleep_clk'] is too short
Reviewed-by: Konrad Dybcio <konrad.dybcio@linaro.org>
Signed-off-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org>
Link: https://lore.kernel.org/r/20230924183103.49487-2-krzysztof.kozlowski@linaro.org
Signed-off-by: Bjorn Andersson <andersson@kernel.org>
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Qualcomm PCIe endpoint bindings expect phy-names to be "pciephy":
arch/arm/boot/dts/qcom/qcom-sdx65-mtp.dtb: pcie-ep@1c00000: phy-names:0: 'pciephy' was expected
Fixes: 9c0bb38414a4 ("ARM: dts: qcom: sdx65: Add support for PCIe EP")
Reviewed-by: Konrad Dybcio <konrad.dybcio@linaro.org>
Signed-off-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org>
Reviewed-by: Manivannan Sadhasivam <manivannan.sadhasivam@linaro.org>
Reviewed-by: Dmitry Baryshkov <dmitry.baryshkov@linaro.org>
Link: https://lore.kernel.org/r/20230924183103.49487-1-krzysztof.kozlowski@linaro.org
Signed-off-by: Bjorn Andersson <andersson@kernel.org>
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Add the required properties and enable the gmac node for XPI-3128 board.
The minimum reset timing requirements for the phy have been taken from
DP83848J's datasheet [0]
[0] https://www.ti.com/lit/ds/symlink/dp83848j.pdf
Signed-off-by: Alex Bee <knaerzche@gmail.com>
Link: https://lore.kernel.org/r/20231202124158.65615-4-knaerzche@gmail.com
Signed-off-by: Heiko Stuebner <heiko@sntech.de>
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RK3128's gmac is based on Synopsys Ethernet GMAC IP core.
Add it to the devicetree.
Signed-off-by: Alex Bee <knaerzche@gmail.com>
Link: https://lore.kernel.org/r/20231202124158.65615-3-knaerzche@gmail.com
Signed-off-by: Heiko Stuebner <heiko@sntech.de>
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Add alias for the MCU CPSW2G port to enable Linux to fetch MAC Address
for the port directly from U-Boot.
Signed-off-by: Siddharth Vadapalli <s-vadapalli@ti.com>
Reviewed-by: Ravi Gunasekaran <r-gunasekaran@ti.com>
Link: https://lore.kernel.org/r/20231115085913.3585740-1-s-vadapalli@ti.com
Signed-off-by: Nishanth Menon <nm@ti.com>
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Add the required nodes to enable ICSSG SR2.0 based prueth networking.
As the driver still needs to be extended for SR1.0 support, keep related
nodes disabled on PG1 devices.
Signed-off-by: Jan Kiszka <jan.kiszka@siemens.com>
Link: https://lore.kernel.org/r/565d31a5fd29c4dd0cf28e347049a1247a6e446c.1699087938.git.jan.kiszka@siemens.com
Signed-off-by: Nishanth Menon <nm@ti.com>
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Make the m.2 power control pin also available on miniPCIE variants.
This can fix some miniPCIE card hang issue, by forcing a power on reset
during boot.
Signed-off-by: Baocheng Su <baocheng.su@siemens.com>
Signed-off-by: Jan Kiszka <jan.kiszka@siemens.com>
Link: https://lore.kernel.org/r/8b2f8c1698421b8d0694eb337ad7ea2320d76aa6.1699087938.git.jan.kiszka@siemens.com
Signed-off-by: Nishanth Menon <nm@ti.com>
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Add multiple device tree nodes in order to support
runtime pinmuxing via debugfs.
All nodes are added to the pinctrl device node,
since they are now belonging to multiple interfaces now.
Note: Pinconf is also handled by debugfs-pinmux. This is possible since
pinconf and pinmux accessing the same 32-Bit register and setting the
function mask to 32-Bit allows writes to the whole register.
Signed-off-by: Benedikt Niedermayr <benedikt.niedermayr@siemens.com>
[Jan: fix node name style]
Signed-off-by: Jan Kiszka <jan.kiszka@siemens.com>
Link: https://lore.kernel.org/r/3f90f3e521758622aa9b10f030cf0de1e68e77a4.1699087938.git.jan.kiszka@siemens.com
Signed-off-by: Nishanth Menon <nm@ti.com>
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In fact, this was never used by the final device, only dates back to
first prototypes.
Signed-off-by: Jan Kiszka <jan.kiszka@siemens.com>
Link: https://lore.kernel.org/r/6131d44e0505ca3efbb9039e5f2b637a3e139312.1699087938.git.jan.kiszka@siemens.com
Signed-off-by: Nishanth Menon <nm@ti.com>
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Lost while dropping them from the common dtsi.
Fixes: ffc449e016e2 ("arm64: dts: ti: k3-am65: Drop aliases")
Signed-off-by: Jan Kiszka <jan.kiszka@siemens.com>
Link: https://lore.kernel.org/r/1edbc1b56ed4ff2256d7afb7db3cab4b3a423692.1699087938.git.jan.kiszka@siemens.com
Signed-off-by: Nishanth Menon <nm@ti.com>
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These are typically under MCU Firmware usage. Hence mark them reserved.
Signed-off-by: Vignesh Raghavendra <vigneshr@ti.com>
Link: https://lore.kernel.org/r/20231110132508.3137454-3-vigneshr@ti.com
Signed-off-by: Nishanth Menon <nm@ti.com>
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These are typically under MCU Firmware usage. Hence mark them reserved.
Signed-off-by: Vignesh Raghavendra <vigneshr@ti.com>
Link: https://lore.kernel.org/r/20231110132508.3137454-2-vigneshr@ti.com
Signed-off-by: Nishanth Menon <nm@ti.com>
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Similar to MCU GPIO, mark the MCU GPIO router also as reserved for MCU
domain firmware usage.
Signed-off-by: Vignesh Raghavendra <vigneshr@ti.com>
Link: https://lore.kernel.org/r/20231110132508.3137454-1-vigneshr@ti.com
Signed-off-by: Nishanth Menon <nm@ti.com>
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The node name has @4140 but the reg is at 4130, fix this here.
Signed-off-by: Andrew Davis <afd@ti.com>
Link: https://lore.kernel.org/r/20231117162059.88633-1-afd@ti.com
Signed-off-by: Nishanth Menon <nm@ti.com>
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DSS irq trigger type is set to IRQ_TYPE_EDGE_RISING in the DT file, but
the TRM says it is level triggered.
For some reason triggering on rising edge results in double the amount
of expected interrupts, e.g. for normal page flipping test the number of
interrupts per second is 2 * fps. It is as if the IRQ triggers on both
edges. There are no other side effects to this issue than slightly
increased CPU & power consumption due to the extra interrupt.
Switching to IRQ_TYPE_LEVEL_HIGH is correct and fixes the issue, so
let's do that.
Fixes: fc539b90eda2 ("arm64: dts: ti: am654: Add DSS node")
Signed-off-by: Tomi Valkeinen <tomi.valkeinen@ideasonboard.com>
Reviewed-by: Aradhya Bhatia <a-bhatia1@ti.com>
Link: https://lore.kernel.org/r/20231106-am65-dss-clk-edge-v1-1-4a959fec0e1e@ideasonboard.com
Signed-off-by: Nishanth Menon <nm@ti.com>
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Fix number of gpio pins in main_gpio0 & main_gpio1 DT nodes according
to AM62A7 datasheet[0].
[0] https://www.ti.com/lit/gpn/am62a3 Section: 6.3.10 GPIO (Page No. 52-55)
Fixes: 5fc6b1b62639 ("arm64: dts: ti: Introduce AM62A7 family of SoCs")
Signed-off-by: Nitin Yadav <n-yadav@ti.com>
Link: https://lore.kernel.org/r/20231027065930.1187405-1-n-yadav@ti.com
Signed-off-by: Nishanth Menon <nm@ti.com>
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The DTS code coding style expects exactly one space before and after '='
sign.
Signed-off-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org>
Link: https://lore.kernel.org/r/20231124095000.58487-2-krzysztof.kozlowski@linaro.org
Signed-off-by: Nishanth Menon <nm@ti.com>
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Since the required clock is now available, add bluetooth.
Note: Firmware (bts file) from device vendor reroutes tx for some time
during initialisation and later put it back, producing timeouts in
bluetooth initialisation but ignoring that command leads to proper
initialisation.
Signed-off-by: Andreas Kemnade <andreas@kemnade.info>
Message-ID: <20231004070309.2408745-1-andreas@kemnade.info>
Reviewed-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org>
Signed-off-by: Tony Lindgren <tony@atomide.com>
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Inochi Amaoto <inochiama@outlook.com> says:
Huashan Pi board is an embedded development platform based on the
CV1812H chip. Add minimal device tree files for this board.
Currently, it can boot to a basic shell.
NOTE: this series is based on the Jisheng's Milk-V Duo patch.
Link: https://en.sophgo.com/product/introduce/huashan.html
Link: https://en.sophgo.com/product/introduce/cv181xH.html
Link: https://lore.kernel.org/linux-riscv/20231006121449.721-1-jszhang@kernel.org/
Signed-off-by: Conor Dooley <conor.dooley@microchip.com>
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Add initial device tree files for the Huashan Pi board.
Note: The boot of CV1812H chip needs a rtos firmware for coprocessor to
function properly. To make the soc happy, reserved the last 2M memory
for the rtos firmware.
Signed-off-by: Inochi Amaoto <inochiama@outlook.com>
Link: https://en.sophgo.com/product/introduce/huashan.html
Link: https://en.sophgo.com/product/introduce/cv181xH.html
Link: https://github.com/milkv-duo/duo-buildroot-sdk/blob/develop/build/boards/cv181x/cv1812h_wevb_0007a_emmc_huashan/memmap.py#L15
Reviewed-by: Jisheng Zhang <jszhang@kernel.org>
Acked-by: Chen Wang <unicorn_wang@outlook.com>
Signed-off-by: Conor Dooley <conor.dooley@microchip.com>
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Add initial device tree for the CV1812H RISC-V SoC by SOPHGO.
Signed-off-by: Inochi Amaoto <inochiama@outlook.com>
Acked-by: Chen Wang <unicorn_wang@outlook.com>
Signed-off-by: Conor Dooley <conor.dooley@microchip.com>
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Add common GPIO devices for the CV180x and CV181x soc.
Signed-off-by: Inochi Amaoto <inochiama@outlook.com>
Reviewed-by: Jisheng Zhang <jszhang@kernel.org>
Acked-by: Chen Wang <unicorn_wang@outlook.com>
Signed-off-by: Conor Dooley <conor.dooley@microchip.com>
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As CV180x and CV181x have the identical layouts, it is OK to use the
cv1800b basic device tree for the whole series.
For CV1800B soc specific compatible, just move them out of the common
file.
Signed-off-by: Inochi Amaoto <inochiama@outlook.com>
Acked-by: Chen Wang <unicorn_wang@outlook.com>
Signed-off-by: Conor Dooley <conor.dooley@microchip.com>
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Document the compatible strings for the SOPHGO Huashan Pi board which
uses the SOPHGO CV1812H SoC.
Signed-off-by: Inochi Amaoto <inochiama@outlook.com>
Link: https://en.sophgo.com/product/introduce/huashan.html
Link: https://en.sophgo.com/product/introduce/cv181xH.html
Acked-by: Chen Wang <unicorn_wang@outlook.com>
Acked-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org>
Reviewed-by: Jisheng Zhang <jszhang@kernel.org>
Signed-off-by: Conor Dooley <conor.dooley@microchip.com>
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Add compatible string for the SOPHGO CV1812H clint.
Signed-off-by: Inochi Amaoto <inochiama@outlook.com>
Acked-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org>
Reviewed-by: Jisheng Zhang <jszhang@kernel.org>
Signed-off-by: Conor Dooley <conor.dooley@microchip.com>
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Add compatible string for SOPHGO CV1812H plic.
Signed-off-by: Inochi Amaoto <inochiama@outlook.com>
Acked-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org>
Reviewed-by: Jisheng Zhang <jszhang@kernel.org>
Signed-off-by: Conor Dooley <conor.dooley@microchip.com>
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https://support.logicpd.com/DesktopModules/Bring2mind/DMX/Download.aspx?portalid=0&EntryId=649
clearly specifies the availability of GPS, so let's not disguise it
and name the node accordingly.
Signed-off-by: Andreas Kemnade <andreas@kemnade.info>
Message-ID: <20231127200430.143231-1-andreas@kemnade.info>
Acked-by: Adam Ford <aford173@gmail.com>
Signed-off-by: Tony Lindgren <tony@atomide.com>
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WLAN did only work if clock was left enabled by the original system,
so make it fully enable the needed resources itself.
Signed-off-by: Andreas Kemnade <andreas@kemnade.info>
Message-ID: <20230916100515.1650336-6-andreas@kemnade.info>
Signed-off-by: Tony Lindgren <tony@atomide.com>
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properties
Use id-gpios and vbus-gpios instead.
Signed-off-by: Alexander Stein <alexander.stein@ew.tq-group.com>
Message-ID: <20230724103914.1779027-3-alexander.stein@ew.tq-group.com>
Signed-off-by: Tony Lindgren <tony@atomide.com>
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DT overlays in tree need to be applied to a base DTB to validate they
apply, to run schema checks on them, and to catch any errors at compile
time.
Signed-off-by: Rob Herring <robh@kernel.org>
Message-ID: <20231010211925.1629653-1-robh@kernel.org>
Acked-by: Andrew Davis <afd@ti.com>
Signed-off-by: Tony Lindgren <tony@atomide.com>
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Edgeble AI 6TOPS board topology is now changed in final revisions
as a compatible IO board, NCM6A-IO, is made available for both
variants of SoM: NCM6A and NCM6B.
With this change, 6b-io is not as available and 6a; 6b SoM's have
the same compatible IO board as 6a-io. This change is due to the
common optimised design of the IO board made available now in
final revisions, which was not the case in initial revisions.
So, use the NCM6A-IO compatible for NCM6B SoM based IO dts.
Signed-off-by: Jagan Teki <jagan@edgeble.ai>
Acked-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org>
Link: https://lore.kernel.org/r/20231125142914.57459-2-jagan@edgeble.ai
Signed-off-by: Heiko Stuebner <heiko@sntech.de>
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Current binding has following compatible combination for SoM, IO board
- NCM6A: edgeble,neural-compute-module-6a,
edgeble,neural-compute-module-6a-io
- NCM6B: edgeble,neural-compute-module-6b,
edgeble,neural-compute-module-6b-io
This board topology now changes in final revisions, so a common
compatible IO board, NCM6A-IO, is made available for both variants
of SoM: NCM6A and NCM6B, produced by Edgeble AI.
With this change, 6b-io is not as available and 6a; 6b SoM's have the
same compatible IO board as 6a-io. This change is due to the common
optimised design of the IO board made available now in final revisions,
which was not the case in initial revisions.
Update the dt-bindings with this new change.
Signed-off-by: Jagan Teki <jagan@edgeble.ai>
Reviewed-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org>
Link: https://lore.kernel.org/r/20231125142914.57459-1-jagan@edgeble.ai
Signed-off-by: Heiko Stuebner <heiko@sntech.de>
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Enable USB3 host controller for the Orange Pi 5.
Signed-off-by: Jimmy Hon <honyuenkwun@gmail.com>
Link: https://lore.kernel.org/r/20231126200845.1192-1-honyuenkwun@gmail.com
Signed-off-by: Heiko Stuebner <heiko@sntech.de>
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The Motorola mapphone tablets are similar to the mapphone phones, but with
different display and without some phone related peripherals.
Let's add a new motorola-mapphone-mz607-mz617.dtsi and basic files for
xyboard mz609 and mz617. All the tablets from mz607 to mz617 are quite
similar so let's use motorola-mapphone-mz607-mz617.dtsi naming for the
common file.
Note that the tc358765 lcd bridge needs driver changes before it can be
added.
Signed-off-by: Tony Lindgren <tony@atomide.com>
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The mapphone tablets do not have same peripherals as the mapphone
handsets. Let's move the handset specific devices into a common
motorola-mapphone-handset.dtsi file.
Signed-off-by: Tony Lindgren <tony@atomide.com>
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The LCD regulator and backlight are specific only to droid bionic xt875
and droid4 xt894. On droid razr xt910 and xt912, the LCD regulator and
backlight are different. The LCD and backlight are also different on the
the mz609 tablets.
Let's add a common motorola-mapphone-xt8xx.dtsi to make it easy to add
support for xt910 and xt912 and the mz609 to mz617 tablets.
While at it, let's also move aliases to the board specific dts files where
they belong. And let's move the omap4-droid4-xt894.dts compatible to the
top.
Signed-off-by: Tony Lindgren <tony@atomide.com>
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Let's add compatibles for some xyboard tablets, these are similar to
the mapphone devices already listed but with different peripherals.
Acked-by: Rob Herring <robh@kernel.org>
Signed-off-by: Tony Lindgren <tony@atomide.com>
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Add missing space in compatible property and align style with rest of
the file.
Signed-off-by: Niklas Söderlund <niklas.soderlund+renesas@ragnatech.se>
Reviewed-by: Geert Uytterhoeven <geert+renesas@glider.be>
Link: https://lore.kernel.org/r/20231125233327.238575-1-niklas.soderlund+renesas@ragnatech.se
Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
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Add missing space in compatible property and align style with rest of
the file.
Signed-off-by: Niklas Söderlund <niklas.soderlund+renesas@ragnatech.se>
Reviewed-by: Geert Uytterhoeven <geert+renesas@glider.be>
Link: https://lore.kernel.org/r/20231125233242.237660-1-niklas.soderlund+renesas@ragnatech.se
Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
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Describe the 5" WVGA TFT LCD panel on the Armadillo-800-EVA development
board, and enable the LCD controller that drives it.
Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
Reviewed-by: Laurent Pinchart <laurent.pinchart+renesas@ideasonboard.com>
Link: https://lore.kernel.org/r/278339322dcaaedc0d68fc67f1f1272d880084d7.1700669207.git.geert+renesas@glider.be
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Add device nodes for the two LCD Controllers (LCDC) on the R-Mobile A1
SoC, and for the two optional external LCDL clock inputs.
Note that the HDMI clock for LCDC1 is not added, as this clock is not
yet supported.
Based on a patch by Laurent Pinchart adding the first LCDC device node.
Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
Link: https://lore.kernel.org/r/12dcec10e6fb3b55c39f6221349d35d6d6f17a5d.1700669207.git.geert+renesas@glider.be
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Now the DRM driver for the SH-Mobile LCD Controller supports DT, replace
the legacy frame buffer device driver by the DRM driver.
Disable frame buffer device drivers, as this was the last frame buffer
device driver for Renesas ARM systems.
Enable CONFIG_DRM_FBDEV_EMULATION and CONFIG_FB_DEVICE, as these are no
longer auto-enabled since commit bb6c4507fe825f1b ("drm: fix up fbdev
Kconfig defaults").
Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
Link: https://lore.kernel.org/r/3d17d8418ddabeb84ff5fa1cdd16439ddc84286f.1700669207.git.geert+renesas@glider.be
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The bus properties for HDMI capture are defined on the incorrect node
for the VIN driver to be able to consume them. They are described on the
HDMI video source but they should be described on the VIN capture node,
move them.
Signed-off-by: Niklas Söderlund <niklas.soderlund+renesas@ragnatech.se>
Reviewed-by: Geert Uytterhoeven <geert+renesas@glider.be>
Link: https://lore.kernel.org/r/20231022181910.898040-3-niklas.soderlund+renesas@ragnatech.se
Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
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Most Gen3 R-Car devices have HDMI as the default video input source,
align Draak with them and make HDMI the default.
Signed-off-by: Niklas Söderlund <niklas.soderlund+renesas@ragnatech.se>
Reviewed-by: Geert Uytterhoeven <geert+renesas@glider.be>
Link: https://lore.kernel.org/r/20231022181910.898040-2-niklas.soderlund+renesas@ragnatech.se
Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
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Add dts node for EEPROM placed on baseboard in JetHub D1+ devices.
Signed-off-by: Viacheslav Bocharov <adeep@lexina.in>
Reviewed-by: Neil Armstrong <neil.armstrong@linaro.org>
Link: https://lore.kernel.org/r/20231102061233.3113249-1-adeep@lexina.in
Signed-off-by: Neil Armstrong <neil.armstrong@linaro.org>
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Add pinctrl node for the Meson NAND controller.
Signed-off-by: Arseniy Krasnov <avkrasnov@salutedevices.com>
Reviewed-by: Neil Armstrong <neil.armstrong@linaro.org>
Link: https://lore.kernel.org/r/20231109094504.131265-1-avkrasnov@salutedevices.com
Signed-off-by: Neil Armstrong <neil.armstrong@linaro.org>
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The DTS code coding style expects exactly one space before and after '='
sign.
Signed-off-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org>
Reviewed-by: Viacheslav Bocharov <adeep@lexina.in>
Link: https://lore.kernel.org/r/20231124094700.58071-1-krzysztof.kozlowski@linaro.org
Signed-off-by: Neil Armstrong <neil.armstrong@linaro.org>
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Add watchdog device.
Signed-off-by: Huqiang Qin <huqiang.qin@amlogic.com>
Reviewed-by: Neil Armstrong <neil.armstrong@linaro.org>
Link: https://lore.kernel.org/r/20231027104358.342861-4-huqiang.qin@amlogic.com
Signed-off-by: Neil Armstrong <neil.armstrong@linaro.org>
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