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2016-01-12drm/i915: Store max lane count in intel_digital_portVille Syrjälä4-15/+15
Rather than having open coded checks for the DDI A/E configuration, just store the max supported lane count in intel_digital_port. We had an open coded check for DDI A, but not for DDI E. So we may have been vilating the DDI E max lane count. Signed-off-by: Ville Syrjälä <ville.syrjala@linux.intel.com> Reviewed-by: Daniel Vetter <daniel.vetter@ffwll.ch>
2016-01-12drm/i915: Check max number of lanes when registering DDI portsVille Syrjälä1-0/+36
DDI A and E share some of the lanes, so check that we have enough lanes for the purpose we need before registering the encoders. Signed-off-by: Ville Syrjälä <ville.syrjala@linux.intel.com> Link: http://patchwork.freedesktop.org/patch/msgid/1449597590-6971-3-git-send-email-ville.syrjala@linux.intel.com Reviewed-by: Daniel Vetter <daniel.vetter@ffwll.ch>
2016-01-12drm/i915: Pass the correct encoder to intel_ddi_clk_select() with MSTVille Syrjälä1-1/+1
We're supposed to pass the primary DP encoder to intel_ddi_clk_select(), not the fake MST encoder. Do so. There's no real bug here though, since intel_ddi_clk_select() only checks if the encoder type is EDP (which it isn't for either the primary DP encoder or the fake MST encoder), and it gets the DDI port via intel_ddi_get_encoder_port() (which knows how to do the fake->primary->port dance itself). Fixes: e404ba8 ("drm/i915: Setup DDI clk for MST on SKL") Signed-off-by: Ville Syrjälä <ville.syrjala@linux.intel.com> Link: http://patchwork.freedesktop.org/patch/msgid/1449597590-6971-2-git-send-email-ville.syrjala@linux.intel.com Reviewed-by: Daniel Vetter <daniel.vetter@ffwll.ch>
2016-01-12drm/i915/bdw+: Replace list_del+list_add_tail with list_move_tailTvrtko Ursulin1-9/+6
Same effect for slightly less source code and resulting binary. Signed-off-by: Tvrtko Ursulin <tvrtko.ursulin@intel.com> Reviewed-by: Daniel Vetter <daniel.vetter@ffwll.ch> Link: http://patchwork.freedesktop.org/patch/msgid/1452521321-4032-2-git-send-email-tvrtko.ursulin@linux.intel.com
2016-01-12drm/amdgpu/powerplay: include asm/div64.h for do_div()Stephen Rothwell2-2/+2
Fixes: 1e4854e96c35 ("drm/amdgpu/powerplay: implement thermal control for tonga.") Signed-off-by: Stephen Rothwell <sfr@canb.auug.org.au> Signed-off-by: Dave Airlie <airlied@redhat.com>
2016-01-11drm/i915/dsi: add debug printing of the new sequence block namesJani Nikula1-0/+6
Reviewed-by: Ville Syrjälä <ville.syrjala@linux.intel.com> Signed-off-by: Jani Nikula <jani.nikula@intel.com> Link: http://patchwork.freedesktop.org/patch/msgid/1452006497-28517-1-git-send-email-jani.nikula@intel.com
2016-01-11drm/i915/dsi: reduce tedious repetitionJani Nikula1-40/+22
Make it a bit tidier and safer. Reviewed-by: Daniel Vetter <daniel.vetter@ffwll.ch> Signed-off-by: Jani Nikula <jani.nikula@intel.com> Link: http://patchwork.freedesktop.org/patch/msgid/cab24a84811ddbae72d8c3a5f59d29f57b1d3aad.1450702954.git.jani.nikula@intel.com
2016-01-11drm/i915/dsi: skip unknown elements for sequence block v3+Jani Nikula1-19/+23
The sequence block has sizes of elements after the operation byte since sequence block v3. Use it to skip elements we don't support yet. v2: remove redundant exec_elem[operation_byte] check (Daniel) Reviewed-by: Daniel Vetter <daniel.vetter@ffwll.ch> Signed-off-by: Jani Nikula <jani.nikula@intel.com> Link: http://patchwork.freedesktop.org/patch/msgid/1452006408-27688-1-git-send-email-jani.nikula@intel.com
2016-01-11drm/i915/bios: add support for MIPI sequence block v3Jani Nikula2-11/+94
The changes since the sequence block v2 are: * The whole MIPI bios data block has a separate 32-bit size field since v3, stored after the version. This facilitates big sequences. * The size of the panel specific sequence blocks has grown to 32 bits. This facilitates big sequences. * The elements within sequences now have an 8-bit size field following the operation byte. This facilitates skipping unknown new operation bytes, i.e. forward compatibility. v2 (of the patch): use DRM_ERROR for unknown operation byte v3 (of the patch): even more bounds checking (Ville) Reviewed-by: Ville Syrjälä <ville.syrjala@linux.intel.com> Signed-off-by: Jani Nikula <jani.nikula@intel.com> Link: http://patchwork.freedesktop.org/patch/msgid/1452518102-3154-1-git-send-email-jani.nikula@intel.com
2016-01-11drm/i915/bios: add defines for v3 sequence blockJani Nikula1-0/+5
New sequences, new operations within sequences. Reviewed-by: Ville Syrjälä <ville.syrjala@linux.intel.com> Signed-off-by: Jani Nikula <jani.nikula@intel.com> Link: http://patchwork.freedesktop.org/patch/msgid/96335b9fb875f79882d694360bff060251bd2f17.1450702954.git.jani.nikula@intel.com
2016-01-11drm/i915: skip the i2c element in the generic VBT DSI driverJani Nikula1-0/+6
Don't choke on unknown elements when we do know how to skip them. Reviewed-by: Ville Syrjälä <ville.syrjala@linux.intel.com> Signed-off-by: Jani Nikula <jani.nikula@intel.com> Link: http://patchwork.freedesktop.org/patch/msgid/1452518948-16469-1-git-send-email-jani.nikula@intel.com
2016-01-11drm/i915/bios: add sequences for MIPI sequence block v2Jani Nikula1-0/+3
Properly parse the new sequences added in MIPI sequence block v2. Reviewed-by: Ville Syrjälä <ville.syrjala@linux.intel.com> Signed-off-by: Jani Nikula <jani.nikula@intel.com> Link: http://patchwork.freedesktop.org/patch/msgid/cc1551bdfc4392d02413b78179f3a65c786c75ab.1450702954.git.jani.nikula@intel.com
2016-01-11drm/i915/bios: interpret the i2c elementJani Nikula2-1/+6
Add parsing of the i2c element, defined in MIPI sequence block v2. Drop the status operation byte while at it, that does not exist. Reviewed-by: Ville Syrjälä <ville.syrjala@linux.intel.com> Signed-off-by: Jani Nikula <jani.nikula@intel.com> Link: http://patchwork.freedesktop.org/patch/msgid/d8a2998977feee2f5b5ad609aaca787adfb41479.1450702954.git.jani.nikula@intel.com
2016-01-11drm/i915: Arm the unclaimed mmio debugs on suspend pathMika Kuoppala3-4/+7
If we go into suspend with unclaimed access detected, it would be nice to catch that access on a next suspend path. So instead of just notifying about it, arm the unclaimed mmio checks on suspend side. We want to keep the asymmetry on resume, as if it was on resume path, it was not driver that is responsible so no point in arming mmio debugs. Cc: Chris Wilson <chris@chris-wilson.co.uk> Signed-off-by: Mika Kuoppala <mika.kuoppala@intel.com> Reviewed-by: Chris Wilson <chris@chris-wilson.co.uk> Link: http://patchwork.freedesktop.org/patch/msgid/1452261080-6979-2-git-send-email-mika.kuoppala@intel.com
2016-01-11drm/i915: Enable mmio_debug for vlv/chvMika Kuoppala1-19/+22
With commit 8ac3e1bb76cc ("drm/i915: Add non claimed mmio checking for vlv/chv") we now have chv/vlv support in place for detecting unclaimed access. Also the perf hit of extra mmio read is now only suffered if mmio_debug is set. This allows us to stuff the macro for unclaimed reg detection inside a generic gen6 register access, as now all gens using these macros uses also unclaimed debugs, the one exception being snb. We gain more clean and generic macros and only downside is that snb will suffer one branch perf hit without upside. Note that the hsw write path debug register check now happens before fifo check, but this should not make any real difference. As vlv/chv use the generic gen6 access macros, the consequence is that they gain the mmio_debug feature. Cc: Ville Syrjälä <ville.syrjala@linux.intel.com> Cc: Chris Wilson <chris@chris-wilson.co.uk> Signed-off-by: Mika Kuoppala <mika.kuoppala@intel.com> Reviewed-by: Chris Wilson <chris@chris-wilson.co.uk> Link: http://patchwork.freedesktop.org/patch/msgid/1452261080-6979-1-git-send-email-mika.kuoppala@intel.com
2016-01-11apple-gmux: Add initial documentationLukas Wunner2-0/+135
Document what I've learned so far about the gmux so that we can collaboratively reverse-engineer its remaining unknown bits without everyone having to start from scratch. The DOC sections are bound together in the gpu.tmpl DocBook under a new vga_switcheroo "Handlers" chapter. Eventually this should be amended with documentation about the four other handlers that exist so far (nouveau v1 DSM, nouveau Optimus DSM, radeon ATPX, amdgpu ATPX). Requires kernel-doc with asciidoc support. The EFI variable was reverse-engineered by Bruno Bierbaumer <bruno@bierbaumer.net> and Andreas Heider <andreas@meetr.de>. Some of the remaining open questions: * How are vblank intervals synchronized on retinas to achieve seamless switching? Is the DP mux capable of this? It's not mentioned in the data sheets. Or is it done at the OS level, i.e. do we have to synchronize vblank intervals between DRM drivers? There's a signal coming from the panel connector and going into gmux, could this be the vblank signal as received by the panel to properly time the switch? * On retinas there's an I2C bus between gmux and the connector of the right I/O board, apparently leading to the Parade PS8401A HDMI repeater. What is this for, is it controlled via gmux registers? Data sheet: http://www.paradetech.com/products/jitter-cleaning-repeaters/ps8401/ * On retinas there's an I2C bus between gmux and the LED driver. Pre-retinas connected the LED driver to SMBUS. Are there additional gmux registers on retinas to control it? * The MacPro6,1 2013 also has a gmux, the same Renesas R4F2113 as the retina MacBook Pro. The Mac Pro doesn't have a built-in display, so what is its purpose? Power control of the dual FirePro GPUs? Switching of the external DP/Thunderbolt ports? The iFixit teardown clearly shows one TI HD3SS212 DisplayPort mux on the logic board next to one of the three Thunderbolt controllers. However six muxes would be necessary to switch all six ports between GPUs. The mux is probably necessary for one of the display configurations allowed by Apple, but which one? https://www.ifixit.com/Teardown/Mac+Pro+Late+2013+Teardown/20778 https://d3nevzfk7ii3be.cloudfront.net/igi/fELBTnt31QhnDsqq.huge https://support.apple.com/en-us/HT202801 * Registers we haven't decoded yet: 0x700 32 Bit configmap? 0x708 32 Bit power sequence? 0x712 8 Bit status of clock from panel on retinas? 0x713 8 Bit dito? 0x724 16 Bit backlight, raw value? 0x760 32 Bit backlight 0x764 32 Bit backlight 0x768 8 Bit backlight 0x76a 16 Bit backlight 0x76c 16 Bit backlight 0x76e 16 Bit backlight 0x77f edp/dp/hdmi probe? retina only. * Addition by Bruno Prémont <bonbons@linux-vserver.org>: "Missing is also precise knowledge as to what the gmux depends on. From behavioral reports, it is somehow sensitive to VGA IO/MEM routing (it apparently needs the routing to go to integrated GPU, not discrete GPU). When the routing is inappropriate backlight control IO just reads back as 0xFF (and eventually gmux IO in general does so)." Signed-off-by: Lukas Wunner <lukas@wunner.de> Acked-by: Darren Hart <dvhart@linux.intel.com> Link: http://patchwork.freedesktop.org/patch/msgid/da309e436fbeac886477d80376457b7d83ea4b2d.1452431795.git.lukas@wunner.de Signed-off-by: Daniel Vetter <daniel.vetter@ffwll.ch>
2016-01-11drm/amdgpu: add irq domain supportAlex Deucher6-8/+136
Hardware blocks on the GPU like ACP generate interrupts in the GPU interrupt controller, but are driven by a separate driver. Add an irq domain to the GPU driver so that blocks like ACP can register a Linux interrupt. Acked-by: Dave Airlie <airlied@redhat.com> Acked-by: Christian König <christian.koenig@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2016-01-11drm/amdgpu/cgs: add an interface to access PCI resourcesAlex Deucher2-0/+70
This provides an interface to get access to the base address of PCI resources (MMIO, DOORBELL, etc.). Only MMIO and DOORBELL are implemented right now. This is necessary to properly utilize shared drivers on platform devices. IP modules can use this interface to get the base address of the resource and add any additional offset and set the size when setting up the platform driver(s). Acked-by: Dave Airlie <airlied@redhat.com> Acked-by: Christian König <christian.koenig@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2016-01-11drm/i915: Widen return value for reservation_object_wait_timeout_rcu to long.Maarten Lankhorst1-6/+8
This fixes a spurious warning from an integer overflow on 64-bits systems. The function may return MAX_SCHEDULE_TIMEOUT which gets truncated to -1. Explicitly handling this by casting to lret fixes it. Signed-off-by: Maarten Lankhorst <maarten.lankhorst@linux.intel.com> Reported-and-tested-by: Joseph Yasi <joe.yasi@gmail.com> Tested-by: Andreas Reis <andreas.reis@gmail.com> Reviewed-by: Daniel Vetter <daniel.vetter@ffwll.ch> Cc: drm-intel-fixes@lists.freedesktop.org Fixes: 3c28ff22f6e20c ("i915: wait for fence in prepare_plane_fb") Link: http://patchwork.freedesktop.org/patch/msgid/5666EEC8.2000403@linux.intel.com
2016-01-11Merge branch 'linux-4.5' of git://github.com/skeggsb/linux into drm-nextDave Airlie141-3704/+4879
- gk20a instmem fixes / improvements - more gm10x vs gm20x differences deal with - better support for high-frequency hdmi modes - pstate control interfaces moved to debugfs - support for pcie link speed changes - misc other fixes across the board * 'linux-4.5' of git://github.com/skeggsb/linux: (50 commits) drm/nouveau/pmu: prevent falcon from acking interrupts routed to the host drm/nouveau/perf: change pcie speed on pstate change drm/nouveau/perf: add fields for pci speed and width and use it for the pstates drm/nouveau/bios/perf: parse the pci speed from the bios for tesla and newer cards drm/nouveau/pci: implement pcie speed change for kepler+ drm/nouveau/pci: implement pcie speed change for Fermi drm/nouveau/pci: implement pcie speed change for tesla drm/nouveau/pci: implement generic code for pcie speed change drm/nouveau/pci: add gk104 variant drm/nouveau/pci: add gf106 variant drm/nouveau/kms: take mode_config mutex in connector hotplug path drm/nouveau/nouveau/perfmon: add interface files for current core voltage drm/nouveau/sysfs: remove pstate interface drm/nouveau/debugfs: add copy of sysfs pstate interface ported to debugfs drm/nouveau/debugfs: we need a ctrl object for debugfs drm/nouveau/debugfs: rename functions to indicate they are used inside drm drm/nouveau/debugfs: add infrastructure to add files with other fops than only read drm/nouveau/fifo/gf100: remove references to "daemon" drm/nouveau/fb/nv50: remove references to "daemon" drm/nouveau/clk: remove references to "daemon" ...
2016-01-11drm/nouveau/pmu: prevent falcon from acking interrupts routed to the hostBen Skeggs5-2266/+2252
Signed-off-by: Ben Skeggs <bskeggs@redhat.com>
2016-01-11drm/nouveau/perf: change pcie speed on pstate changeKarol Herbst1-0/+3
v2: remove error and only set link for pcie devices v6: remove check for pcie device Signed-off-by: Karol Herbst <nouveau@karolherbst.de>
2016-01-11drm/nouveau/perf: add fields for pci speed and width and use it for the pstatesKarol Herbst2-0/+5
Signed-off-by: Karol Herbst <nouveau@karolherbst.de>
2016-01-11drm/nouveau/bios/perf: parse the pci speed from the bios for tesla and newer ↵Karol Herbst2-0/+18
cards Signed-off-by: Karol Herbst <nouveau@karolherbst.de>
2016-01-11drm/nouveau/pci: implement pcie speed change for kepler+Karol Herbst1-0/+189
v2: rename functions v3: remove pcie2 accessors v6: fix alignement and line width, also remove useless code Signed-off-by: Karol Herbst <nouveau@karolherbst.de>
2016-01-11drm/nouveau/pci: implement pcie speed change for FermiKarol Herbst3-0/+74
v5: don't set kepler func pointers v6: fix alignment and line length
2016-01-11drm/nouveau/pci: implement pcie speed change for teslaKarol Herbst3-0/+120
v5: don't set fermi or kepler func pointers v6: fix alignment
2016-01-11drm/nouveau/pci: implement generic code for pcie speed changeKarol Herbst5-0/+210
v2: rename and group functions v4: change copyright information move printing of pcie speeds into oneinit, rename all pcie functions to nvkm_pcie_* don't try to raise the pcie version when no higher one is supported v5: revert Copyright changes and rename nvkm_pcie_raise_version to nvkm_pcie_set_version v6: remove some useless pci_is_pcie checks and rework messages Signed-off-by: Karol Herbst <nouveau@karolherbst.de>
2016-01-11drm/nouveau/pci: add gk104 variantKarol Herbst4-10/+51
v2: change email used in header v4: change Copyright information v5: revert Copyright changes Signed-off-by: Karol Herbst <nouveau@karolherbst.de>
2016-01-11drm/nouveau/pci: add gf106 variantKarol Herbst4-5/+46
v2: change email used in header v4: change Copyright information v5: revert Copyright changes Signed-off-by: Karol Herbst <nouveau@karolherbst.de>
2016-01-11drm/nouveau/kms: take mode_config mutex in connector hotplug pathBen Skeggs1-0/+3
fdo#93634 Signed-off-by: Ben Skeggs <bskeggs@redhat.com> Cc: stable@vger.kernel.org
2016-01-11drm/nouveau/nouveau/perfmon: add interface files for current core voltageKarol Herbst2-0/+51
Signed-off-by: Karol Herbst <nouveau@karolherbst.de> Signed-off-by: Ben Skeggs <bskeggs@redhat.com>
2016-01-11drm/nouveau/sysfs: remove pstate interfaceKarol Herbst5-225/+0
Signed-off-by: Karol Herbst <nouveau@karolherbst.de> Signed-off-by: Ben Skeggs <bskeggs@redhat.com>
2016-01-11drm/nouveau/debugfs: add copy of sysfs pstate interface ported to debugfsKarol Herbst1-2/+138
Signed-off-by: Karol Herbst <nouveau@karolherbst.de> Signed-off-by: Ben Skeggs <bskeggs@redhat.com>
2016-01-11drm/nouveau/debugfs: we need a ctrl object for debugfsKarol Herbst4-0/+57
Signed-off-by: Karol Herbst <nouveau@karolherbst.de> Signed-off-by: Ben Skeggs <bskeggs@redhat.com>
2016-01-11drm/nouveau/debugfs: rename functions to indicate they are used inside drmKarol Herbst3-8/+9
We will need our own debugfs_init and cleanup functions, because nouveau_drm isn't ready while the DRM ones are called by DRM. Signed-off-by: Karol Herbst <nouveau@karolherbst.de> Signed-off-by: Ben Skeggs <bskeggs@redhat.com>
2016-01-11drm/nouveau/debugfs: add infrastructure to add files with other fops than ↵Karol Herbst1-3/+53
only read v2: use the same object for private data as with the drm debugfs functions Signed-off-by: Karol Herbst <nouveau@karolherbst.de> Signed-off-by: Ben Skeggs <bskeggs@redhat.com>
2016-01-11drm/nouveau/fifo/gf100: remove references to "daemon"Ben Skeggs1-2/+2
Signed-off-by: Ben Skeggs <bskeggs@redhat.com>
2016-01-11drm/nouveau/fb/nv50: remove references to "daemon"Ben Skeggs1-1/+1
Signed-off-by: Ben Skeggs <bskeggs@redhat.com>
2016-01-11drm/nouveau/clk: remove references to "daemon"Ben Skeggs4-8/+8
Signed-off-by: Ben Skeggs <bskeggs@redhat.com>
2016-01-11drm/nouveau/gr/gf100: provide a bit more info for various errorsIlia Mirkin1-9/+69
Signed-off-by: Ilia Mirkin <imirkin@alum.mit.edu> Signed-off-by: Ben Skeggs <bskeggs@redhat.com>
2016-01-11drm/nouveau/bios: parse 8.1 Gbps DP link rateBen Skeggs1-4/+7
From DCB 4.1 spec. Signed-off-by: Ben Skeggs <bskeggs@redhat.com>
2016-01-11drm/nouveau/ltc/gm204: split implementation from gm107Ben Skeggs6-8/+79
Differences from GM10x: - GM20x LTC count detection differs from GM10x - GM20x init doesn't require large page size setting Signed-off-by: Ben Skeggs <bskeggs@redhat.com>
2016-01-11drm/nouveau/ltc/gm107: use nvkm_mask to set cbc_ctrl1Ben Skeggs1-1/+1
resman and nvgpu both do this, presumably for good reason. Signed-off-by: Ben Skeggs <bskeggs@redhat.com>
2016-01-11drm/nouveau/ibus/gm204: split implementation from gk104Ben Skeggs6-4/+47
GM20x doesn't require the priv ring timeout bumps that GK/GM10x have. Signed-off-by: Ben Skeggs <bskeggs@redhat.com>
2016-01-11drm/nouveau/gr/gf100-: subclass nvkm_object to store channel pointerBen Skeggs1-0/+28
Signed-off-by: Ben Skeggs <bskeggs@redhat.com>
2016-01-11drm/nouveau/nvif: modify nvif_unvers/nvif_unpack macros to be more obviousBen Skeggs45-171/+186
Signed-off-by: Ben Skeggs <bskeggs@redhat.com>
2016-01-11drm/nouveau/nvif: split out client interface definitionsBen Skeggs3-13/+13
Signed-off-by: Ben Skeggs <bskeggs@redhat.com>
2016-01-11drm/nouveau/nvif: split out device interface definitionsBen Skeggs6-49/+50
Signed-off-by: Ben Skeggs <bskeggs@redhat.com>
2016-01-11drm/nouveau/nvif: split out ctxdma interface definitionsBen Skeggs12-75/+79
Signed-off-by: Ben Skeggs <bskeggs@redhat.com>
generated by cgit v1.2.3 (git 2.39.0) at 2025-09-27 07:33:23 +0300